Add struct NumaState in MachineState and move existing numa global
nb_numa_nodes(renamed as "num_nodes") into NumaState. And add variable
numa_support into MachineClass to decide which submachines support NUMA.
Suggested-by: Igor Mammedov
Suggested-by: Eduardo Habkost
Signed-off-by: Tao Xu
---
In struct arm_boot_info, kernel_filename, initrd_filename and
kernel_cmdline are copied from from MachineState. This patch add
MachineState as a parameter into arm_load_dtb() and move the copy chunk
of kernel_filename, initrd_filename and kernel_cmdline into
arm_load_kernel().
Reviewed-by: Igor Ma
This series of patches will build Heterogeneous Memory Attribute Table (HMAT)
according to the command line. The ACPI HMAT describes the memory attributes,
such as memory side cache attributes and bandwidth and latency details,
related to the Memory Proximity Domain.
The software is expected to use
From: Liu Jingqi
This structure describes memory side cache information for memory
proximity domains if the memory side cache is present and the
physical device forms the memory side cache.
The software could use this information to effectively place
the data in memory to maximize the performance
Move existing numa global have_numa_distance into NumaState.
Reviewed-by: Igor Mammedov
Reviewed-by: Liu Jingqi
Suggested-by: Igor Mammedov
Suggested-by: Eduardo Habkost
Signed-off-by: Tao Xu
---
Changes in v6:
- rebase to upstream, move globals in arm/sbsa-ref
---
hw/arm/sbsa-ref.c
In ACPI 6.3 chapter 5.2.27 Heterogeneous Memory Attribute Table (HMAT),
The initiator represents processor which access to memory. And in 5.2.27.3
Memory Proximity Domain Attributes Structure, the attached initiator is
defined as where the memory controller responsible for a memory proximity
domain
From: Liu Jingqi
This structure describes the memory access latency and bandwidth
information from various memory access initiator proximity domains.
The latency and bandwidth numbers represented in this structure
correspond to rated latency and bandwidth for the platform.
The software could use
Move the _FIT method buff Aml-build codes into
aml_build_runtime_buf(), and then NFIT and HMAT can both use it.
Suggested-by: Igor Mammedov
Signed-off-by: Tao Xu
---
Changes in v6:
- Add more commit message and change the function name
---
hw/acpi/nvdimm.c| 49 +
Move existing numa global numa_info (renamed as "nodes") into NumaState.
Suggested-by: Igor Mammedov
Suggested-by: Eduardo Habkost
Signed-off-by: Tao Xu
---
Changes in v6:
- Rebase to upstream, move globals in arm/sbsa-ref
- Correct some mistake(Igor)
- Use ms->numa_state->nodes di
From: Liu Jingqi
HMAT is defined in ACPI 6.3: 5.2.27 Heterogeneous Memory Attribute Table
(HMAT). The specification references below link:
http://www.uefi.org/sites/default/files/resources/ACPI_6_3_final_Jan30.pdf
It describes the memory attributes, such as memory side cache
attributes and bandw
From: Liu Jingqi
Add -numa hmat-cache option to provide Memory Side Cache Information.
These memory attributes help to build Memory Side Cache Information
Structure(s) in ACPI Heterogeneous Memory Attribute Table (HMAT).
Signed-off-by: Liu Jingqi
Signed-off-by: Tao Xu
---
Changes in v6:
-
Add QMP interface to introduce new HMAT data (including System Locality
Latency and Bandwidth Information Structure, Memory Side Cache
Information Structure) at runtime. The interface can
also replace existing HMAT data.
Suggested-by: Igor Mammedov
Signed-off-by: Tao Xu
---
hw/acpi/acpi-stub.c
From: Liu Jingqi
OSPM evaluates HMAT only during system initialization.
Any changes to the HMAT state at runtime or information
regarding HMAT for hot plug are communicated using _HMA method.
_HMA is an optional object that enables the platform to provide
the OS with updated Heterogeneous Memory
From: Liu Jingqi
Add -numa hmat-lb option to provide System Locality Latency and
Bandwidth Information. These memory attributes help to build
System Locality Latency and Bandwidth Information Structure(s)
in ACPI Heterogeneous Memory Attribute Table (HMAT).
Signed-off-by: Liu Jingqi
Signed-off-
ACPI table HMAT has been introduced, QEMU now builds HMAT tables for
Heterogeneous Memory with boot option '-numa node'.
Add test cases on PC and Q35 machines with 2 numa nodes.
Because HMAT is generated when system enable numa, the
following tables need to be added for this test:
tests/acpi-tes
It is likely still quite incomplete (e.g. mouse and interrupts are not
implemented yet), but it is good enough for keyboard input at the firmware
monitor.
This code has been taken from Bryce Lanham's GSoC 2011 NeXT branch at
https://github.com/blanham/qemu-NeXT/blob/next-cube/hw/next-kbd.c
and a
I don't have much clue about the NeXT hardware, but at least I know now
the source files a little bit, so I volunteer to pick up patches and send
PULL requests for them until someone else with more knowledge steps up
to do this job instead.
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Thoma
The NeXTcube uses a linear framebuffer with 4 greyscale colors and
a fixed resolution of 1120 * 832.
This code has been taken from Bryce Lanham's GSoC 2011 NeXT branch at
https://github.com/blanham/qemu-NeXT/blob/next-cube/hw/next-fb.c
and altered to fit the latest interface of the current QEMU
During Google Summer of Code 2011, Bryce Lanham added the possibility to
emulate the NeXTcube machine in QEMU, e.g. see these URLs for some details:
https://wiki.qemu.org/Google_Summer_of_Code_2011#NeXT_machines_system_emulation
https://lists.gnu.org/archive/html/qemu-devel/2011-08/msg02158.html
The NeXTcube uses a normal 8530 serial controller, so we can simply use
our normal "escc" device here.
While we're at it, also add a boot-serial-test for the next-cube machine,
now that the serial output works.
Signed-off-by: Thomas Huth
---
hw/m68k/Kconfig | 1 +
hw/m68k/next-cube.c
From: Laurent Vivier
On Sparc and PowerMac, the bit 0 of the address selects the register
type (control or data) and bit 1 selects the channel (B or A).
On m68k Macintosh and NeXTcube, the bit 0 selects the channel and
bit 1 the register type.
This patch introduces a new parameter (bit_swap) to
It is still quite incomplete (no SCSI, no floppy emulation, no network,
etc.), but the firmware already shows up the debug monitor prompt in the
framebuffer display, so at least the very basics are already working.
This code has been taken from Bryce Lanham's GSoC 2011 NeXT branch at
https://git
Patchew URL: https://patchew.org/QEMU/20190709071520.8745-1-tao3...@intel.com/
Hi,
This series failed build test on s390x host. Please find the details below.
=== TEST SCRIPT BEGIN ===
#!/bin/bash
# Testing script will be invoked under the git checkout with
# HEAD pointing to a commit that has
Patchew URL: https://patchew.org/QEMU/20190709071520.8745-1-tao3...@intel.com/
Hi,
This series failed the asan build test. Please find the testing commands and
their output below. If you have Docker installed, you can probably reproduce it
locally.
=== TEST SCRIPT BEGIN ===
#!/bin/bash
make do
From: Alistair Francis
Commit 269bd5d8 "cpu: Move the softmmu tlb to CPUNegativeOffsetState'
broke the RISC-V host build as there are two variables that are used but
not defined.
This patch renames the undefined variables mask_off and table_off to the
existing (but unused) mask_ofs and table_ofs
17:40:05 +0100)
are available in the Git repository at:
https://github.com/rth7680/qemu.git tags/pull-tcg-20190709
for you to fetch changes up to 11978f6f58f1d3d66429f7ff897524f693d823ce:
tcg: Fix expansion of INDEX_op_not_vec (2019-07-09
This operation can always be emitted, even if we need to
fall back to xor. Adjust the assertions to match.
Signed-off-by: Richard Henderson
---
tcg/tcg-op-vec.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/tcg/tcg-op-vec.c b/tcg/tcg-op-vec.c
index c8fdc24f56..6714991bf4 100644
---
From: Alistair Francis
Commit 269bd5d8 "cpu: Move the softmmu tlb to CPUNegativeOffsetState'
broke the RISC-V host build as there are two variables that are used but
not defined.
This patch renames the undefined variables mask_off and table_off to the
existing (but unused) mask_ofs and table_ofs
This operation can always be emitted, even if we need to
fall back to xor. Adjust the assertions to match.
Signed-off-by: Richard Henderson
---
tcg/tcg-op-vec.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/tcg/tcg-op-vec.c b/tcg/tcg-op-vec.c
index c8fdc24f56..6714991bf4 100644
---
Check page flags before letting an invalid pc cause a SIGSEGV.
Prepare for eventially validating PROT_EXEC. The current wrinkle being
that we have a problem with our implementation of signals. We should
be using a vdso like the kernel, but we instead put the trampoline on
the stack. In the mean
On Mon, 8 Jul 2019 17:09:31 +0200
Christian Borntraeger wrote:
> The new facility is called "Vector-Packed-Decimal-Enhancement Facility"
> and not "Vector BCD enhancements facility 1". As the shortname might
> have already found its way into some backports lets keep vxbeh.
>
> Fixes: 54d65de0b5
On Tue, Jul 09, 2019 at 07:53:15AM +0200, Markus Armbruster wrote:
> Daniel P. Berrangé writes:
>
> > On Mon, Jul 08, 2019 at 12:27:12PM +0200, Philippe Mathieu-Daudé wrote:
> [...]
> >> Anyway, to stop bikeshedding this thread, can you add few lines about
> >> why not use getenv() in the HACKING
Am 08.07.2019 um 20:47 hat Eric Blake geschrieben:
> A recent tweak to the '-o help' output for qemu-img needs to be
> reflected into the iotests expected outputs.
>
> Fixes: f7077c98
> Reported-by: Kevin Wolf
> Signed-off-by: Eric Blake
Thanks, applied to the block branch.
Kevin
On Mon, 8 Jul 2019 at 20:39, Aleksandar Markovic wrote:
> They are all real issues. Two of them are cases of missing
> '/* fall through */' (I plan to send fixes for them in 4.2 timeframe)
> and five of them are cases of missing 'break' (I plan to send
> corresponding fixes for 4.1 in few days).
Hi
On Mon, Jul 8, 2019 at 8:04 PM Daniel P. Berrangé wrote:
> > The D-Bus protocol can be made to work peer-to-peer, but the most
> > common and practical way is through a bus daemon. This also has the
> > advantage of increased debuggability (you can eavesdrop on the bus and
> > introspect it).
On 7/6/19 2:08 AM, Paolo Bonzini wrote:
> On 05/07/19 12:31, Shinichiro Kawasaki wrote:
>>> This way there's generally no need to shoehorn ASC codes into errno. I
>>> still have to test my changes, but I hope to send something within a
>>> couple of days.
>>
>> Thanks for sharing your thoughts. No
On Mon, 08 Jul 2019 11:49:35 PDT (-0700), Alistair Francis wrote:
This series includes the OpenSBI firmware for QEMU RISC-V users.
To avoid breakages we have not changed the default behaviour of QEMU.
The plan is to change the default though, which is why an entry to the
qemu-deprecated.texi fil
On Tue, 9 Jul 2019 at 09:35, Palmer Dabbelt wrote:
> I haven't looked at the code yet, but as the last one was fine it's probably
> OK. My only issue here is the timing: it's after the soft freeze so if I
> understand correctly we're not supposed to take any new features into 4.1.
> That's kind o
Hi Liu,
On 7/9/19 3:58 AM, Peter Xu wrote:
> On Fri, Jul 05, 2019 at 07:01:35PM +0800, Liu Yi L wrote:
>> This patch imports the vIOMMU related definitions from kernel
>> uapi/vfio.h. e.g. pasid allocation, guest pasid bind, guest pasid
>> table bind and guest iommu cache invalidation.
>>
>> Cc: K
Hi Liu,
On 7/5/19 1:01 PM, Liu Yi L wrote:
> This patch adds vfio implementation PCIPASIDOps.bind_gpasid/unbind_pasid().
> These two functions are used to propagate guest pasid bind and unbind
> requests to host via vfio container ioctl.
>
> Cc: Kevin Tian
> Cc: Jacob Pan
> Cc: Peter Xu
> Cc:
Hi Liu,
On 7/5/19 1:01 PM, Liu Yi L wrote:
> This patch adds two callbacks pci_device_bind/unbind_gpasid() to
> PCIPASIDOps. These two callbacks are used to propagate guest pasid
> bind/unbind to host. The implementations of the callbacks would be
> device passthru modules like vfio.
>
> Cc: Kevi
On Mon, 8 Jul 2019 14:54:31 +0200
Cornelia Huck wrote:
> I looked through the build log linked to in
> <591d71a5-5b10-ab22-4751-01da8613d...@weilnetz.de> and came up
> with the following patches for s390x. I plan to queue them to
> my fixes branch for 4.1.
Queued patch 2; still waiting for a fi
On 7/9/2019 12:44 PM, Tao Xu wrote:
Denverton-Server is the Atom Processor of Intel Harrisonville platform.
For more information:
https://ark.intel.com/content/www/us/en/ark/products/\
codename/63508/denverton.html
Signed-off-by: Tao Xu
---
target/i386/cpu.c | 45
On Tue, 09 Jul 2019 01:37:08 PDT (-0700), Peter Maydell wrote:
On Tue, 9 Jul 2019 at 09:35, Palmer Dabbelt wrote:
I haven't looked at the code yet, but as the last one was fine it's probably
OK. My only issue here is the timing: it's after the soft freeze so if I
understand correctly we're not
On Tue, Jul 09, 2019 at 12:49:09AM +0400, Marc-André Lureau wrote:
> Since merge 31ed41889e6e13699871040fe089a2884dca46cb ("Merge
> remote-tracking branch
> 'remotes/elmarco/tags/machine-props-pull-request' into staging"), the
> compat arrays are in lowercase.
>
> Signed-off-by: Marc-André Lureau
On Sun, 7 Jul 2019 22:29:51 +0800
Tao Xu wrote:
> From: Liu Jingqi
>
> This structure describes the memory access latency and bandwidth
> information from various memory access initiator proximity domains.
> The latency and bandwidth numbers represented in this structure
> correspond to rated l
On Sun, 7 Jul 2019 22:29:52 +0800
Tao Xu wrote:
> From: Liu Jingqi
>
> This structure describes memory side cache information for memory
> proximity domains if the memory side cache is present and the
> physical device forms the memory side cache.
> The software could use this information to ef
On Sun, 7 Jul 2019 22:29:50 +0800
Tao Xu wrote:
> From: Liu Jingqi
>
> HMAT is defined in ACPI 6.3: 5.2.27 Heterogeneous Memory Attribute Table
> (HMAT). The specification references below link:
> http://www.uefi.org/sites/default/files/resources/ACPI_6_3_final_Jan30.pdf
>
> It describes the m
On 09.07.19 05:08, Jason Dillaman wrote:
> On Fri, Jul 5, 2019 at 6:43 AM Stefano Garzarella wrote:
>>
>> On Fri, Jul 05, 2019 at 11:58:43AM +0200, Max Reitz wrote:
>>> On 05.07.19 11:32, Stefano Garzarella wrote:
This patch allows 'qemu-img info' to show the 'disk size' for
the RBD imag
On Tue, Jul 09, 2019 at 12:26:38PM +0400, Marc-André Lureau wrote:
> Hi
>
> On Mon, Jul 8, 2019 at 8:04 PM Daniel P. Berrangé wrote:
> > > The D-Bus protocol can be made to work peer-to-peer, but the most
> > > common and practical way is through a bus daemon. This also has the
> > > advantage of
** Changed in: qemu
Assignee: (unassigned) => Richard Henderson (rth)
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https://bugs.launchpad.net/bugs/1834496
Title:
Regressions on arm target with some GCC tests
Status in QEMU
I bisected a chunk of the errors to:
commit c6fb8c0cf704c4a1a48c3e99e995ad4c58150dab (refs/bisect/bad)
Author: Richard Henderson
Date: Mon Feb 25 11:42:35 2019 -0800
tcg/i386: Support INDEX_op_extract2_{i32,i64}
Signed-off-by: Richard Henderson
Specifically I think when tc
** Changed in: qemu
Status: Fix Committed => In Progress
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https://bugs.launchpad.net/bugs/1832353
Title:
cpu_exec: Assertion !have_mmap_lock() failed
Status in QEMU:
In Progr
We have some potential race conditions vs our user-exec signal
handler that will be solved with this barrier.
Signed-off-by: Richard Henderson
---
include/qemu/atomic.h | 11 +++
1 file changed, 11 insertions(+)
diff --git a/include/qemu/atomic.h b/include/qemu/atomic.h
index a6ac188188
While I could not replicate the failure Peter reported, the apparent
root cause -- the old magic fixed page -- should affect other guests
as well. In particular, the old arm32 magic fixed page at 0x0f00,
and the hppa magic fixed page at 0.
In the arm32 and hppa cases that I just mentioned --
At present we have a potential error in that helper_retaddr contains
data for handle_cpu_signal, but we have not ensured that those stores
will be scheduled properly before the operation that may fault.
It might be that these races are not in practice observable, due to
our use of -fno-strict-alia
These functions are not used, and are not usable in the
context of code generation, because we never have a helper
return address to pass in to them.
Signed-off-by: Richard Henderson
---
include/exec/cpu_ldst_useronly_template.h | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --
This code block is already surrounded by #ifndef CODE_ACCESS.
Signed-off-by: Richard Henderson
---
include/exec/cpu_ldst_useronly_template.h | 2 --
1 file changed, 2 deletions(-)
diff --git a/include/exec/cpu_ldst_useronly_template.h
b/include/exec/cpu_ldst_useronly_template.h
index 8c7a2c6cd
Turn helper_retaddr into a multi-state flag that may now also
indicate when we're performing a read on behalf of the translator.
In this case, release the mmap_lock before the longjmp back to
the main cpu loop, and thereby avoid a failing assert therein.
Fixes: https://bugs.launchpad.net/qemu/+bug
On 09.07.19 10:55, Max Reitz wrote:
> On 09.07.19 05:08, Jason Dillaman wrote:
>> On Fri, Jul 5, 2019 at 6:43 AM Stefano Garzarella
>> wrote:
>>>
>>> On Fri, Jul 05, 2019 at 11:58:43AM +0200, Max Reitz wrote:
On 05.07.19 11:32, Stefano Garzarella wrote:
> This patch allows 'qemu-img info
On Fri, 14 Jun 2019 08:15:51 PDT (-0700), bmeng...@gmail.com wrote:
This adds a reset opcode for sifive_test device to trigger a system
reset for testing purpose.
Signed-off-by: Bin Meng
---
hw/riscv/sifive_test.c | 4
include/hw/riscv/sifive_test.h | 3 ++-
2 files changed, 6 in
Add migration support for VFIO device
This Patch set include patches as below:
- Define KABI for VFIO device for migration support.
- Added save and restore functions for PCI configuration space
- Generic migration functionality for VFIO device.
* This patch set adds functionality only for PCI d
- Defined MIGRATION region type and sub-type.
- Used 3 bits to define VFIO device states.
Bit 0 => _RUNNING
Bit 1 => _SAVING
Bit 2 => _RESUMING
Combination of these bits defines VFIO device's state during migration
_STOPPED => All bits 0 indicates VFIO device stopped.
_RUNNI
This function is used in follwing patch in this series.
Migration region is mmaped when migration starts and will be unmapped when
migration is complete.
Signed-off-by: Kirti Wankhede
Reviewed-by: Neo Jia
---
hw/vfio/common.c | 20
hw/vfio/trace-events
Added migration state change notifier to get notification on migration state
change. These states are translated to VFIO device state and conveyed to vendor
driver.
Signed-off-by: Kirti Wankhede
Reviewed-by: Neo Jia
---
hw/vfio/migration.c | 54
- Migration functions are implemented for VFIO_DEVICE_TYPE_PCI device in this
patch series.
- VFIO device supports migration or not is decided based of migration region
query. If migration region query is successful and migration region
initialization is successful then migration is supported
Hook vfio_get_object callback for PCI devices.
Signed-off-by: Kirti Wankhede
Reviewed-by: Neo Jia
Suggested-by: Cornelia Huck
---
hw/vfio/pci.c | 8
include/hw/vfio/vfio-common.h | 1 +
2 files changed, 9 insertions(+)
diff --git a/hw/vfio/pci.c b/hw/vfio/pci.c
index
vfio_listerner_log_sync gets list of dirty pages from vendor driver and mark
those pages dirty when in _SAVING state.
Return early for the RAM block section of mapped MMIO region.
Signed-off-by: Kirti Wankhede
Reviewed-by: Neo Jia
---
hw/vfio/common.c | 35 +++
1
Added .save_live_pending, .save_live_iterate and .save_live_complete_precopy
functions. These functions handles pre-copy and stop-and-copy phase.
In _SAVING|_RUNNING device state or pre-copy phase:
- read pending_bytes
- read data_offset - indicates kernel driver to write data to staging
buffer
Define flags to be used as delimeter in migration file stream.
Added .save_setup and .save_cleanup functions. Mapped & unmapped migration
region from these functions at source during saving or pre-copy phase.
Set VFIO device state depending on VM's state. During live migration, VM is
running when .
These functions save and restore PCI device specific data - config
space of PCI device.
Tested save and restore with MSI and MSIX type.
Signed-off-by: Kirti Wankhede
Reviewed-by: Neo Jia
---
hw/vfio/pci.c | 114 ++
include/hw/vfio/vfio-com
Call vfio_migration_probe() and vfio_migration_finalize() functions for
vfio-pci device to enable migration for vfio PCI device.
Removed vfio_pci_vmstate structure.
Signed-off-by: Kirti Wankhede
Reviewed-by: Neo Jia
---
hw/vfio/pci.c | 15 +--
1 file changed, 9 insertions(+), 6 dele
Dirty page tracking (.log_sync) is part of RAM copying state, where
vendor driver provides the bitmap of pages which are dirtied by vendor
driver through migration region and as part of RAM copy, those pages
gets copied to file stream.
To get dirty page bitmap:
- write start address, page_size and
Richard Henderson writes:
> We have some potential race conditions vs our user-exec signal
> handler that will be solved with this barrier.
>
> Signed-off-by: Richard Henderson
Reviewed-by: Alex Bennée
> ---
> include/qemu/atomic.h | 11 +++
> 1 file changed, 11 insertions(+)
>
> d
VM state change handler gets called on change in VM's state. This is used to set
VFIO device state to _RUNNING.
VM state change handler, migration state change handler and log_sync listener
are called asynchronously, which sometimes lead to data corruption in migration
region. Initialised mutex tha
* vandersonmr (vanderson...@gmail.com) wrote:
> adding options to list tbs by some metric and
> investigate their code.
>
> Signed-off-by: Vanderson M. do Rosario
As Markus said you need a short justification that it's for debug etc
to justify HMP only; it doesn't need to be huge, but we should
Flow during _RESUMING device state:
- If Vendor driver defines mappable region, mmap migration region.
- Load config state.
- For data packet, till VFIO_MIG_FLAG_END_OF_STATE is not reached
- read data_size from packet, read buffer of data_size
- read data_offset from where QEMU should writ
Richard Henderson writes:
> At present we have a potential error in that helper_retaddr contains
> data for handle_cpu_signal, but we have not ensured that those stores
> will be scheduled properly before the operation that may fault.
>
> It might be that these races are not in practice observa
Richard Henderson writes:
> These functions are not used, and are not usable in the
> context of code generation, because we never have a helper
> return address to pass in to them.
>
> Signed-off-by: Richard Henderson
Reviewed-by: Alex Bennée
--
Alex Bennée
Richard Henderson writes:
> This code block is already surrounded by #ifndef CODE_ACCESS.
>
> Signed-off-by: Richard Henderson
Reviewed-by: Alex Bennée
> ---
> include/exec/cpu_ldst_useronly_template.h | 2 --
> 1 file changed, 2 deletions(-)
>
> diff --git a/include/exec/cpu_ldst_useronly
On 7/9/19 12:07 PM, Alex Bennée wrote:
>
> Richard Henderson writes:
>
>> At present we have a potential error in that helper_retaddr contains
>> data for handle_cpu_signal, but we have not ensured that those stores
>> will be scheduled properly before the operation that may fault.
>>
>> It migh
See series: https://lists.gnu.org/archive/html/qemu-
devel/2019-07/msg02189.html
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https://bugs.launchpad.net/bugs/1832353
Title:
cpu_exec: Assertion !have_mmap_lock() failed
Status in
On 7/8/19 8:49 PM, Alistair Francis wrote:
> Add OpenSBI version 0.4 as a git submodule and as a prebult binary.
>
> OpenSBI (https://github.com/riscv/opensbi) aims to provide an open-source
> reference implementation of the RISC-V Supervisor Binary Interface (SBI)
> specifications for platform-sp
* Philippe Mathieu-Daudé (phi...@redhat.com) wrote:
> In the "Read Array Flowchart" the command has a value of 0xFF.
>
> In the document [*] the "Read Array Flowchart", the READ_ARRAY
> command has a value of 0xff.
>
> Use the correct value in the pflash model.
>
> There is no change of behavior
Richard Henderson writes:
> Turn helper_retaddr into a multi-state flag that may now also
> indicate when we're performing a read on behalf of the translator.
> In this case, release the mmap_lock before the longjmp back to
> the main cpu loop, and thereby avoid a failing assert therein.
>
> Fi
Hi Liu, Peter,
On 7/9/19 4:12 AM, Peter Xu wrote:
> On Fri, Jul 05, 2019 at 07:01:36PM +0800, Liu Yi L wrote:
>> +void pci_setup_pasid_ops(PCIDevice *dev, PCIPASIDOps *ops)
>> +{
>> +assert(ops && !dev->pasid_ops);
>> +dev->pasid_ops = ops;
>> +}
>> +
>> +bool pci_device_is_ops_set(PCIBus
Richard Henderson writes:
> On 7/9/19 12:07 PM, Alex Bennée wrote:
>>
>> Richard Henderson writes:
>>
>>> At present we have a potential error in that helper_retaddr contains
>>> data for handle_cpu_signal, but we have not ensured that those stores
>>> will be scheduled properly before the ope
Hi
On Tue, Jul 9, 2019 at 1:02 PM Daniel P. Berrangé wrote:
>
> On Tue, Jul 09, 2019 at 12:26:38PM +0400, Marc-André Lureau wrote:
> > Hi
> >
> > On Mon, Jul 8, 2019 at 8:04 PM Daniel P. Berrangé
> > wrote:
> > > > The D-Bus protocol can be made to work peer-to-peer, but the most
> > > > common
On Mon, 8 Jul 2019 at 17:36, Stefan Berger wrote:
>
> The following changes since commit 506179e42112be77bfd071f050b15762d3b2cd43:
>
> Merge remote-tracking branch 'remotes/dgibson/tags/ppc-for-4.1-20190702'
> into staging (2019-07-02 18:56:44 +0100)
>
> are available in the Git repository at:
Cc'ing Igor & Xiao.
On 7/8/19 11:19 PM, Julio Montes wrote:
> Currently is not possible to use a file that is part of a read-only
> filesystem as memory backend for nvdimm devices, even if this is not modified
> in the guest. In order to improve the security of Virtual Machines that share
> and do
Hi Peter,
On 7/8/19 6:03 PM, Francisco Iglesias wrote:
> Hi Philippe,
>
> On [2019 Jul 08] Mon 16:58:29, Philippe Mathieu-Daudé wrote:
>> Hi Francisco,
>>
>> On 7/8/19 4:26 PM, Francisco Iglesias wrote:
>>> Hi Philippe,
>>>
>>> On [2019 Jul 08] Mon 12:47:50, Philippe Mathieu-Daudé wrote:
Bot
Patchew URL:
https://patchew.org/QEMU/20190709092049.13771-1-richard.hender...@linaro.org/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Message-id: 20190709092049.13771-1-richard.hender...@linaro.org
Subject: [Qemu-devel] [PATCH 0/5] tcg: Fi
* Wolfgang Bumiller (w.bumil...@proxmox.com) wrote:
> While testing with 4.0 we've run into issues with live migration from
> 3.0.1 to 4.0 when a balloon device was involved.
>
> We'd see the following error on the destination:
> qemu-system-x86_64: get_pci_config_device: Bad config data: i=0x10
On Mon, 8 Jul 2019 at 11:48, Philippe Mathieu-Daudé wrote:
>
> In the next commit we will implement the write_with_attrs()
> handler. To avoid using different APIs, convert the read()
> handler first.
>
> Reviewed-by: Francisco Iglesias
> Signed-off-by: Philippe Mathieu-Daudé
> ---
> v4: Do not
On Tue, 9 Jul 2019 at 11:58, Philippe Mathieu-Daudé wrote:
> Are you OK to take this series via your ARM tree?
>
> If so, do you want me to respin fixing the comment and adding Francisco
> tags?
Yes, and yes please.
thanks
-- PMM
I'd like to recommend a few commas.
Denis Plotnikov writes:
> The patch adds some preparation parts for incompatible compression type
> feature to QCOW2 header that indicates that *all* compressed clusters
> must be (de)compressed using a certain compression type.
>
> It is implied that the comp
Your subject matches the one git-revert creates (good), but you don't
have the rest of its commit message:
This reverts commit 3ae0343db69c379beb5750b4ed70794bbed51b85.
Please add that line.
The patch is a clean revert.
Reviewed-by: Markus Armbruster
In the previous commit we fixed a crash when the guest read a
register that pop from an empty FIFO.
By auditing the repository, we found another similar use with
an easy way to reproduce:
$ qemu-system-aarch64 -M xlnx-zcu102 -monitor stdio -S
QEMU 4.0.50 monitor - type 'help' for more informat
Fix a pair of crashes, one is an audit of first one.
Philippe Mathieu-Daudé (3):
hw/ssi/mss-spi: Convert debug printf()s to trace events
hw/ssi/mss-spi: Avoid crash when reading empty RX FIFO
hw/display/xlnx_dp: Avoid crash when reading empty RX FIFO
Makefile.objs| 1 +
hw/display
Signed-off-by: Philippe Mathieu-Daudé
---
Useful while debugging, can be skipped for next dev cycle.
Makefile.objs | 1 +
hw/ssi/mss-spi.c| 23 ++-
hw/ssi/trace-events | 6 ++
3 files changed, 13 insertions(+), 17 deletions(-)
create mode 100644 hw/ssi/trace-
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