Ping.
Can anyone PULL these patches?
Pavel Dovgalyuk
> -Original Message-
> From: Pavel Dovgalyuk [mailto:pavel.dovga...@gmail.com]
> Sent: Monday, April 22, 2019 2:20 PM
> To: qemu-devel@nongnu.org
> Cc: kw...@redhat.com; peter.mayd...@linaro.org; war2jor...@live.com;
> crosthwaite.pe...
On 4/26/19 6:26 PM, Stephen Checkoway wrote:
> Simplify and refactor for upcoming commits. In particular, pull out all
> of the code to modify the status into simple helper functions. Status
> handling becomes more complex once multiple chips are interleaved to
> produce a single device.
>
> No ch
On 2019.05.06 11:20:32 +0800, Zhenyu Wang wrote:
> On 2019.05.05 21:51:02 -0400, Yan Zhao wrote:
> > This feature implements the version attribute for Intel's vGPU mdev
> > devices.
> >
> > version attribute is rw.
> > It's used to check device compatibility for two mdev devices.
> > version strin
On Apr 30, 2019 7:38 PM, "Peter Maydell" wrote:
>
> For most releases in the past five years, I've been handling the
> work of applying pull requests, tagging release candidates, and
> so on. (For one or two releases somebody else has done this when
> I've been off on holiday.) This takes up a fai
Hi Thomas,
On Mon, May 06, 2019 at 08:18:54AM +0200, Thomas Huth wrote:
> Fixes might still get picked up via the qemu-block mailing list,
> so the status is not "Orphan" yet.
> Also add the gluster mailing list as suggested by Niels here:
>
> https://patchwork.kernel.org/patch/10613297/#2240994
On 5/6/19 6:10 AM, Thomas Huth wrote:
> On 05/05/2019 20.07, Philippe Mathieu-Daudé wrote:
>> All these devices do not contain any target-specific code. While
>> most of them are arch-specific, they are shared between different
>> targets of the same arch family (ARM and AArch64, MIPS32/MIPS64,
>>
Philippe Mathieu-Daudé writes:
> When writing a new board, adding device which uses other devices
> (container) or simply refactoring, one can discover the hard way
> his machine misses some devices. In the case of containers, the
> error is not obvious:
>
> $ qemu-system-microblaze -M xlnx-zyn
On 5/6/19 8:18 AM, Thomas Huth wrote:
> Fixes might still get picked up via the qemu-block mailing list,
> so the status is not "Orphan" yet.
> Also add the gluster mailing list as suggested by Niels here:
>
> https://patchwork.kernel.org/patch/10613297/#22409943
>
> Signed-off-by: Thomas Huth
Now that SLOF can update QEMU's device tree at runtime, it makes sense
to be able to dump the resulting dtb, pretty much like it is already
possible to dump the initial dtb with the dumpdtb machine option.
Add a new dumpdtb-slof property to the pseries machine with the same
semantics as dumpdtb, e
On 03.05.19 11:34, Thomas Huth wrote:
> On 29/04/2019 15.09, Jason J. Herne wrote:
>> Newer versions of zipl have the ability to write signature entries to the
>> boot
>> script for secure boot. We don't yet support secure boot, but we need to skip
>> over signature entries while reading the boot
Hi Qiming,
Thanks for submitting the patch!
On 5/6/19 10:50 AM, Hou Qiming wrote:
From 48d1f092a7960d711fb2c77ab8d3f9d0a0ca0d5c Mon Sep 17 00:00:00 2001
From: HQM mailto:hqm03s...@gmail.com>>
Date: Mon, 6 May 2019 15:37:59 +0800
Subject: [PATCH] Precautionary glBindTexture and surface->texture
To remove usages of global smp variables arch by arch,
a bisect friendly way is introduced to initialize struct
CpuTopology with duplicate ones; no semantic changes.
Suggested-by: Igor Mammedov
Suggested-by: Eduardo Habkost
Signed-off-by: Like Xu
---
include/hw/boards.h | 15 +++
v
Following the replace rules, the global smp variables in hppa/mips/openrisc
/sparc*/xtensa are replaced with smp machine properties. No semantic changes.
Signed-off-by: Like Xu
---
hw/alpha/dp264.c | 1 +
hw/hppa/machine.c | 2 ++
hw/mips/boston.c | 2 +-
hw/mips/mip
Following the replace rules, the global smp variables in riscv
are replaced with smp machine properties. No semantic changes.
Signed-off-by: Like Xu
---
hw/riscv/sifive_e.c| 6 --
hw/riscv/sifive_plic.c | 3 +++
hw/riscv/sifive_u.c| 6 --
hw/riscv/spike.c | 2 ++
hw/riscv/v
Following the replace rules, the global smp variables in s390x
are replaced with smp machine properties. No semantic changes.
Signed-off-by: Like Xu
---
hw/s390x/s390-virtio-ccw.c | 3 ++-
hw/s390x/sclp.c| 2 +-
target/s390x/cpu.c | 3 +++
target/s390x/excp_helper.c | 5 +
It's recommended to access smp variables via MachineState
as an incoming parameter. This approach applies on legacy
smbios_*_tables*(), *_machine_reset(), *__hot_add_cpu()
and related *_create_cpu() for later smp variables usages.
Suggested-by: Igor Mammedov
Signed-off-by: Like Xu
---
hw/arm/vi
Basically, the context could get the MachineState reference via call
chains or unrecommend qdev_get_machine() in !CONFIG_USER_ONLY mode.
A new variable of the same name would be introduced in the declaration
phase out of less effort OR replace it on the spot if it's only used
once in the context.
Following the replace rules, the global smp variables in arm
are replaced with smp machine properties. The init_cpus() and
xlnx_zynqmp_create_rpu() are refactored to pass MachineState.
No semantic changes.
Signed-off-by: Like Xu
---
hw/arm/fsl-imx6.c | 6 +-
hw/arm/fsl-imx6ul.c| 6
This patch series make existing cores/threads/sockets into machine
properties and get rid of global smp_* variables they use currently.
The purpose of getting rid of globals is disentangle layer violations and
let's do it one step at a time by replacing the smp_foo with qdev_get_machine()
as few c
Following the replace rules, the global smp variables in ppc
are replaced with smp machine properties. No semantic changes.
Signed-off-by: Like Xu
---
hw/ppc/e500.c | 3 +++
hw/ppc/mac_newworld.c | 3 ++-
hw/ppc/mac_oldworld.c | 3 ++-
hw/ppc/pnv.c | 6 --
hw/ppc/prep.c
Following the replace rules, the global smp variables in i386
are replaced with smp machine properties. To avoid calling qdev_get_machine()
as much as possible, related funtions for acpi data generations including
init_cpus() are refactored to pass MachineState. No semantic changes.
Signed-off-by:
At the end of this smp refactoring series, the global ones are removed
and only smp machine properties are fully applied and enabled.
Signed-off-by: Like Xu
---
vl.c | 53 ++---
1 file changed, 26 insertions(+), 27 deletions(-)
diff --git a/vl.c b
On Sun, May 5, 2019 at 12:43 PM Mark Cave-Ayland
wrote:
>
> On 04/05/2019 22:02, Artyom Tarasenko wrote:
>
> > AIX/PReP does access to the aliased IO registers of 53810.
> > Implement aliasing to make the AIX driver work.
> >
> > Signed-off-by: Artyom Tarasenko
> > ---
> > hw/scsi/lsi53c895a.c |
On Sun, May 5, 2019 at 5:19 PM Philippe Mathieu-Daudé wrote:
>
> Hi Mark, Artyom.
>
> On 5/5/19 12:46 PM, Mark Cave-Ayland wrote:
> > On 04/05/2019 22:02, Artyom Tarasenko wrote:
> >
> >> AIX 5.1 expects the base year to be 1900. Adjust accordingly.
> >>
> >> Signed-off-by: Artyom Tarasenko
> >>
Philippe Mathieu-Daudé writes:
> We already define SDCardModes/SDCardStates as enums. Declare
> the mode/state as enums too, this make gdb debugging sessions
> friendlier: instead of numbers, the mode/state name is displayed.
>
> Signed-off-by: Philippe Mathieu-Daudé
> ---
> hw/sd/sd.c | 6 +++-
Hello,
On Mon, May 06, 2019 at 07:53:45AM +0200, Thomas Huth wrote:
> On 13/02/2019 16.59, Thomas Huth wrote:
> > It's either "GNU *Library* General Public License version 2" or "GNU
> > Lesser General Public License version *2.1*", but there was no "version
> > 2.0" of the "Lesser" license. So as
Since this SRU is rather hard to verify + Christian's suggestion to let
the SRU age a bit longer, I would still wait a few days before
releasing.
Dan (or anyone else involved) - could you maybe perform some safety
checks using this package against the use-cases mentioned in the
regression potentia
Hi Stafford,
On 06/05/2019 11.09, Stafford Horne wrote:
>
> On Mon, May 06, 2019 at 07:53:45AM +0200, Thomas Huth wrote:
>> On 13/02/2019 16.59, Thomas Huth wrote:
>>> It's either "GNU *Library* General Public License version 2" or "GNU
>>> Lesser General Public License version *2.1*", but there
On 02.05.19 16:10, David Hildenbrand wrote:
> Let's return the cc value directly via cpu_env. Unfortunately there
> isn't a simple way to calculate the value lazily - one would have to
> calculate and store e.g. the population count of the mask and the
> result so it can be evaluated in a cc helper
On Fri, May 03, 2019 at 01:21:23PM -0400, Jason Dillaman wrote:
> On Fri, May 3, 2019 at 12:30 PM Stefano Garzarella
> wrote:
> >
> > RBD APIs don't allow us to write more than the size set with
> > rbd_create() or rbd_resize().
> > In order to support growing images (eg. qcow2), we resize the
>
On 29.04.19 15:09, Jason J. Herne wrote:
> Newer versions of zipl have the ability to write signature entries to the boot
> script for secure boot. We don't yet support secure boot, but we need to skip
> over signature entries while reading the boot script in order to maintain our
> ability to boot
On 06.05.19 12:01, David Hildenbrand wrote:
> On 29.04.19 15:09, Jason J. Herne wrote:
>> Newer versions of zipl have the ability to write signature entries to the
>> boot
>> script for secure boot. We don't yet support secure boot, but we need to skip
>> over signature entries while reading the b
On 26/04/2019 18.43, Laszlo Ersek wrote:
> On 04/25/19 08:00, Thomas Huth wrote:
>> On 24/04/2019 23.29, Wainer dos Santos Moschetta wrote:
>>> Hello Thomas,
>>>
>>> On 04/24/2019 07:37 AM, Thomas Huth wrote:
We are going to enable the qemu-iotests during "make check" again,
and for runni
On 06.05.19 12:01, David Hildenbrand wrote:
> On 29.04.19 15:09, Jason J. Herne wrote:
>> Newer versions of zipl have the ability to write signature entries to the
>> boot
>> script for secure boot. We don't yet support secure boot, but we need to skip
>> over signature entries while reading th
On 06/05/2019 12.10, David Hildenbrand wrote:
> On 06.05.19 12:01, David Hildenbrand wrote:
>> On 29.04.19 15:09, Jason J. Herne wrote:
>>> Newer versions of zipl have the ability to write signature entries to the
>>> boot
>>> script for secure boot. We don't yet support secure boot, but we need t
On 06.05.19 12:16, Thomas Huth wrote:
> On 06/05/2019 12.10, David Hildenbrand wrote:
>> On 06.05.19 12:01, David Hildenbrand wrote:
>>> On 29.04.19 15:09, Jason J. Herne wrote:
Newer versions of zipl have the ability to write signature entries to the
boot
script for secure boot.
On Mon, 6 May 2019 12:14:10 +0200
Christian Borntraeger wrote:
> On 06.05.19 12:01, David Hildenbrand wrote:
> > On 29.04.19 15:09, Jason J. Herne wrote:
> >> Newer versions of zipl have the ability to write signature entries to the
> >> boot
> >> script for secure boot. We don't yet support s
On Sat, 20 Apr 2019 19:14:25 +0200
Lukas Straub wrote:
> From: Lukas Straub
> Because event_unhandled_count may be accessed concurrently, it needs
> to be protected by taking the lock. However the assert is outside the
> lock, probably causing it to read garbage and aborting Qemu
> erroneously.
On Mon, 6 May 2019 12:18:42 +0200
Christian Borntraeger wrote:
> On 06.05.19 12:16, Thomas Huth wrote:
> > On 06/05/2019 12.10, David Hildenbrand wrote:
> >> On 06.05.19 12:01, David Hildenbrand wrote:
> >>> On 29.04.19 15:09, Jason J. Herne wrote:
> Newer versions of zipl have the abi
On 06.05.19 12:30, Cornelia Huck wrote:
> On Mon, 6 May 2019 12:14:10 +0200
> Christian Borntraeger wrote:
>
>> On 06.05.19 12:01, David Hildenbrand wrote:
>>> On 29.04.19 15:09, Jason J. Herne wrote:
Newer versions of zipl have the ability to write signature entries to the
boot
>
On 06.05.19 12:34, Cornelia Huck wrote:
> On Mon, 6 May 2019 12:18:42 +0200
> Christian Borntraeger wrote:
>
>> On 06.05.19 12:16, Thomas Huth wrote:
>>> On 06/05/2019 12.10, David Hildenbrand wrote:
On 06.05.19 12:01, David Hildenbrand wrote:
> On 29.04.19 15:09, Jason J. Herne w
On Mon, 6 May 2019 12:46:50 +0200
Christian Borntraeger wrote:
> On 06.05.19 12:34, Cornelia Huck wrote:
> > On Mon, 6 May 2019 12:18:42 +0200
> > Christian Borntraeger wrote:
> >> I think we should not. Those entries might have sematic elements that the
> >> guest
> >> wants to enforce. I do
Cc'ing Paolo & Stefan
On 4/20/19 7:14 PM, Lukas Straub wrote:
> From: Lukas Straub
> Because event_unhandled_count may be accessed concurrently, it needs
> to be protected by taking the lock. However the assert is outside the
> lock, probably causing it to read garbage and aborting Qemu erroneous
On 06.05.19 13:05, Cornelia Huck wrote:
> On Mon, 6 May 2019 12:46:50 +0200
> Christian Borntraeger wrote:
>
>> On 06.05.19 12:34, Cornelia Huck wrote:
>>> On Mon, 6 May 2019 12:18:42 +0200
>>> Christian Borntraeger wrote:
>
I think we should not. Those entries might have sematic elemen
Like Xu writes:
> On 2019/4/18 1:10, Eduardo Habkost wrote:
>> On Wed, Apr 17, 2019 at 07:14:10AM +0200, Markus Armbruster wrote:
>>> Eduardo Habkost writes:
>>>
On Mon, Apr 15, 2019 at 03:59:45PM +0800, Like Xu wrote:
> To avoid the misuse of qdev_get_machine() if machine hasn't been c
Eduardo Habkost writes:
> On Thu, Apr 25, 2019 at 11:12:29AM +0800, Like Xu wrote:
>> On 2019/4/25 1:21, Eduardo Habkost wrote:
> [...]
>> >
>> > I think we all agree that qdev_get_machine() should eventually be
>> > available in softmmu only.
>>
>> I think we need to make it happen to avoid ca
Peter Maydell writes:
> On Thu, 18 Apr 2019 at 21:40, Markus Armbruster wrote:
>>
>> Early pull request because I'll be on vacation when 4.1 opens. Hope
>> that's okay.
>>
>> The following changes since commit eeba63fc7fface36f438bcbc0d3b02e7dcb59983:
>>
>> Update version for v4.0.0-rc4 relea
On 06.05.19 13:23, Cornelia Huck wrote:
> On Mon, 6 May 2019 13:13:55 +0200
> Christian Borntraeger wrote:
>
>> On 06.05.19 13:05, Cornelia Huck wrote:
>>> On Mon, 6 May 2019 12:46:50 +0200
>>> Christian Borntraeger wrote:
>>>
On 06.05.19 12:34, Cornelia Huck wrote:
> On Mon, 6
On Mon, 6 May 2019 13:13:55 +0200
Christian Borntraeger wrote:
> On 06.05.19 13:05, Cornelia Huck wrote:
> > On Mon, 6 May 2019 12:46:50 +0200
> > Christian Borntraeger wrote:
> >
> >> On 06.05.19 12:34, Cornelia Huck wrote:
> >>> On Mon, 6 May 2019 12:18:42 +0200
> >>> Christian Borntraege
Eduardo Habkost writes:
> Instead of requiring every architecture to implement a
> class_by_name function, let them set a format string at
> CPUClass::class_name_format.
>
> This will let us get rid of at least 16 class_by_name functions
> in the next commits.
>
> Signed-off-by: Eduardo Habkost
02.05.2019 12:11, Stefano Garzarella wrote:
> On Tue, Apr 30, 2019 at 10:41:02AM -0500, Eric Blake wrote:
>> On 4/30/19 6:09 AM, Kevin Wolf wrote:
>>> Am 30.04.2019 um 12:03 hat Vladimir Sementsov-Ogievskiy geschrieben:
30.04.2019 12:24, Stefano Garzarella wrote:
> On Tue, Apr 23, 2019 at
On 5/6/19 10:55 AM, Markus Armbruster wrote:
> Philippe Mathieu-Daudé writes:
>
>> We already define SDCardModes/SDCardStates as enums. Declare
>> the mode/state as enums too, this make gdb debugging sessions
>> friendlier: instead of numbers, the mode/state name is displayed.
>>
>> Signed-off-by
Eduardo Habkost writes:
> This series adds a new CPUClass::class_name_format field, which
> allows us to delete 16 of the 21 *_cpu_class_by_name() functions
> that exist today.
Which five remain, and why?
06.05.2019 7:24, Liang Li wrote:
> On Tue, Apr 30, 2019 at 10:35:32AM +, Vladimir Sementsov-Ogievskiy wrote:
>> 28.04.2019 13:01, Liang Li wrote:
>>> If the backup target is a slow device like ceph rbd, the backup
>>> process will affect guest BLK write IO performance seriously,
>>> it's cause
Public bug reported:
Reporting this as present in QEMU 3.1.0, although I don't see any commit
in current git master (a6ae23831b05a11880b40f7d58e332c45a6b04f7) that
would suggest this issue is fixed.
$ uname -a
Linux boole 4.19.0-4-686-pae #1 SMP Debian 4.19.28-2 (2019-03-15) i686
GNU/Lin
On 5/3/19 3:36 PM, Peter Maydell wrote:
> On Tue, 30 Apr 2019 at 05:40, Joel Stanley wrote:
>>
>> v3: Add some commit messages, resend as v2 didn't send properly
>> v2: Minor fixes, added vmstate and reset, and rebased on Cédric's series
>>
>> Based-on: 20190411161013.4514-4-...@kaod.org
>> [PATCH
This patch adds the support of preallocation (off/full) for the RBD
block driver.
If available, we use rbd_writesame() to quickly fill the image when
full preallocation is required.
Signed-off-by: Stefano Garzarella
---
v2:
- Use 4 KiB buffer for rbd_writesame() [Jason]
- Use "rbd_concurrent_mana
>From 48d1f092a7960d711fb2c77ab8d3f9d0a0ca0d5c Mon Sep 17 00:00:00 2001
From: HQM
Date: Mon, 6 May 2019 15:37:59 +0800
Subject: [PATCH] Precautionary glBindTexture and surface->texture validation
in surface_gl_update_texture
In a GVT-g setup with dmabuf and GTK GUI, the current 2D texture at
sur
On 29/04/2019 13:38, Kevin Wolf wrote:
Am 26.04.2019 um 14:24 hat Anton Kuchin geschrieben:
I can't figure out ownership of aio context during bdrv_close().
As far as I understand bdrv_unref() shold be called with acquired aio
context to prevent concurrent operations (at least most usages in bl
On Mon, May 06, 2019 at 12:47:37AM +0200, Philippe Mathieu-Daudé wrote:
> Step in to maintain it, since I have some familiarity with
> the technology.
>
> Signed-off-by: Philippe Mathieu-Daudé
Acked-by: Michael S. Tsirkin
> ---
> MAINTAINERS | 7 +++
> 1 file changed, 7 insertions(+)
>
>
On 5/6/19 4:08 AM, Christian Borntraeger wrote:
On 03.05.19 11:34, Thomas Huth wrote:
On 29/04/2019 15.09, Jason J. Herne wrote:
Newer versions of zipl have the ability to write signature entries to the boot
script for secure boot. We don't yet support secure boot, but we need to skip
over sign
Hello.
This patch series is added Renesas RX target emulation.
It fixed to the comment that I got in the review.
My git repository is bellow.
git://git.pf.osdn.net/gitroot/y/ys/ysato/qemu.git rx-20190505
Testing binaries bellow.
u-boot
Download - https://osdn.net/users/ysato/pf/qemu/dl/u-boot.bi
Signed-off-by: Yoshinori Sato
---
target/rx/gdbstub.c | 112
target/rx/monitor.c | 38
target/rx/Makefile.objs | 12 ++
3 files changed, 162 insertions(+)
create mode 100644 target/rx/gdbstub.c
create mode 100644 ta
Some RX peripheral using 8bit and 16bit registers.
Added 8bit and 16bit APIs.
Signed-off-by: Yoshinori Sato
---
include/hw/registerfields.h | 32 +++-
1 file changed, 31 insertions(+), 1 deletion(-)
diff --git a/include/hw/registerfields.h b/include/hw/registerfields
This module supported only non FIFO type.
Hardware manual.
https://www.renesas.com/us/en/doc/products/mpumcu/doc/rx_family/r01uh0033ej0140_rx62n.pdf
Signed-off-by: Yoshinori Sato
---
include/hw/char/renesas_sci.h | 45 ++
hw/char/renesas_sci.c | 340 +
Signed-off-by: Yoshinori Sato
---
include/qemu/bitops.h | 38 ++
1 file changed, 38 insertions(+)
diff --git a/include/qemu/bitops.h b/include/qemu/bitops.h
index 3f0926cf40..0dfd81efb2 100644
--- a/include/qemu/bitops.h
+++ b/include/qemu/bitops.h
@@ -301,6 +
Signed-off-by: Yoshinori Sato
---
configure | 8
default-configs/rx-softmmu.mak | 7 +++
include/sysemu/arch_init.h | 1 +
arch_init.c| 2 ++
hw/Kconfig | 1 +
5 files changed, 19 insertions(+)
create mode 100644 defau
This implementation supported only ICUa.
Hardware manual.
https://www.renesas.com/us/en/doc/products/mpumcu/doc/rx_family/r01uh0033ej0140_rx62n.pdf
Signed-off-by: Yoshinori Sato
---
include/hw/intc/rx_icu.h | 49 +++
hw/intc/rx_icu.c | 375 +++
Signed-off-by: Yoshinori Sato
---
target/rx/helper.h| 31
target/rx/helper.c| 148
target/rx/op_helper.c | 481 ++
3 files changed, 660 insertions(+)
create mode 100644 target/rx/helper.h
create mode 100644 target/rx
renesas_tmr: 8bit timer modules.
renesas_cmt: 16bit compare match timer modules.
This part use many renesas's CPU.
Hardware manual.
https://www.renesas.com/us/en/doc/products/mpumcu/doc/rx_family/r01uh0033ej0140_rx62n.pdf
Signed-off-by: Yoshinori Sato
---
include/hw/timer/renesas_cmt.h | 33 +++
Signed-off-by: Yoshinori Sato
---
target/rx/cpu-qom.h | 52
target/rx/cpu.h | 196 ++
target/rx/cpu.c | 222
3 files changed, 470 insertions(+)
create mode 100644 target/rx/cpu-
Signed-off-by: Yoshinori Sato
---
include/disas/dis-asm.h |5 +
target/rx/disas.c | 1480 +++
2 files changed, 1485 insertions(+)
create mode 100644 target/rx/disas.c
diff --git a/include/disas/dis-asm.h b/include/disas/dis-asm.h
index 9240e
Stefano Garzarella writes:
> net_client_init() uses a variable length array to store the prefix
> of 'ipv6-net' parameter (e.g. if ipv6-net=fec0::0/64, the prefix
> is 'fec0::0').
> Since the IPv6 prefix can be at most as long as an IPv6 address,
> we can use an array with fixed size equals to IN
Signed-off-by: Yoshinori Sato
---
MAINTAINERS | 19 +++
1 file changed, 19 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 7dd71e0a2d..e9430b6c0b 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -272,6 +272,13 @@ F: include/hw/riscv/
F: linux-user/host/riscv32/
F: linux
This part only supported RXv1 instructions.
Instruction manual.
https://www.renesas.com/us/en/doc/products/mpumcu/doc/rx_family/r01us0032ej0120_rxsm.pdf
Signed-off-by: Yoshinori Sato
---
target/rx/translate.c | 2432
target/rx/insns.decode | 617
rx62n - RX62N cpu.
rxqemu - QEMU virtual target.
Signed-off-by: Yoshinori Sato
---
include/hw/rx/rx.h| 7 ++
include/hw/rx/rx62n.h | 54
hw/rx/rx62n.c | 240 ++
hw/rx/rxqemu.c| 100 +
hw/rx/Kc
On 5/5/19 1:51 PM, Yuval Shaia wrote:
> This is a trivial cleanup patch.
>
> Signed-off-by: Yuval Shaia
> ---
> hw/rdma/rdma_backend.c | 7 ---
> 1 file changed, 7 deletions(-)
>
> diff --git a/hw/rdma/rdma_backend.c b/hw/rdma/rdma_backend.c
> index d1660b6474..05f6b03221 100644
> --- a/
Am 06.05.2019 um 14:47 hat Anton Kuchin geschrieben:
> On 29/04/2019 13:38, Kevin Wolf wrote:
> > Am 26.04.2019 um 14:24 hat Anton Kuchin geschrieben:
> > > I can't figure out ownership of aio context during bdrv_close().
> > >
> > > As far as I understand bdrv_unref() shold be called with acquire
On 05/04/19 15:35, Philippe Mathieu-Daudé wrote:
> In commit 1cab464136b4 we incorrectly described the
> EDK2_BASETOOLS_OPTFLAGS can pass CPPFLAGS and CFLAGS
> options to the EDK2 build tools, but it only expands
> the CFLAGS (not to the CPPFLAGS).
> Update the description to be more accurate.
>
>
On 05/04/19 15:35, Philippe Mathieu-Daudé wrote:
> Signed-off-by: Philippe Mathieu-Daudé
> ---
> roms/Makefile | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/roms/Makefile b/roms/Makefile
> index f020102c866..1a6c2fa76f9 100644
> --- a/roms/Makefile
> +++ b/roms/Makefile
> @@ -62,6 +
Eduardo Habkost writes:
> Python 2 will reach end of life in January 1 2020. Declare it as
> deprecated.
>
> Signed-off-by: Eduardo Habkost
> ---
> configure| 8
> qemu-deprecated.texi | 8
> 2 files changed, 16 insertions(+)
>
> diff --git a/configure b/configure
On 5/6/19 4:04 PM, Laszlo Ersek wrote:
> On 05/04/19 15:35, Philippe Mathieu-Daudé wrote:
>> In commit 1cab464136b4 we incorrectly described the
>> EDK2_BASETOOLS_OPTFLAGS can pass CPPFLAGS and CFLAGS
>> options to the EDK2 build tools, but it only expands
>> the CFLAGS (not to the CPPFLAGS).
>> Up
Hi,
Two trivial patches waiting Laszlo's series to land.
Since v2:
- removed duplicated space chars (Laszlo)
- added Laszlo's R-b tag
Since v1:
- rebased
v2:
https://lists.gnu.org/archive/html/qemu-devel/2019-05/msg00853.html
v1:
https://lists.gnu.org/archive/html/qemu-devel/2019-04/msg01589.ht
In commit 1cab464136b4 we incorrectly described the
EDK2_BASETOOLS_OPTFLAGS can pass CPPFLAGS and CFLAGS
options to the EDK2 build tools, but it only expands
the CFLAGS (not to the CPPFLAGS).
Update the description to be more accurate.
Reported-by: Laszlo Ersek
Reviewed-by: Laszlo Ersek
Signed-o
Hello,
Here is a series adding a couple of cleanups to the Aspeed SoCs to
prepare ground for extensions and new SoCs.
Thanks,
C.
Changes since v1:
- moved enum defining the Aspeed controller names under aspeed_soc.h
- removed AspeedSoCInfo 'sdram_base' field
- fixed clang compilation
Cédri
Reviewed-by: Laszlo Ersek
Signed-off-by: Philippe Mathieu-Daudé
---
roms/Makefile | 2 ++
1 file changed, 2 insertions(+)
diff --git a/roms/Makefile b/roms/Makefile
index ea6aec56abd..078d3fb7056 100644
--- a/roms/Makefile
+++ b/roms/Makefile
@@ -62,6 +62,8 @@ default:
@echo " u-boot.e
This will simplify the definition of new SoCs, like the AST2600 which
should use a different CPU and a different IRQ number layout.
Signed-off-by: Cédric Le Goater
---
Changes since v1:
- moved enum defining the Aspeed controller names under aspeed_soc.h
include/hw/arm/aspeed_soc.h | 37 ++
This will simplify the definition of new SoCs, like the AST2600 which
should use a slightly different address space and have a different set
of controllers.
Signed-off-by: Cédric Le Goater
---
Changes since v1:
- removed AspeedSoCInfo 'sdram_base' field
- fixed clang compilation
include/hw/
Signed-off-by: Cédric Le Goater
---
hw/arm/aspeed_soc.c | 50 ++---
1 file changed, 20 insertions(+), 30 deletions(-)
diff --git a/hw/arm/aspeed_soc.c b/hw/arm/aspeed_soc.c
index bd83618ceba9..4b705afd096a 100644
--- a/hw/arm/aspeed_soc.c
+++ b/hw/arm/aspe
Use thread_pool_submit_co, instead of reinventing it here. Note, that
thread_pool_submit_aio() never returns NULL, so checking it was an
extra thing.
Signed-off-by: Vladimir Sementsov-Ogievskiy
Reviewed-by: Alberto Garcia
Reviewed-by: Max Reitz
---
block/qcow2-threads.c | 17 ++---
Drop dependence on AioContext lock.
Signed-off-by: Vladimir Sementsov-Ogievskiy
Reviewed-by: Alberto Garcia
Reviewed-by: Paolo Bonzini
Reviewed-by: Max Reitz
---
block/qcow2-threads.c | 10 +++---
1 file changed, 7 insertions(+), 3 deletions(-)
diff --git a/block/qcow2-threads.c b/block/
On 06/05/2019 09:42, Artyom Tarasenko wrote:
> On Sun, May 5, 2019 at 12:43 PM Mark Cave-Ayland
> wrote:
>>
>> On 04/05/2019 22:02, Artyom Tarasenko wrote:
>>
>>> AIX/PReP does access to the aliased IO registers of 53810.
>>> Implement aliasing to make the AIX driver work.
>>>
>>> Signed-off-by:
qcow2.h depends on block_int.h. Compilation isn't broken currently only
due to block_int.h always included before qcow2.h. Though, it seems
better to directly include block_int.h in qcow2.h.
Signed-off-by: Vladimir Sementsov-Ogievskiy
Reviewed-by: Alberto Garcia
Reviewed-by: Max Reitz
---
bloc
Move generic part out of qcow2_co_do_compress, to reuse it for
encryption and rename things that would be shared with encryption path.
Signed-off-by: Vladimir Sementsov-Ogievskiy
Reviewed-by: Alberto Garcia
Reviewed-by: Max Reitz
---
block/qcow2.h | 4 ++--
block/qcow2-threads.c | 47
Encryption will be done in threads, to take benefit of it, we should
move it out of the lock first.
Signed-off-by: Vladimir Sementsov-Ogievskiy
Reviewed-by: Alberto Garcia
Reviewed-by: Max Reitz
---
block/qcow2.c | 35 +--
1 file changed, 21 insertions(+), 14 de
v6:
- Rebase on master, so 02 changed to reflect changes in
qcow2_compress(), keep r-b.
- Rewrite 06 to even simpler locking [Max], drop r-b
Drop following
"qcow2: qcow2_co_preadv: skip using hd_qiov when possible", I'll do
it in my other coming soon series, and it is actually unrelat
Background: decryption will be done in threads, to take benefit of it,
we should move it out of the lock first.
But let's go further: it turns out, that only
qcow2_get_cluster_offset() needs locking, so reduce locking to it.
Signed-off-by: Vladimir Sementsov-Ogievskiy
---
block/qcow2.c | 12 ++-
Do encryption/decryption in threads, like it is already done for
compression. This improves asynchronous encrypted io.
Signed-off-by: Vladimir Sementsov-Ogievskiy
Reviewed-by: Alberto Garcia
Reviewed-by: Max Reitz
---
block/qcow2.h | 8 ++
block/qcow2-cluster.c | 7 ++---
block/q
Move compression-on-threads to separate file. Encryption will be in it
too.
Signed-off-by: Vladimir Sementsov-Ogievskiy
Reviewed-by: Alberto Garcia
Reviewed-by: Max Reitz
---
block/qcow2.h | 7 ++
block/qcow2-threads.c | 201 ++
block/qcow2.c
Eduardo Habkost writes:
> This series moves some qdev code outside qdev.o, so it can be
> compiled only in CONFIG_SOFTMMU.
>
> The code being moved includes two qdev_get_machine() calls, so
> this will make it easier to move qdev_get_machine() to
> CONFIG_SOFTMMU later.
>
> After this series, the
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