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=== TEST S
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=== TEST SCRIP
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=== TEST SCRIPT BEGIN ===
#!
在 2019/2/1 下午11:03, Markus Armbruster 写道:
Cc: Paolo for preexisting issues due to commit 1e356fc14be.
Fei Li writes:
From: Fei Li
Supplement the error handling for touch_all_pages: add an Error
parameter for it to propagate the error to its caller to do the
handling in case it fails.
Cc:
Only slirp actually needs it, and will need it along in libslirp.
Signed-off-by: Samuel Thibault
---
include/glib-compat.h | 57 ---
slirp/misc.c | 57 +++
2 files changed, 57 insertions(+), 57 deletions(-)
Patchew URL: https://patchew.org/QEMU/20190201123100.27419-1-kra...@redhat.com/
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=== TEST SCRIPT BEGIN ===
#!
Patchew URL:
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=== TEST SCRIPT BEGI
Patchew URL: https://patchew.org/QEMU/20190201163518.31157-1-kw...@redhat.com/
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=== TEST SCRIPT BEGIN ===
#!/
Patchew URL:
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=
Patchew URL:
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=== TEST SCRIPT BEGI
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=== TEST SCRIPT BEGIN =
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=== TEST SCRIPT BEGIN
Hello Mark,
I have a question about improving speed manually unrolling loops like this
Assuming ARRAY_SIZE(r->u8) is always multiple of 4 you can manually improve
loop in this way, on modern CPU non sequential instructions can be computed
nearly for free:
> {
> int i, j = (sh & 0xf);
>
> -
Patchew URL:
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=== TEST SCRIPT BEG
Patchew URL: https://patchew.org/QEMU/20190201185358.6972-1-ppan...@redhat.com/
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=== TEST SCRIPT BEGIN ===
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=== TEST SCRIPT BEGIN ===
#!
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=== TEST SCRIPT
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=== TEST SCRIPT BEGIN ===
Patchew URL: https://patchew.org/QEMU/20190201193234.20796-1-ebl...@redhat.com/
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=== TEST SCRIPT BEGIN ===
#!
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=== TEST SCRIPT BEGIN ===
#!/bi
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=== TEST SCRIPT BEGIN ===
#!/
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=== TEST SCRIPT BEGIN ===
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=== TEST SCRIPT BEGIN ===
#!/
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=== TEST SCRIPT
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=== TEST SCRIPT
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=== TEST SCRIPT BEGIN ===
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#!/bin/ba
On 2/2/19 12:27 AM, Laszlo Ersek wrote:
> On 02/02/19 00:03, Philippe Mathieu-Daudé wrote:
>> On 2/1/19 11:35 PM, Laszlo Ersek wrote:
>>> On 01/31/19 19:55, Laszlo Ersek wrote:
[...]
>>> (f) So, the solution is to prefix the "./build.sh" recipe with a "+"
>>> sign, to mark it as "recursive":
>>>
>>
We have had SMP support in TCG for quite a while; remove
the reference to a necessary in-kernel accelerator.
Note that I was tempted to enumerate here the MTTCG-compatible
ISAs, but I decided against it because (1) most popular target ISAs
have been converted, and (2) I doubt we'd do a good job in
Boston is built around a Xilinx FPGA, which includes a PCIe root port
and an UART. An Intel EG20T PCH connects the I/O peripherals, but only
the SATA bus is emulated.
Signed-off-by: Philippe Mathieu-Daudé
---
default-configs/mips64el-softmmu.mak | 5 -
hw/mips/Kconfig |
Express the MIPS machine dependencies with Kconfig.
Due to the complexity of the PIIX codebase being shared with
the X86 machines, the Malta board fill follow in a different
series (after some refactor cleanup).
Regards,
Phil.
Based on "Kconfig dependencies for ppc machines" from Thomas
Huth (w
The MIPSsim machine only emulates an 8250 UART and a simple network
controller, connected via an ISA bus.
Signed-off-by: Philippe Mathieu-Daudé
---
default-configs/mips-softmmu-common.mak | 2 --
hw/mips/Kconfig | 3 +++
2 files changed, 3 insertions(+), 2 deletions(-)
d
This platform use standard PC devices connected to an ISA bus.
Networking is provided by a ne2000 chipset.
Signed-off-by: Philippe Mathieu-Daudé
---
default-configs/mips-softmmu-common.mak | 1 -
hw/mips/Kconfig | 10 ++
2 files changed, 10 insertions(+), 1 delet
The Jazz use the RC4030 Asic to provide an EISA bus and DMA/IRQ. The
framebuffer display is managed by a G364, the network card is a Sonic
DP83932. A QLogic ESP216 provides a SCSI bus.
Signed-off-by: Philippe Mathieu-Daudé
---
default-configs/mips-softmmu-common.mak | 1 -
default-configs/mips6
The Loongson 2E uses a Bonito64 system controller as North Bridge and a
VT82C686 chipset as South Bridge. The network card chipset is a RTL8139D.
Signed-off-by: Philippe Mathieu-Daudé
---
default-configs/mips64el-softmmu.mak | 4
hw/isa/Kconfig | 13 +
hw/
Ease the kconfig selection by introducing CONFIG_PCI_BONITO to select
the Bonito North Bridge. Select it for the Loongson 2E machine.
Signed-off-by: Philippe Mathieu-Daudé
---
default-configs/mips64el-softmmu.mak | 1 +
hw/pci-host/Kconfig | 4
hw/pci-host/Makefile.objs
On Sun, Feb 3, 2019 at 11:07 PM Philippe Mathieu-Daudé
wrote:
>
> Express the MIPS machine dependencies with Kconfig.
I forgot this serie misses a rule such "depends of MIPS64".
Asked here: https://lists.gnu.org/archive/html/qemu-devel/2019-02/msg00064.html
On 17/01/2019 13:51, Alexey Kardashevskiy wrote:
> This is for passing through NVIDIA V100 GPUs on POWER9 systems.
>
> This implements a subdriver for NVIDIA V100 GPU with coherent memory and
> NPU/ATS support available in the POWER9 CPU.
>
> 1/3 is not strictly related but since new memory al
On Wed, Jan 30, 2019 at 02:36:39PM +0100, Thomas Huth wrote:
> The cirrus VGA card has been enabled in the PPC builds with
> commit 29f9cef39eb1ae55e82c ("ppc: Include vga cirrus card into
> the compiling process") last year. It also works on the pseries
> machine, even SLOF contains support for th
On Wed, Jan 30, 2019 at 09:36:03PM -0200, Murilo Opsfelder Araujo wrote:
> The first patch unfolds parts of qemu_ram_mmap() to make it clearer.
> No changes in the function behaviour.
>
> The second one fixes the alignment of the length given to munmap().
>
> I am pretty sure there is room for im
On Sat, Feb 02, 2019 at 12:23:58AM +0530, P J P wrote:
> From: Prasad J Pandit
>
> On ppc hosts, hypervisor shares following system attributes
>
> - /proc/device-tree/system-id
> - /proc/device-tree/model
>
> with a guest. This could lead to information leakage and misuse.[*]
> Add machine
On 01/02/2019 23:01, Fabiano Rosas wrote:
> Alexey Kardashevskiy writes:
>
>> On 01/02/2019 08:57, Fabiano Rosas wrote:
>>> Alexey Kardashevskiy writes:
>>>
On 31/01/2019 03:30, Fabiano Rosas wrote:
> Alexey Kardashevskiy writes:
>
>>
>> but this is a register which does
On Fri, Feb 01, 2019 at 06:18:52PM +0100, Stefano Garzarella wrote:
> On Fri, Feb 1, 2019 at 4:17 PM Michael S. Tsirkin wrote:
> > On Thu, Jan 31, 2019 at 04:19:11PM +0100, Stefano Garzarella wrote:
> > > In order to avoid migration issues, we enable DISCARD and
> > > WRITE ZEROES features only fo
Patchew URL: https://patchew.org/QEMU/20190203204950.8447-1-c...@braap.org/
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=== TEST SCRIPT BEGIN ===
#!/bin
This update switched structures from __u64 to uint64_t.
Accordingly, need to print with PRIx64.
Signed-off-by: Michael S. Tsirkin
---
contrib/libvhost-user/libvhost-user.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/contrib/libvhost-user/libvhost-user.c
b/contrib
Signed-off-by: Richard Henderson
---
target/arm/cpu.h | 10 +
target/arm/helper.h| 2 +
target/arm/cpu.c | 1 +
target/arm/cpu64.c | 2 +
target/arm/op_helper.c | 91 ++
target/arm/translate-a64.c | 26 +++
Rather than a complex set of cases testing for writeback,
adjust DP after performing the operation.
Signed-off-by: Richard Henderson
---
target/arm/translate.c | 32
1 file changed, 16 insertions(+), 16 deletions(-)
diff --git a/target/arm/translate.c b/target/a
For opcodes 0-5, move some if conditions into the structure
of a switch statement. For opcodes 6 & 7, decode everything
at once with a second switch.
Signed-off-by: Richard Henderson
---
target/arm/translate-a64.c | 94 --
1 file changed, 49 insertions(+), 45
Hi, i compiled qemu on win10 by the newest msys64+mingw64, but they can't run
with no print errors, can you help me?
I tried add "--disable-stack-protector ", then qemu-img.exe can works, but
qemu-system-arm.exe still can't work and no stderr.txt or stdout.txt generated.
my configure opti
Two cleanups to surrounding code preceed the actual implementation.
I did not find the ARM FPToFixedJS pseudo-function particularly helpful,
so I mostly cribed off of the Alpha cvttq implementation. But I think
it all makes sense -- convert, produce the mod 2^32 result with NaN
getting INT32_MAX,
Patchew URL: https://patchew.org/QEMU/20190204045543.21238-1-...@redhat.com/
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=== TEST SCRIPT BEGIN ===
#!/bi
Are you sure this happens with both virtio-blk and virtio-scsi?
The following patch adds more debug output. You can build as follows:
$ git clone https://git.qemu.org/git/qemu.git
$ cd qemu
$ patch apply -p1
...paste the patch here...
^D
# For info on build dependencies see https://
On Sun, Feb 03, 2019 at 03:49:50PM -0500, Emilio G. Cota wrote:
> We have had SMP support in TCG for quite a while; remove
> the reference to a necessary in-kernel accelerator.
>
> Note that I was tempted to enumerate here the MTTCG-compatible
> ISAs, but I decided against it because (1) most popu
On Fri, Feb 01, 2019 at 05:36:55PM +, Peter Maydell wrote:
> Update the copyright string we use in version/help output,
> since we're well into the new year now.
>
> Signed-off-by: Peter Maydell
> ---
> Better than last year, where we didn't get round to doing
> the year bump until September
+-- On Mon, 4 Feb 2019, David Gibson wrote --+
| I'm wondering if we can just ditch them entirely, or at least make
| them default to not present without regard to machine version.
Ie. make the default behaviour host-serial/host-model=NULL/none, instead of
'passthrough' now?
Thank you.
--
Prasad
On Mon, Feb 04, 2019 at 11:40:46AM +0530, P J P wrote:
> +-- On Mon, 4 Feb 2019, David Gibson wrote --+
> | I'm wondering if we can just ditch them entirely, or at least make
> | them default to not present without regard to machine version.
>
> Ie. make the default behaviour host-serial/host-mode
+-- On Mon, 4 Feb 2019, David Gibson wrote --+
| On Mon, Feb 04, 2019 at 11:40:46AM +0530, P J P wrote:
| > Ie. make the default behaviour host-serial/host-model=NULL/none, instead of
| > 'passthrough' now?
|
| Yes.
|
Okay, I'll send a revised patch. Thank you.
--
Prasad J Pandit / Red Hat Produ
I can test again with qemu 3.1 but with previous versions yes, it was happening
the same with both virtio-blk and virtio-scsi.
For 3.1 I can confirm it happens for virtio-scsi (already tested it) and I can
test with virtio-blk again if that will add value to the investigation.
Also I'm attaching
01.02.2019 20:14, Kevin Wolf wrote:
> Am 31.01.2019 um 14:46 hat Andrey Shinkevich geschrieben:
>> A new test file 239 added to the qemu-iotests set. It checks
>> the output format of 'qemu-img info' for bitmaps extension of
>> qcow2 specific information.
>>
>> Signed-off-by: Andrey Shinkevich
>
01.02.2019 21:39, Markus Armbruster wrote:
> Andrey Shinkevich writes:
>
>> In the 'Format specific information' section of the 'qemu-img info'
>> command output, the supplemental information about existing QCOW2
>> bitmaps will be shown, such as a bitmap name, flags and granularity:
>>
>> image:
It's either "GNU *Library* General Public License version 2" or "GNU
Lesser General Public License version *2.1*", but there was no "version
2.0" of the "Lesser" license. So assume that version 2.1 is meant here.
Also the files mentioned the GPL instead of the LGPL after declaring
that the files ar
How can userspace applications query the size of devdax character
devices?
stat(1) doesn't know how large the device is:
# stat /dev/dax0.0
File: /dev/dax0.0
Size: 0 Blocks: 0 IO Block: 4096 character special
file
Device: 6h/6d Inode: 56764 Links: 1 D
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