From: Aleksandar Markovic
Add ability to redirect mails (sent to qemu-devel) containing
"mips" in the subject line to MIPS maintainers and reviewers.
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Aleksandar Markovic
---
MAINTAINERS | 1 +
1 file changed, 1 insertion(+)
diff --git a/MAIN
From: Stefan Weil
Use POSIX types and format strings.
Reviewed-by: Aleksandar Markovic
Signed-off-by: Aleksandar Markovic
Signed-off-by: Stefan Weil
---
disas/nanomips.cpp | 20
disas/nanomips.h | 10 +-
2 files changed, 17 insertions(+), 13 deletions(-)
diff
From: Fredrik Noring
The three-operand MADD and MADDU are specific to R5900 cores.
Reviewed-by: Aleksandar Markovic
Signed-off-by: Aleksandar Markovic
Signed-off-by: Fredrik Noring
---
target/mips/translate.c | 12 +---
1 file changed, 9 insertions(+), 3 deletions(-)
diff --git a/ta
From: Aleksandar Markovic
Reorder items alphabetically for better visibility.
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Aleksandar Markovic
---
MAINTAINERS | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/MAINTAINERS b/MAINTAINERS
index bf82eb3..39fb1ae
From: Paul Burton
ATOMIC_REG_SIZE is currently defined as the default sizeof(void *) for
all MIPS host builds, including those using the n32 ABI. n32 is the
MIPS64 ILP32 ABI and as such tcg/mips/tcg-target.h defines
TCG_TARGET_REG_BITS as 64 for n32 builds. If we attempt to build QEMU
for an n32
From: Aleksandar Markovic
Improve textual description of MXU extension. These are mostly
comment formatting changes.
Reviewed-by: Stefan Markovic
Signed-off-by: Aleksandar Markovic
---
target/mips/translate.c | 74 +
1 file changed, 44 insertion
From: Philippe Mathieu-Daudé
The three-operand MADD and MADDU are specific to Sony R5900 core,
and Toshiba TX19/TX39/TX79 cores as well.
The "32-Bit TX System RISC TX39 Family Architecture manual"
is available at https://wiki.qemu.org/File:DSAE0022432.pdf
Reviewed-by: Aleksandar Markovic
Signe
From: Aleksandar Markovic
Add generic naming involving generig suffixes OPTN0, OPTN1, OPTN2,
OPTN3 for four optn2 constants. Existing suffixes WW, LW, HW, XW
are not quite appropriate for some instructions using optn2.
Reviewed-by: Stefan Markovic
Signed-off-by: Aleksandar Markovic
---
target
From: Aleksandar Markovic
Add missing opcodes and decoding engine for LXB, LXH, LXW, LXBU,
and LXHU instructions. They were for some reason forgotten in
previous commits. The MXU opcode list and decoding engine should
be now complete.
Reviewed-by: Stefan Markovic
Signed-off-by: Aleksandar Marko
From: Aleksandar Markovic
Some functions were not used at all. Compiler doesn't complain
since they are class memebers. Remove them - no future usage is
planned.
Reviewed-by: Aleksandar Rikalo
Reviewed-by: Stefan Markovic
Signed-off-by: Aleksandar Markovic
---
disas/nanomips.cpp | 208 --
From: Aleksandar Markovic
Add following files as maintained within the main MIPS target
section in MAINTAINERS:
default-configs/mips64el-linux-user.mak
default-configs/mips64-linux-user.mak
default-configs/mipsn32el-linux-user.mak
default-configs/mipsn32-linux-user.mak
default-configs/mipsel-lin
From: Aleksandar Markovic
Comment the decoder of 'gpr3.src.store' gpr encoding type in nanoMIPS
disassembler.
Reviewed-by: Aleksandar Rikalo
Signed-off-by: Aleksandar Markovic
---
disas/nanomips.cpp | 32
1 file changed, 32 insertions(+)
diff --git a/disas/na
From: Aleksandar Markovic
Add Aleksandar Rikalo as a reviewer for MIPS content. Aleksandar
brings to us more than six years of experience in working on a variety
of development tools for MIPS architectures, and will greatly help
QEMU community understand and support intricacies of MIPS better.
A
From: Aleksandar Markovic
Comment the decoder of 'gpr3' gpr encoding type in nanoMIPS
disassembler.
Reviewed-by: Aleksandar Rikalo
Signed-off-by: Aleksandar Markovic
---
disas/nanomips.cpp | 51 ---
1 file changed, 48 insertions(+), 3 deletions(
From: Aleksandar Markovic
The following changes since commit 9b2e891ec5ccdb4a7d583b77988848282606fdea:
Merge remote-tracking branch 'remotes/marcel/tags/rdma-pull-request' into
staging (2018-12-22 11:25:31 +)
are available in the git repository at:
https://github.com/AMarkovic/qemu ta
From: Aleksandar Markovic
Fix several mistakes in preambles of nanomips disassembler source
files.
Reviewed-by: Aleksandar Rikalo
Reviewed-by: Stefan Markovic
Signed-off-by: Aleksandar Markovic
---
disas/nanomips.cpp | 7 ---
disas/nanomips.h | 7 ---
2 files changed, 8 insertions(
From: Aleksandar Markovic
Rename the decoder of 'gpr4' gpr encoding type in nanoMIPS
disassembler.
Reviewed-by: Aleksandar Rikalo
Signed-off-by: Aleksandar Markovic
---
disas/nanomips.cpp | 20 ++--
disas/nanomips.h | 2 +-
2 files changed, 11 insertions(+), 11 deletions(-)
From: Fredrik Noring
Test R5900 three-operand MADD.
Reviewed-by: Aleksandar Markovic
Signed-off-by: Aleksandar Markovic
Signed-off-by: Fredrik Noring
---
tests/tcg/mips/mipsr5900/Makefile | 1 +
tests/tcg/mips/mipsr5900/madd.c | 45 +++
2 files changed,
From: Aleksandar Markovic
Fix wrong function name. The convention in these files is that names of
extraction functions should reflect bit patterns they are extracting.
Reviewed-by: Aleksandar Rikalo
Reviewed-by: Stefan Markovic
Signed-off-by: Aleksandar Markovic
---
disas/nanomips.cpp | 264
From: Aleksandar Markovic
Rename the decoder of 'gpr4.zero' gpr encoding type in nanoMIPS
disassembler.
Reviewed-by: Aleksandar Rikalo
Signed-off-by: Aleksandar Markovic
---
disas/nanomips.cpp | 10 +-
disas/nanomips.h | 2 +-
2 files changed, 6 insertions(+), 6 deletions(-)
diff
From: Aleksandar Markovic
Rename the decoder of 'gpr3.src.store' gpr encoding type in nanoMIPS
disassembler.
Reviewed-by: Aleksandar Rikalo
Signed-off-by: Aleksandar Markovic
---
disas/nanomips.cpp | 10 +-
disas/nanomips.h | 2 +-
2 files changed, 6 insertions(+), 6 deletions(-)
From: Aleksandar Markovic
Fix order of extraction function invocations so that extraction
goes from MSB side to LSB side of the given instruction coding
content. This is desireable because of consistency and easier
visual spotting of errors.
After this patch, all such invocations should be in th
From: Aleksandar Markovic
Comment the decoder of 'gpr4' gpr encoding type in nanoMIPS
disassembler.
Reviewed-by: Aleksandar Rikalo
Signed-off-by: Aleksandar Markovic
---
disas/nanomips.cpp | 26 ++
1 file changed, 26 insertions(+)
diff --git a/disas/nanomips.cpp b/dis
From: Aleksandar Markovic
Rename NMD::extract_fd_10_9_8_7_6(uint64 instruction) to
NMD::extract_fd_15_14_13_12_11(uint64 instruction).
Reviewed-by: Aleksandar Rikalo
Signed-off-by: Aleksandar Markovic
---
disas/nanomips.cpp | 142 ++---
disas/na
From: Aleksandar Markovic
Rename more functions that have names that are hard to understand.
Reviewed-by: Aleksandar Rikalo
Signed-off-by: Aleksandar Markovic
---
disas/nanomips.cpp | 212 ++---
disas/nanomips.h | 28 +++
2 files changed,
From: Aleksandar Markovic
Rename NMD::extract_ft_20_19_18_17_16(uint64 instruction) to
NMD::extract_ft_25_24_23_22_21(uint64 instruction).
Reviewed-by: Aleksandar Rikalo
Signed-off-by: Aleksandar Markovic
---
disas/nanomips.cpp | 258 ++---
disa
From: Aleksandar Markovic
Rename the decoder of 'gpr3' gpr encoding type in nanoMIPS
disassembler.
Reviewed-by: Aleksandar Rikalo
Signed-off-by: Aleksandar Markovic
---
disas/nanomips.cpp | 96 +++---
disas/nanomips.h | 2 +-
2 files changed,
From: Aleksandar Markovic
Rename some functions that have names that are hard to understand.
Reviewed-by: Aleksandar Rikalo
Reviewed-by: Stefan Markovic
Signed-off-by: Aleksandar Markovic
---
disas/nanomips.cpp | 112 ++---
disas/nanomips.h |
From: Aleksandar Markovic
Rename NMD::extract_fs_15_14_13_12_11(uint64 instruction) to
NMD::extract_fs_20_19_18_17_16(uint64 instruction).
Reviewed-by: Aleksandar Rikalo
Signed-off-by: Aleksandar Markovic
---
disas/nanomips.cpp | 242 ++---
disa
From: Aleksandar Markovic
Comment the decoder of 'gpr1' gpr encoding type in nanoMIPS
disassembler.
Reviewed-by: Aleksandar Rikalo
Signed-off-by: Aleksandar Markovic
---
disas/nanomips.cpp | 21 +
1 file changed, 21 insertions(+)
diff --git a/disas/nanomips.cpp b/disas/na
From: Aleksandar Markovic
Comment the decoder of 'gpr4.zero' gpr encoding type in nanoMIPS
disassembler.
Reviewed-by: Aleksandar Rikalo
Signed-off-by: Aleksandar Markovic
---
disas/nanomips.cpp | 27 +++
1 file changed, 27 insertions(+)
diff --git a/disas/nanomips.cpp
From: Aleksandar Markovic
Comment the decoder of 'gpr2.reg1' gpr encoding type in nanoMIPS
disassembler.
Reviewed-by: Aleksandar Rikalo
Signed-off-by: Aleksandar Markovic
---
disas/nanomips.cpp | 22 ++
1 file changed, 22 insertions(+)
diff --git a/disas/nanomips.cpp b/di
From: Fredrik Noring
Test R5900 three-operand MADD1.
Reviewed-by: Aleksandar Markovic
Signed-off-by: Aleksandar Markovic
Signed-off-by: Fredrik Noring
---
tests/tcg/mips/mipsr5900/madd.c | 43 -
1 file changed, 38 insertions(+), 5 deletions(-)
diff --
> From: Philippe Mathieu-Daudé on behalf of
> Philippe Mathieu-Daudé
> Subject: Re: [Qemu-devel] [PATCH 0/2] tests: Reorganize MIPS TCG directories
> and files
>
> Hi Aleksandar,
>
> It seems the list ate your patch 1/2...
Thanks for bringing this to my attention, but not a big deal, I will a
From: Aleksandar Markovic
Reorder declarations and definitions of gpr decoders by number of
input bits of corresponding encoding type.
Reviewed-by: Aleksandar Rikalo
Signed-off-by: Aleksandar Markovic
---
disas/nanomips.cpp | 200 ++---
disas/na
From: Aleksandar Markovic
Comment the decoder of 'gpr2.reg2' gpr encoding type in nanoMIPS
disassembler.
Reviewed-by: Aleksandar Rikalo
Signed-off-by: Aleksandar Markovic
---
disas/nanomips.cpp | 22 ++
1 file changed, 22 insertions(+)
diff --git a/disas/nanomips.cpp b/di
From: Aleksandar Markovic
Rename the decoder of 'gpr2.reg1' gpr encoding type in nanoMIPS
disassembler.
Reviewed-by: Aleksandar Rikalo
Signed-off-by: Aleksandar Markovic
---
disas/nanomips.cpp | 6 +++---
disas/nanomips.h | 2 +-
2 files changed, 4 insertions(+), 4 deletions(-)
diff --git
From: Fredrik Noring
Test R5900 three-operand MADDU.
Reviewed-by: Aleksandar Markovic
Signed-off-by: Aleksandar Markovic
Signed-off-by: Fredrik Noring
---
tests/tcg/mips/mipsr5900/Makefile | 1 +
tests/tcg/mips/mipsr5900/maddu.c | 37 +
2 files changed,
From: Fredrik Noring
Test R5900 three-operand MADDU1.
Reviewed-by: Aleksandar Markovic
Signed-off-by: Aleksandar Markovic
Signed-off-by: Fredrik Noring
---
tests/tcg/mips/mipsr5900/maddu.c | 37 +++--
1 file changed, 35 insertions(+), 2 deletions(-)
diff --gi
From: Aleksandar Markovic
Add "nanoMIPS32 Instruction Set Technical Reference Manual" as
a reference.
Reviewed-by: Aleksandar Rikalo
Signed-off-by: Aleksandar Markovic
---
disas/nanomips.cpp | 7 +++
1 file changed, 7 insertions(+)
diff --git a/disas/nanomips.cpp b/disas/nanomips.cpp
ind
From: Aleksandar Markovic
Rename the decoder of 'gpr1' gpr encoding type in nanoMIPS
disassembler.
Reviewed-by: Aleksandar Rikalo
Signed-off-by: Aleksandar Markovic
---
disas/nanomips.cpp | 4 ++--
disas/nanomips.h | 2 +-
2 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/disas
From: Aleksandar Markovic
Rename the decoder of 'gpr2.reg2' gpr encoding type in nanoMIPS
disassembler.
Reviewed-by: Aleksandar Rikalo
Signed-off-by: Aleksandar Markovic
---
disas/nanomips.cpp | 6 +++---
disas/nanomips.h | 2 +-
2 files changed, 4 insertions(+), 4 deletions(-)
diff --git
Aleksandar Markovic writes:
> HI, Alex, just a heads up that I plan to submit directory and file
> reorganization of tests/tcg/mips mini patch series today or tomorrow.
> Aleksandar
My current tree state is:
https://github.com/stsquad/qemu/tree/testing/enable-system-tcg-tests-v2
But I'm st
On Fri, 28 Dec 2018 at 00:23, Andreas Dilger wrote:
> On Dec 27, 2018, at 10:41 AM, Peter Maydell wrote:
> > As you note, this causes breakage for userspace programs which
> > need to implement an API/ABI with 32-bit offset but which only
> > have access to the kernel's 64-bit offset API/ABI.
>
>
On Thu, 27 Dec 2018 12:54:02 -0200
Eduardo Habkost wrote:
> On Fri, Dec 21, 2018 at 03:13:25PM +0100, Igor Mammedov wrote:
> > On Thu, 20 Dec 2018 19:18:01 -0200
> > Eduardo Habkost wrote:
> >
> > > On Wed, Dec 19, 2018 at 11:40:37AM +0100, Igor Mammedov wrote:
> > > > On Wed, 19 Dec 2018 10:57
* Florian Weimer:
> * Adhemerval Zanella:
>
>> On 27/12/2018 16:09, Florian Weimer wrote:
>>> * Adhemerval Zanella:
>>>
Also for glibc standpoint, although reverting it back to use getdents
syscall for non-LFS mode might fix this issue for architectures that
provides non-LFS getde
* Adhemerval Zanella:
> On 27/12/2018 16:09, Florian Weimer wrote:
>> * Adhemerval Zanella:
>>
>>> Also for glibc standpoint, although reverting it back to use getdents
>>> syscall for non-LFS mode might fix this issue for architectures that
>>> provides non-LFS getdents syscall it won't be a fi
On 27/12/2018 16:09, Florian Weimer wrote:
> * Adhemerval Zanella:
>
>> Also for glibc standpoint, although reverting it back to use getdents
>> syscall for non-LFS mode might fix this issue for architectures that
>> provides non-LFS getdents syscall it won't be a fix for architectures
>> tha
On 28/12/2018 10:01, Florian Weimer wrote:
> * Florian Weimer:
>
>> * Adhemerval Zanella:
>>
>>> On 27/12/2018 16:09, Florian Weimer wrote:
* Adhemerval Zanella:
> Also for glibc standpoint, although reverting it back to use getdents
> syscall for non-LFS mode might fix this
>> Do you think this could work as a GSoC project? I'm potentially
>> interested in working on it this summer.
>Could be. My first guess is something like 4 months work for this.
Four months full-time? If so I would say it's not viable for a GSoC
project (it's 3 months), I've done the 12-hours-a
This prepares us for eliminating the use of direct array access within the VMX
instruction implementations.
Signed-off-by: Mark Cave-Ayland
Reviewed-by: Richard Henderson
---
target/ppc/internal.h | 9 -
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/target/ppc/internal.h
On 25/12/18 10:45, Vladimir Sementsov-Ogievskiy wrote:
>>
>> What are the cases, when we really need digging for zeros in bs->file?
It's needed for preallocation=metadata.
Paolo
>From working on the TCG vector operations patchset, it is apparent that there
are a large number of endian-based hacks in int_helper.c which can be removed by
making use of the various Vsr* macros.
Patch 1 is simple enough, and implements the complete set of Vsr* macros for
both big endian and li
Richard points out that these macros suffer from a -fsanitize=shift bug in that
they improperly handle n == 0 turning it into a shift by 32/64 respectively.
Replace them with QEMU's existing ror32() and ror64() functions instead.
Signed-off-by: Mark Cave-Ayland
---
target/ppc/int_helper.c | 48 +
On 25/12/18 09:23, Kang, Luwei wrote:
>> From: Qemu-devel [mailto:qemu-devel-bounces+luwei.kang=intel@nongnu.org]
>> On Behalf Of Paolo Bonzini
>> Sent: Friday, December 21, 2018 8:44 PM
>> To: qemu-devel@nongnu.org
>> Cc: ehabk...@redhat.com; qemu-sta...@nongnu.org
>> Subject: [Qemu-devel] [P
As pointed out by Richard: it does not need the mask argument, nor does it need
the recast argument. The masking is implied by the cast argument, and the
recast is implied by the assignment.
Signed-off-by: Mark Cave-Ayland
---
target/ppc/int_helper.c | 14 +++---
1 file changed, 7 insert
These macros can be eliminated by instead using the relavant Vsr* macros in
the few locations where they appear.
Signed-off-by: Mark Cave-Ayland
Reviewed-by: Richard Henderson
---
target/ppc/int_helper.c | 66 -
1 file changed, 27 insertions(+), 3
Following on from the previous work, there are numerous endian-related hacks
in int_helper.c that can now be replaced with Vsr* macros.
There are also a few places where the VECTOR_FOR_INORDER_I macro can be
replaced with a normal iterator since the processing order is irrelevant.
Signed-off-by:
The original purpose of these macros was to correctly reference the high and low
parts of the VSRs regardless of the host endianness.
Replace these direct references to high and low parts with the relevant VsrD
macro instead, and completely remove the now-unused HI_IDX and LO_IDX macros.
Signed-o
On 27/12/18 12:51, Michael Hanselmann wrote:
> The "eeprom_write_data" function in "smbus_eeprom.c" had no provisions
> to limit the length of data written. If a caller were able to manipulate
> the "len" parameter they could potentially write before or after the
> target buffer.
> ---
> hw/i2c/sm
On 25/12/2018 20:11, Richard Henderson wrote:
> On 12/23/18 10:38 PM, Mark Cave-Ayland wrote:
>> -#define VMUL_DO(name, mul_element, prod_element, cast, evenp) \
>> +#define VMUL_DO_EVN(name, mul_element, mul_access, prod_access, cast) \
>> void helper_v##name(ppc_avr_t *r, ppc_av
The current implementations make use of the endian-specific macros HI_IDX and
LO_IDX directly to calculate array offsets.
Rework the implementation to use the Vsr* macros so that these per-endian
references can be removed.
Signed-off-by: Mark Cave-Ayland
Reviewed-by: Richard Henderson
---
targ
The current implementations make use of the endian-specific macros MRGLO/MRGHI
and also reference HI_IDX and LO_IDX directly to calculate array offsets.
Rework the implementation to use the Vsr* macros so that these per-endian
references can be removed.
Signed-off-by: Mark Cave-Ayland
---
targe
On Fri, 28 Dec 2018 at 13:45, Nick Renieris wrote:
> Also, I hope you meant four months for me, not for you - I'm
> completely new to the QEMU codebase. I expect it will take me weeks
> just to understand x86's 'translate.c' (who thought it'd be a good
> idea to put all this stuff in _one_ file?).
On 26/12/18 09:25, Yang Weijiang wrote:
> @@ -1233,6 +1252,14 @@ static const ExtSaveArea x86_ext_save_areas[] = {
>{ .feature = FEAT_7_0_ECX, .bits = CPUID_7_0_ECX_PKU,
> .offset = offsetof(X86XSaveArea, pkru_state),
> .size = sizeof(XSavePKRU) },
> +[XSTA
Right, thanks, that file looks better, though I still think splitting
to multiple files would absolutely be of value, if only for the
practicality of being able to have several parts of it open at the
same in a code editor (instead of having to jump back and forth or
find workarounds to open the sa
This is a trivial patch to fix a wrong value for block terminator.
The old value was 0x7fff which is wrong. It was not affecting the
code because QEMU dmg block is not handling block terminator right now.
Neverthless, it should be fixed.
Signed-off-by: Julio Faracco
---
block/dmg.c | 2 +-
1
On Fri, 28 Dec 2018 at 14:28, Nick Renieris wrote:
> Right, thanks, that file looks better, though I still think splitting
> to multiple files would absolutely be of value, if only for the
> practicality of being able to have several parts of it open at the
> same in a code editor (instead of havi
This is still a problem with 3.1.0.
** Summary changed:
- unix-domain socket unlink()ed prematurely
+ VNC unix-domain socket unlink()ed prematurely
--
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
https://bugs.launchpad.net/bugs/1795
On Thu, 13 Dec 2018 22:00:57 +0100
Juan Quintela wrote:
> Signed-off-by: Juan Quintela
> ---
Reviewed-by: Greg Kurz
> default-configs/virtio.mak | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/default-configs/virtio.mak b/default-configs/virtio.mak
> index 5ae4a6101
On Thu, 13 Dec 2018 22:00:47 +0100
Juan Quintela wrote:
> Reviewed-by: Laurent Vivier
> Signed-off-by: Juan Quintela
>
> ---
>
Acked-by: Greg Kurz
> Also disable virtio9p test (lvivier)
> ---
> hw/virtio/Makefile.objs | 1 +
> hw/virtio/virtio-9p-pci.c | 86
Hi Philippe
On 27.12.18 20:03, Philippe Mathieu-Daudé wrote:
> On Thu, Dec 27, 2018 at 12:53 PM Michael Hanselmann wrote:
> > The "eeprom_write_data" function in "smbus_eeprom.c" had no provisions
> > to limit the length of data written. If a caller were able to manipulate
> > the "len" parameter
Hi Paolo
On 28.12.18 14:52, Paolo Bonzini wrote:
> On 27/12/18 12:51, Michael Hanselmann wrote:
>> The "eeprom_write_data" function in "smbus_eeprom.c" had no provisions
>> to limit the length of data written. If a caller were able to manipulate
>> the "len" parameter they could potentially write
> Will you be testing the build as is with the current Makefiles?
I will, but they should be replaced with your versions - in new directories.
v1 of my reorganization series seems to be broken on the list for some reason,
but I will send v2 (hopefully more complete and improved) after New Year.
Στις Παρ, 28 Δεκ 2018 στις 4:39 μ.μ., ο/η Peter Maydell
έγραψε:
> If your editor can't show multiple views onto one file with
> the same simplicity and UI as it has for multiple different
> files then I would suggest getting a better editor :-)
Apparently I just didn't know how to use my editor :
On 12/27/18 3:13 PM, Igor Mammedov wrote:
> replace a bunch of ACPI_READ_ARRAY/ACPI_READ_FIELD macro, that read
> SMBIOS table field by field with one memread() to fetch whole table
> at once and drop no longer used ACPI_READ_ARRAY/ACPI_READ_FIELD macro.
>
> Signed-off-by: Igor Mammedov
Reviewed
[sending again, slightly edited, due to email client issues]
On Thu, Dec 27, 2018 at 9:25 AM Florian Weimer wrote:
>
> We have a bit of an interesting problem with respect to the d_off
> field in struct dirent.
>
> When running a 64-bit kernel on certain file systems, notably ext4,
> this field u
GCC 8 introduced the -Wstringop-overflow, which detect buffer overflow
by string-modifying functions declared in , such strncpy(),
used in global_state_store_running().
GCC indeed found an incorrect use of strlen(), because this array
is loaded by VMSTATE_BUFFER(runstate, GlobalState) then parsed
GCC 8 added a -Wstringop-truncation warning:
The -Wstringop-truncation warning added in GCC 8.0 via r254630 for
bug 81117 is specifically intended to highlight likely unintended
uses of the strncpy function that truncate the terminating NUL
character from the source string.
This new warni
GCC 8 new warning prevents builds to success since quite some time.
First report on the mailing list is in July 2018:
https://lists.gnu.org/archive/html/qemu-devel/2018-07/msg03723.html
Since v3:
- patch 1: make sens of description (eblake)
- patch 2: append QEMU_NONSTRING instead of prepending it
GCC 8 introduced the -Wstringop-truncation checker to detect truncation by
the strncat and strncpy functions (closely related to -Wstringop-overflow,
which detect buffer overflow by string-modifying functions declared in
).
In tandem of -Wstringop-truncation, the "nonstring" attribute was added:
From: Marc-André Lureau
GCC 8 added a -Wstringop-truncation warning:
The -Wstringop-truncation warning added in GCC 8.0 via r254630 for
bug 81117 is specifically intended to highlight likely unintended
uses of the strncpy function that truncate the terminating NUL
character from the sour
GCC 8 added a -Wstringop-truncation warning:
The -Wstringop-truncation warning added in GCC 8.0 via r254630 for
bug 81117 is specifically intended to highlight likely unintended
uses of the strncpy function that truncate the terminating NUL
character from the source string.
This new warni
Added examples for the qom-list, qom-get, and qom-set
commands in qapi misc JSON file.
Signed-off-by: Wainer dos Santos Moschetta
---
qapi/misc.json | 36
1 file changed, 36 insertions(+)
diff --git a/qapi/misc.json b/qapi/misc.json
index 24d20a880a..426274e
On 2018-12-28 01:46, Programmingkid wrote:
>
>> On Dec 27, 2018, at 8:33 AM, Kővágó Zoltán wrote:
>>
>> Hi,
>>
>> I've pushed it to my github (modulo some random fixes not yet on the
>> mailing list):
>> https://github.com/DirtYiCE/qemu/tree/audio-51-2018
>>
>> I don't have a mac so I have no ide
On Fri, 28 Dec 2018, 13:46 Nick Renieris
> Another question, are there existing discussions about this
> refactoring effort or specifically AVX? I asked a similar question on
> IRC a few days ago and got no answers.
>
You might want to try again next week. Most QEMU hackers are away for the
holid
The gdb CSR xml file has registers in documentation order, not numerical
order, so we need a table to map the register numbers. This also adds
some missing CSR_* register macros.
Signed-off-by: Jim Wilson
---
target/riscv/cpu_bits.h | 35 ++-
target/riscv/csr-map.h | 248 +
Signed-off-by: Jim Wilson
---
target/riscv/cpu.c | 9 ++-
target/riscv/gdbstub.c | 73 --
2 files changed, 73 insertions(+), 9 deletions(-)
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
index a025a0a..b248e3e 100644
--- a/target/ris
Signed-off-by: Jim Wilson
---
configure | 1 +
gdb-xml/riscv-64bit-cpu.xml | 43
gdb-xml/riscv-64bit-csr.xml | 250
gdb-xml/riscv-64bit-fpu.xml | 52 +
4 files changed, 346 insertions(+)
create mode 100644 gdb-xm
Adds a debugger parameter to csr_read_helper and csr_write_helper. When
this is true, we disable illegal instruction checks.
Signed-off-by: Jim Wilson
---
linux-user/riscv/signal.c | 5 ++-
target/riscv/cpu.h| 7 +++-
target/riscv/cpu_helper.c | 4 +-
target/riscv/gdbstub.c| 4 +
Signed-off-by: Jim Wilson
---
configure | 1 +
gdb-xml/riscv-32bit-cpu.xml | 43
gdb-xml/riscv-32bit-csr.xml | 250
gdb-xml/riscv-32bit-fpu.xml | 46
4 files changed, 340 insertions(+)
create mode 100644 gdb-xml
This is the second version of the patch set. I haven't gotten any bug
reports for the patches in the several weeks that they have been
available, and no review yet, so the only significant difference from
the first version is that I ran them through checkpatch to fix style
issues, and I sent them
Public bug reported:
I am testing usb-bt-dongle device on xchi host controller, and found
that the qemu crashed directly with an assertion failer.
Here is the information to reproduce the crash:
Qemu git revision: 9b2e891ec5ccdb4a7d583b77988848282606fdea
System emulator: qemu-x86_64
VM image:
h
On Dec 28, 2018, at 4:18 AM, Peter Maydell wrote:
>
> On Fri, 28 Dec 2018 at 00:23, Andreas Dilger wrote:
>> On Dec 27, 2018, at 10:41 AM, Peter Maydell wrote:
>>> As you note, this causes breakage for userspace programs which
>>> need to implement an API/ABI with 32-bit offset but which only
>
On 2018-12-29 01:12, Programmingkid wrote:
>
>> On Dec 28, 2018, at 3:05 PM, Kővágó Zoltán wrote:
>>
>> On 2018-12-28 01:46, Programmingkid wrote:
>>>
On Dec 27, 2018, at 8:33 AM, Kővágó Zoltán wrote:
Hi,
I've pushed it to my github (modulo some random fixes not yet on t
On Fri, 28 Dec 2018 at 23:16, Andreas Dilger wrot
> On Dec 28, 2018, at 4:18 AM, Peter Maydell wrote:
> > The problem is that there is no 32-bit API in some cases
> > (unless I have misunderstood the kernel code) -- not all
> > host architectures implement compat syscalls or allow them
> > to be
> On Dec 28, 2018, at 3:05 PM, Kővágó Zoltán wrote:
>
> On 2018-12-28 01:46, Programmingkid wrote:
>>
>>> On Dec 27, 2018, at 8:33 AM, Kővágó Zoltán wrote:
>>>
>>> Hi,
>>>
>>> I've pushed it to my github (modulo some random fixes not yet on the
>>> mailing list):
>>> https://github.com/Dirt
> On Dec 28, 2018, at 7:19 PM, Zoltán Kővágó wrote:
>
> On 2018-12-29 01:12, Programmingkid wrote:
>>
>>> On Dec 28, 2018, at 3:05 PM, Kővágó Zoltán wrote:
>>>
>>> On 2018-12-28 01:46, Programmingkid wrote:
> On Dec 27, 2018, at 8:33 AM, Kővágó Zoltán wrote:
>
> Hi,
>
On Fri, Dec 28, 2018 at 10:32:59AM +0800, Yu Zhang wrote:
> On Thu, Dec 27, 2018 at 01:14:11PM -0200, Eduardo Habkost wrote:
> > On Wed, Dec 26, 2018 at 01:30:00PM +0800, Yu Zhang wrote:
> > > On Tue, Dec 25, 2018 at 11:56:19AM -0500, Michael S. Tsirkin wrote:
> > > > On Sat, Dec 22, 2018 at 09:11:
On Fri, Dec 28, 2018 at 02:53:22PM +0100, Paolo Bonzini wrote:
> On 25/12/18 09:23, Kang, Luwei wrote:
> >> From: Qemu-devel
> >> [mailto:qemu-devel-bounces+luwei.kang=intel@nongnu.org] On Behalf Of
> >> Paolo Bonzini
> >> Sent: Friday, December 21, 2018 8:44 PM
> >> To: qemu-devel@nongnu.org
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