On 11/02/2018 11:32 AM, Peter Xu wrote:
On Fri, Nov 02, 2018 at 11:00:24AM +0800, Fei Li wrote:
On 11/02/2018 10:37 AM, Peter Xu wrote:
On Thu, Nov 01, 2018 at 06:17:11PM +0800, Fei Li wrote:
Set the migration state to "failed" instead of "setup" when failing
to send packet via some channe
Hi Fam,
Thanks for picking this.
On Fri, Nov 2, 2018 at 7:48 AM Fam Zheng wrote:
> On Thu, 11/01 19:37, Philippe Mathieu-Daudé wrote:
> > The Debian Sid repository is not garanteed to be stable, as his
> > 'unstable' name suggest :)
There is an error in "my be" -> "might be"...
Do you mind to u
On Fri, Nov 2, 2018 at 3:20 PM Philippe Mathieu-Daudé wrote:
>
> Hi Fam,
>
> Thanks for picking this.
>
> On Fri, Nov 2, 2018 at 7:48 AM Fam Zheng wrote:
> > On Thu, 11/01 19:37, Philippe Mathieu-Daudé wrote:
> > > The Debian Sid repository is not garanteed to be stable, as his
> > > 'unstable' n
On Fri, Nov 02, 2018 at 03:13:05PM +0800, Fei Li wrote:
>
>
> On 11/02/2018 11:32 AM, Peter Xu wrote:
> > On Fri, Nov 02, 2018 at 11:00:24AM +0800, Fei Li wrote:
> > >
> > > On 11/02/2018 10:37 AM, Peter Xu wrote:
> > > > On Thu, Nov 01, 2018 at 06:17:11PM +0800, Fei Li wrote:
> > > > > Set the
Hi Guenter,
On Fri, Nov 2, 2018 at 3:52 AM Guenter Roeck wrote:
>
> On 11/1/18 5:12 PM, Philippe Mathieu-Daudé wrote:
> > Hi,
> >
> > This series is a mix of a previous work I had for the raspi, and a patch
> > from
> > Guenter: https://lists.gnu.org/archive/html/qemu-devel/2018-07/msg03153.html
On Fri, Nov 2, 2018 at 8:32 AM Philippe Mathieu-Daudé wrote:
>
> Hi Guenter,
>
> On Fri, Nov 2, 2018 at 3:52 AM Guenter Roeck wrote:
> >
> > On 11/1/18 5:12 PM, Philippe Mathieu-Daudé wrote:
> > > Hi,
> > >
> > > This series is a mix of a previous work I had for the raspi, and a patch
> > > from
Chris Friesen writes:
> Hi all,
>
> I have an odd situation which occurs very infrequently and I'm hoping
> to get some advice on how to debug. Apologies for the length of this
> message, I tried to include as much potentially useful information as
> possible.
>
> In the context of an OpenStac
On 2/11/18 2:22, Li Qiang wrote:
Currently, the nvme_cmb_ops mr doesn't check the addr and size.
This can lead an oob access issue. This is triggerable in the guest.
Add check to avoid this issue.
Fixes CVE-2018-16847.
Reported-by: Li Qiang
Reviewed-by: Paolo Bonzini
Signed-off-by: Li Qiang
Richard Henderson writes:
> When populating id registers from kvm, on a host that doesn't support
> aarch32 mode at all, aa32_arm_div will not be supported either.
>
> Signed-off-by: Richard Henderson
> ---
>
> "Tested" on an APM Mustang, which does support AArch32. I'm not
> sure, off hand,
Hi,
Is there any way to emulate I/O timeout on qemu side (not fault injection in VM
kernel) without modifying qemu source code?
For instance, I would like to observe/study/debug the I/O timeout handling of
nvme, scsi, virtio-blk (not supported) of VM kernel.
Is there a way to trigger this on pur
This definitions are QCow2 specific, there is no need to expose them
in the global namespace.
This partially reverts commit 540b8492618eb.
Signed-off-by: Philippe Mathieu-Daudé
---
block/qcow2.h| 56 +++-
include/qemu/units.h | 55
Hi,
This series seems to have some coding style problems. See output below for
more information:
Type: series
Message-id: 20181031132029.4887-1-kbast...@mail.uni-paderborn.de
Subject: [Qemu-devel] [PATCH v3 00/35] target/riscv: Convert to decodetree
=== TEST SCRIPT BEGIN ===
#!/bin/bash
BASE=ba
+-- On Sat, 27 Oct 2018, P J P wrote --+
|+-- On Sun, 21 Oct 2018, P J P wrote --+
|| The length parameter values are not negative, thus use an unsigned
|| type 'size_t' for them. Many routines pass 'len' values to memcpy(3)
|| calls. If it was negative, it could lead to memory corruption issues.
|
>
> See qemu_spice_add_display_interface(), the console index is also used
> as channel id. So put that into the qxl->id field too.
>
> In typical use cases (one primary qxl-vga device, optionally one or more
> secondary qxl devices, no non-qxl display devices) this doesn't change
> anything.
>
Hi,
On 2018/11/1 18:22, Samuel Ortiz wrote:
diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c
index f28a2faa53..0ed132b79b 100644
--- a/hw/arm/virt-acpi-build.c
+++ b/hw/arm/virt-acpi-build.c
@@ -367,7 +367,7 @@ static void acpi_dsdt_add_power_button(Aml *scope)
}
/* RSDP *
A series of performance improvements for disks using the Xen PV ring.
These have had fairly extensive testing.
The batching and latency improvements together boost the throughput
of small reads and writes by two to six percent (measured using fio
in the guest)
Avoiding repeated calls to posix_me
When I/O consists of many small requests, performance is improved by
batching them together in a single io_submit() call. When there are
relatively few requests, the extra overhead is not worth it. This
introduces a check to start batching I/O requests via blk_io_plug()/
blk_io_unplug() in an amoun
If the I/O ring is full, the guest cannot send any more requests
until some responses are sent. Only sending all available responses
just before checking for new work does not leave much time for the
guest to supply new work, so this will cause stalls if the ring gets
full. Also, not completing rea
xen_disk currently allocates memory to hold the data for each ioreq
as that ioreq is used, and frees it afterwards. Because it requires
page-aligned blocks, this interacts poorly with non-page-aligned
allocations and balloons the heap.
Instead, allocate the maximum possible requirement, which is
B
On 2018/11/1 18:22, Samuel Ortiz wrote:
We make the ARM virt ACPI code use the now shared build_rsdp() API from
aml-build.c. By doing so we fix a bug where the ARM implementation was
missing adding both the legacy and extended checksums, which was
building an invalid RSDP table.
Signed-off-by
On 02/11/2018 04:46, Liran Alon wrote:
>> On Thu, Nov1, 2018 at 09:45 AM, Jim Mattson wrote:
>
>>> On Thu, Nov 1, 2018 at 8:56 AM, Dr. David Alan Gilbert
>>> wrote:
>
>>> So if I have matching host kernels it should always work?
>>> What happens if I upgrade the source kernel to increase it's
On 2018/11/1 18:22, Samuel Ortiz wrote:
diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c
index 0a6a88380a..6822ee4eaa 100644
--- a/hw/arm/virt-acpi-build.c
+++ b/hw/arm/virt-acpi-build.c
@@ -546,7 +546,7 @@ build_srat(GArray *table_data, BIOSLinker *linker,
VirtMachineState *v
On 1 November 2018 at 21:57, Richard Henderson
wrote:
> When populating id registers from kvm, on a host that doesn't support
> aarch32 mode at all, aa32_arm_div will not be supported either.
>
> Signed-off-by: Richard Henderson
> ---
>
> "Tested" on an APM Mustang, which does support AArch32. I
On 31 October 2018 at 16:53, Richard Henderson
wrote:
> The following changes since commit a2e002ff7913ce93aa0f7dbedd2123dce5f1a9cd:
>
> Merge remote-tracking branch
> 'remotes/vivier2/tags/qemu-trivial-for-3.1-pull-request' into staging
> (2018-10-30 15:49:55 +)
>
> are available in the G
On 11/2/18 9:48 AM, Peter Maydell wrote:
>> +static inline bool isar_feature_aa64_a32(const ARMISARegisters *id)
>> +{
>> +return FIELD_EX64(id->id_aa64pfr0, ID_AA64PFR0, EL0) == 2;
>> +}
>> +
>
> Doesn't the stuff in the Arm ARM's "Principles of the ID
> scheme for fields in ID registers" abo
Hi All,
Maybe we have forgot this patch? Ping again.
Related discussion:
https://lists.gnu.org/archive/html/qemu-devel/2018-08/msg03352.html
Thanks
Zhang Chen
On Fri, Sep 14, 2018 at 2:32 PM Zhang Chen wrote:
> Hi All,
>
> No news update?
> Ping...
>
> Thanks
> Zhang Chen
>
> On Thu, Sep 6, 2
Hi,
On 2/11/18 10:20, Shannon Zhao wrote:
Hi,
On 2018/11/1 18:22, Samuel Ortiz wrote:
diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c
index f28a2faa53..0ed132b79b 100644
--- a/hw/arm/virt-acpi-build.c
+++ b/hw/arm/virt-acpi-build.c
@@ -367,7 +367,7 @@ static void acpi_dsdt_add
A series of performance improvements for disks using the Xen PV ring.
These have had fairly extensive testing.
The batching and latency improvements together boost the throughput
of small reads and writes by two to six percent (measured using fio
in the guest)
Avoiding repeated calls to posix_me
If the I/O ring is full, the guest cannot send any more requests
until some responses are sent. Only sending all available responses
just before checking for new work does not leave much time for the
guest to supply new work, so this will cause stalls if the ring gets
full. Also, not completing rea
xen_disk currently allocates memory to hold the data for each ioreq
as that ioreq is used, and frees it afterwards. Because it requires
page-aligned blocks, this interacts poorly with non-page-aligned
allocations and balloons the heap.
Instead, allocate the maximum possible requirement, which is
B
When I/O consists of many small requests, performance is improved by
batching them together in a single io_submit() call. When there are
relatively few requests, the extra overhead is not worth it. This
introduces a check to start batching I/O requests via blk_io_plug()/
blk_io_unplug() in an amoun
On 2018/11/2 17:35, Shannon Zhao wrote:
On 2018/11/1 18:22, Samuel Ortiz wrote:
We make the ARM virt ACPI code use the now shared build_rsdp() API from
aml-build.c. By doing so we fix a bug where the ARM implementation was
missing adding both the legacy and extended checksums, which was
bui
On Fri, 2 Nov 2018 17:35:06 +0800
Shannon Zhao wrote:
> On 2018/11/1 18:22, Samuel Ortiz wrote:
> > We make the ARM virt ACPI code use the now shared build_rsdp() API from
> > aml-build.c. By doing so we fix a bug where the ARM implementation was
> > missing adding both the legacy and extended ch
When populating id registers from kvm, on a host that doesn't support
aarch32 mode at all, neither arm_div nor jazelle will be supported either.
Signed-off-by: Richard Henderson
---
v2: Test aa64pfr.el0 >= 2; rename to isar_feature_aa64_aa32.
Pull out realizefn test to no_aa32 bool; use it f
The S390 APQP/AQIC instruction can be intercepted by the host
to configure the AP queues interruption handling for and handle
the ISC used by the host and the guest and the indicator address.
This patch series define the AQIC feature in the cpumodel,
extend the APDevice type for per queue interrup
This file would be copied from Linux,
I put it here for the review.
Signed-off-by: Pierre Morel
---
linux-headers/linux/vfio.h | 22 ++
1 file changed, 22 insertions(+)
diff --git a/linux-headers/linux/vfio.h b/linux-headers/linux/vfio.h
index ceb6453394..32b1fec362 100644
-
A new CPU model facilities is introduced to support AP devices
interruption interception for a KVM guest.
CPU model facility:
The S390_FEAT_AP_QUEUE_INTERRUPT_CONTROL, CPU facility indicates
whether AP interruption interception is available to the guest.
This feature will be enabled only if the A
From: Pierre Morel
We intercept the PQAP(AQIC) instruction.
Until we implement AQIC we return a PGM_OPERATION.
Signed-off-by: Pierre Morel
---
hw/vfio/ap.c | 10 ++
include/hw/s390x/ap-device.h | 9 +
target/s390x/kvm.c | 20
3 f
We intercept the PQAP(AQIC) instruction and transform
the guest's AQIC command parameters for the host AQIC
parameters.
Doing this we use the standard adapter interface to provide
the adapter NIB, indicator and ISC.
We define a new structure, APQueue to keep track of
the route and indicator addre
From: Pierre Morel
Let's define the AP adapter type to use it with standard
adapter interface.
Signed-off-by: Pierre Morel
---
include/hw/s390x/css.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/hw/s390x/css.h b/include/hw/s390x/css.h
index aae19c4272..9946492214 100644
--- a/in
On 31 October 2018 at 16:57, Dr. David Alan Gilbert (git)
wrote:
> From: "Dr. David Alan Gilbert"
>
> The following changes since commit a2e002ff7913ce93aa0f7dbedd2123dce5f1a9cd:
>
> Merge remote-tracking branch
> 'remotes/vivier2/tags/qemu-trivial-for-3.1-pull-request' into staging
> (2018-1
Am 02.11.2018 um 02:22 hat Li Qiang geschrieben:
> Currently, the nvme_cmb_ops mr doesn't check the addr and size.
> This can lead an oob access issue. This is triggerable in the guest.
> Add check to avoid this issue.
>
> Fixes CVE-2018-16847.
>
> Reported-by: Li Qiang
> Reviewed-by: Paolo Bonz
When trigger a 'query-cpus' qmp, the pc is an signed value like
following:
{"arch": "x86", ... "pc": -1732653994, "halted": true,...}
It is strange. Change it to uint64_t.
Signed-off-by: Li Qiang
---
qapi/misc.json | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a
Am 02.11.2018 um 11:00 hat Tim Smith geschrieben:
> A series of performance improvements for disks using the Xen PV ring.
>
> These have had fairly extensive testing.
>
> The batching and latency improvements together boost the throughput
> of small reads and writes by two to six percent (measure
Am 02.11.2018 um 09:58 hat Philippe Mathieu-Daudé geschrieben:
> This definitions are QCow2 specific, there is no need to expose them
> in the global namespace.
>
> This partially reverts commit 540b8492618eb.
>
> Signed-off-by: Philippe Mathieu-Daudé
If we don't want this globally, I think we
> -Original Message-
> From: Kevin Wolf [mailto:kw...@redhat.com]
> Sent: 02 November 2018 11:04
> To: Tim Smith
> Cc: xen-de...@lists.xenproject.org; qemu-devel@nongnu.org; qemu-
> bl...@nongnu.org; Anthony Perard ; Paul Durrant
> ; Stefano Stabellini ;
> Max Reitz ; arm...@redhat.com
> S
On 01/11/2018 16:17, Peter Maydell wrote:
> In ppc_core99_init(), we allocate an openpic_irqs array, which
> we then use to collect up the various qemu_irqs which we're
> going to connect to the interrupt controller. Once we've
> called sysbus_connect_irq() to connect them all up, the
> array is n
> -Original Message-
> From: Tim Smith [mailto:tim.sm...@citrix.com]
> Sent: 02 November 2018 10:01
> To: xen-de...@lists.xenproject.org; qemu-devel@nongnu.org; qemu-
> bl...@nongnu.org
> Cc: Anthony Perard ; Kevin Wolf
> ; Paul Durrant ; Stefano
> Stabellini ; Max Reitz
> Subject: [PATCH
> -Original Message-
> From: Tim Smith [mailto:tim.sm...@citrix.com]
> Sent: 02 November 2018 10:01
> To: xen-de...@lists.xenproject.org; qemu-devel@nongnu.org; qemu-
> bl...@nongnu.org
> Cc: Anthony Perard ; Kevin Wolf
> ; Paul Durrant ; Stefano
> Stabellini ; Max Reitz
> Subject: [PATCH
> -Original Message-
> From: Tim Smith [mailto:tim.sm...@citrix.com]
> Sent: 02 November 2018 10:01
> To: xen-de...@lists.xenproject.org; qemu-devel@nongnu.org; qemu-
> bl...@nongnu.org
> Cc: Anthony Perard ; Kevin Wolf
> ; Paul Durrant ; Stefano
> Stabellini ; Max Reitz
> Subject: [PATC
On 2 November 2018 at 11:14, Mark Cave-Ayland
wrote:
> On 01/11/2018 16:17, Peter Maydell wrote:
>
>> In ppc_core99_init(), we allocate an openpic_irqs array, which
>> we then use to collect up the various qemu_irqs which we're
>> going to connect to the interrupt controller. Once we've
>> called
On 02/11/2018 01:32, Thomas Huth wrote:
> On 2018-10-30 13:39, Laurent Vivier wrote:
>> Le 30/10/2018 à 14:12, Mark Cave-Ayland a écrit :
>>> On 30/10/2018 12:49, Laurent Vivier wrote:
>>>
Le 30/10/2018 à 12:48, Mark Cave-Ayland a écrit :
> On 30/10/2018 08:15, Richard Henderson wrote:
>>>
On 1 November 2018 at 08:24, Marc-André Lureau
wrote:
> The following changes since commit a2e002ff7913ce93aa0f7dbedd2123dce5f1a9cd:
>
> Merge remote-tracking branch
> 'remotes/vivier2/tags/qemu-trivial-for-3.1-pull-request' into staging
> (2018-10-30 15:49:55 +)
>
> are available in the G
On Tue, Oct 30, 2018 at 01:31:44PM +, Peter Maydell wrote:
> On 22 October 2018 at 18:35, Edgar E. Iglesias
> wrote:
> > From: "Edgar E. Iglesias"
> >
> > Add a virtual Xilinx Versal board.
> >
> > This board is based on the Xilinx Versal SoC. The exact
> > details of what peripherals are at
On 01.11.18 15:10, Igor Mammedov wrote:
> On Wed, 24 Oct 2018 12:19:25 +0200
> David Hildenbrand wrote:
>
>> For now, the hotplug handler is not called for devices that are
>> being cold plugged. The hotplug handler is setup when the machine
>> initialization is fully done. Only bridges that were
Currently tests/acpi-test-data contains data files used by the
bios-tables-test, and configure individually symlinks those
data files into the build directory using a wildcard.
Using a wildcard like this is a bad idea, because if a new
data file is added, nothing causes configure to be rerun,
and
A few places in configure were doing ad-hoc calls to
the symlink function to set up symlinks from the build tree
back to the source tree. We have a loop that does this
already for all files and directories listed in the LINKS
environment variable; use that instead.
Signed-off-by: Peter Maydell
--
The FILES variable is used to accumulate a list of things to symlink
from the source tree into the build tree. These don't have to be
individual files; symlinking an entire directory of data files is
also fine. Rename it to something less confusing before we add a few
directories to it.
Improve
Currently tests/hex-loader-check-data contains data files used
by the hexloader-test, and configure individually symlinks those
data files into the build directory using a wildcard.
Using a wildcard like this is a bad idea, because if a new
data file is added, nothing causes configure to be rerun,
This patchset fixes a problem with our build infrastructure
that meant that MST's recent 'pci, pc, virtio' pullreq failed
tests.
Currently our configure script has a wildcard loop that creates
symlinks for every data file in tests/acpi-test-data from the
source tree to the build tree. However, if
Am 02.11.2018 um 12:13 hat Paul Durrant geschrieben:
> > -Original Message-
> > From: Kevin Wolf [mailto:kw...@redhat.com]
> > Sent: 02 November 2018 11:04
> > To: Tim Smith
> > Cc: xen-de...@lists.xenproject.org; qemu-devel@nongnu.org; qemu-
> > bl...@nongnu.org; Anthony Perard ; Paul Dur
On Thu, 1 Nov 2018 11:22:40 +0100
Samuel Ortiz wrote:
Thanks for looking at ACPI mess we have in QEMU and trying to make it better,
this series look a bit hackish probably because it was written to suit new
virt board, so it needs some more clean up to be done.
> This patch set provides an ACPI
Richard Henderson writes:
> When populating id registers from kvm, on a host that doesn't support
> aarch32 mode at all, neither arm_div nor jazelle will be supported either.
>
> Signed-off-by: Richard Henderson
> ---
>
> v2: Test aa64pfr.el0 >= 2; rename to isar_feature_aa64_aa32.
> Pull
Hi,
This series seems to have some coding style problems. See output below for
more information:
Type: series
Message-id: 20181031215622.27690-1-kw...@redhat.com
Subject: [Qemu-devel] [PATCH 00/12] file-posix: Simplify delegation to worker
thread
=== TEST SCRIPT BEGIN ===
#!/bin/bash
BASE=base
* Paolo Bonzini (pbonz...@redhat.com) wrote:
> On 02/11/2018 04:46, Liran Alon wrote:
> >> On Thu, Nov1, 2018 at 09:45 AM, Jim Mattson wrote:
> >
> >>> On Thu, Nov 1, 2018 at 8:56 AM, Dr. David Alan Gilbert
> >>> wrote:
> >
> >>> So if I have matching host kernels it should always work?
> >>>
On Fri, Nov 02, 2018 at 12:35:05PM +, Dr. David Alan Gilbert wrote:
> * Paolo Bonzini (pbonz...@redhat.com) wrote:
> > On 02/11/2018 04:46, Liran Alon wrote:
> > >> On Thu, Nov1, 2018 at 09:45 AM, Jim Mattson wrote:
> > >
> > >>> On Thu, Nov 1, 2018 at 8:56 AM, Dr. David Alan Gilbert
> > >>>
repo.or.cz supports git smart HTTPS. Use it in preference to git:// or
http:// since it's more secure.
Suggested-by: Eric Blake
Signed-off-by: Stefan Hajnoczi
---
MAINTAINERS| 14 +++---
pc-bios/README | 2 +-
2 files changed, 8 insertions(+), 8 deletions(-)
diff --git a/MAINTAIN
v2:
* Use HTTPS for repo.or.cz [Eric]
Jeff Cody has enabled git smart HTTP support on qemu.org. From now on HTTPS is
the preferred protocol because it adds some protection against
man-in-the-middle when cloning a repo.
This patch series updates git:// URLs and changes them to https://. The
ht
When you clone the repository without previous commit history, 'git://'
doesn't protect from man-in-the-middle attacks. HTTPS is more secure
since the client verifies the server certificate.
Reported-by: Jann Horn
Reviewed-by: Daniel P. Berrangé
Signed-off-by: Stefan Hajnoczi
---
scripts/get_
When you clone the repository without previous commit history, 'git://'
doesn't protect from man-in-the-middle attacks. HTTPS is more secure
since the client verifies the server certificate.
Also change git.qemu-project.org to git.qemu.org (we control both domain
names but qemu.org is used more w
31.07.2018 20:30, Vladimir Sementsov-Ogievskiy wrote:
> Implement reconnect. To achieve this:
>
> 1. add new modes:
> connecting-wait: means, that reconnecting is in progress, and there
> were small number of reconnect attempts, so all requests are
> waiting for the connection.
>
When you clone the repository without previous commit history, 'git://'
doesn't protect from man-in-the-middle attacks. HTTPS is more secure
since the client verifies the server certificate.
Reported-by: Jann Horn
Reviewed-by: Daniel P. Berrangé
Signed-off-by: Stefan Hajnoczi
---
README
When you clone the repository without previous commit history, 'git://'
doesn't protect from man-in-the-middle attacks. HTTPS is more secure
since the client verifies the server certificate.
Reported-by: Jann Horn
Reviewed-by: Daniel P. Berrangé
Acked-by: Cornelia Huck
Signed-off-by: Stefan Ha
On 02.11.18 11:30, Pierre Morel wrote:
> The S390 APQP/AQIC instruction can be intercepted by the host
> to configure the AP queues interruption handling for and handle
> the ISC used by the host and the guest and the indicator address.
>
> This patch series define the AQIC feature in the cpumodel
> On 2 Nov 2018, at 11:40, Paolo Bonzini wrote:
>
> On 02/11/2018 04:46, Liran Alon wrote:
>>> On Thu, Nov1, 2018 at 09:45 AM, Jim Mattson wrote:
>>
On Thu, Nov 1, 2018 at 8:56 AM, Dr. David Alan Gilbert
wrote:
>>
So if I have matching host kernels it should always work?
>>
On Wed, Oct 31, 2018 at 08:31:09AM -0500, Eric Blake wrote:
> On 10/31/18 3:43 AM, Stefan Hajnoczi wrote:
> > When you clone the repository without previous commit history, 'git://'
> > doesn't protect from man-in-the-middle attacks. HTTPS is more secure
> > since the client verifies the server ce
On 11/2/18 7:42 AM, Stefan Hajnoczi wrote:
repo.or.cz supports git smart HTTPS. Use it in preference to git:// or
http:// since it's more secure.
Not sure why you didn't copy-paste the commit messages from the other
patches, but it doesn't really matter.
Suggested-by: Eric Blake
Signed-o
On 11/2/18 7:42 AM, Stefan Hajnoczi wrote:
v2:
* Use HTTPS for repo.or.cz [Eric]
Jeff Cody has enabled git smart HTTP support on qemu.org. From now on HTTPS is
the preferred protocol because it adds some protection against
man-in-the-middle when cloning a repo.
This patch series updates git:
Hi Kevin,
On 2/11/18 12:07, Kevin Wolf wrote:
Am 02.11.2018 um 09:58 hat Philippe Mathieu-Daudé geschrieben:
This definitions are QCow2 specific, there is no need to expose them
in the global namespace.
This partially reverts commit 540b8492618eb.
Signed-off-by: Philippe Mathieu-Daudé
If w
On Fri, 2 Nov 2018 12:43:10 +0100
David Hildenbrand wrote:
> On 01.11.18 15:10, Igor Mammedov wrote:
> > On Wed, 24 Oct 2018 12:19:25 +0200
> > David Hildenbrand wrote:
> >
> >> For now, the hotplug handler is not called for devices that are
> >> being cold plugged. The hotplug handler is set
On 1 November 2018 at 11:37, Laurent Vivier wrote:
> The following changes since commit 7d51a855cd568ec3399a1834ada4023cfa12f231:
>
> Merge remote-tracking branch 'remotes/xtensa/tags/20181030-xtensa' into
> staging (2018-10-31 16:11:43 +)
>
> are available in the Git repository at:
>
> g
This patch series adds initial support for Xilinx's Versal SoC.
Xilinx is introducing Versal, an adaptive compute acceleration platform
(ACAP), built on 7nm FinFET process technology. Versal ACAPs combine Scalar
Processing Engines, Adaptable Hardware Engines, and Intelligent Engines with
leading-ed
Add a virtual Xilinx Versal board.
This board is based on the Xilinx Versal SoC. The exact
details of what peripherals are attached to this board
will remain in control of QEMU. QEMU will generate an
FDT on the fly for Linux and other software to auto-discover
peripherals.
Signed-off-by: Edgar E.
Add a model of Xilinx Versal SoC.
Signed-off-by: Edgar E. Iglesias
---
default-configs/aarch64-softmmu.mak | 1 +
hw/arm/Makefile.objs| 1 +
hw/arm/xlnx-versal.c| 323
include/hw/arm/xlnx-versal.h| 122 +++
4 files
On 11/2/18 12:48 AM, Philippe Mathieu-Daudé wrote:
On Fri, Nov 2, 2018 at 8:32 AM Philippe Mathieu-Daudé wrote:
Hi Guenter,
On Fri, Nov 2, 2018 at 3:52 AM Guenter Roeck wrote:
On 11/1/18 5:12 PM, Philippe Mathieu-Daudé wrote:
Hi,
This series is a mix of a previous work I had for the rasp
On 9 October 2018 at 12:16, Paolo Bonzini wrote:
> On 08/10/2018 18:40, Kevin Wolf wrote:
>>>
>>> I'm pretty confident this analysis of the problem is correct:
>>> unfortunately I have no idea what the right way to fix it is...
>> Yes, I agree with your analysis. If __thread variables can be destr
On 02.11.18 14:00, Igor Mammedov wrote:
> On Fri, 2 Nov 2018 12:43:10 +0100
> David Hildenbrand wrote:
>
>> On 01.11.18 15:10, Igor Mammedov wrote:
>>> On Wed, 24 Oct 2018 12:19:25 +0200
>>> David Hildenbrand wrote:
>>>
For now, the hotplug handler is not called for devices that are
Sorry I noticed this bug is filed against qemu. The fix was done in
libguestfs, it's not a bug in qemu as far as I know.
--
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
https://bugs.launchpad.net/bugs/1740364
Title:
qemu-img: fail
Fixed upstream in
https://github.com/libguestfs/libguestfs/commit/f00f920ad3b15ab8e9e8f201c16e7628b6b7b109
The fix should appear in libguestfs 1.40.
** Changed in: qemu
Status: New => Fix Committed
--
You received this bug notification because you are a member of qemu-
devel-ml, which is
Since the TCR_*.HPD bits were RES0 in ARMv8.0, we can simply
interpret the bits as if ARMv8.1-HPD is present without checking.
We will need a slightly different check for hpd for aarch32.
Signed-off-by: Richard Henderson
---
target/arm/cpu64.c | 1 +
target/arm/helper.c | 29 ++
The bulk of the work here, beyond base HPD, is defining the TTBCR2 register.
In addition we must check TTBCR.T2E, which is not present (RES0) for AArch64.
Signed-off-by: Richard Henderson
---
target/arm/cpu.h| 8
target/arm/cpu.c| 4
target/arm/helper.c | 37 +
Provide a trivial implementation with zero limited ordering regions,
which causes the LDLAR and STLLR instructions to devolve into the
LDAR and STLR instructions from the base ARMv8.0 instruction set.
Signed-off-by: Richard Henderson
---
target/arm/cpu.h | 5 +
target/arm/cpu64.c
At the same time, define the fields for these registers,
and use those defines in arm_pamax().
Signed-off-by: Richard Henderson
---
target/arm/cpu.h | 22 --
target/arm/internals.h | 3 ++-
target/arm/cpu64.c | 6 +++---
target/arm/helper.c| 4 ++--
4 files c
> ... in the patch series I posted 25 October "[PATCH 00/11]
> target/mips: Amend R5900 support". I will post updated patches shortly!
Fridrik,
It is now code freeze before 3.1, the code base is being stabilized, and only
important fixes are allowed to be integrated - so, in that light, a separa
Three relatively simple post-8.0 extensions.
r~
Richard Henderson (4):
target/arm: Move id_aa64mmfr* to ARMISARegisters
target/arm: Implement the ARMv8.1-LOR extension
target/arm: Implement the ARMv8.1-HPD extension
target/arm: Implement the ARMv8.2-AA32HPD extension
target/arm/cpu.h
On Fri, Nov 02, 2018 at 10:00:59AM +, Tim Smith wrote:
> When I/O consists of many small requests, performance is improved by
> batching them together in a single io_submit() call. When there are
> relatively few requests, the extra overhead is not worth it. This
> introduces a check to start b
On Fri, Nov 02, 2018 at 10:01:04AM +, Tim Smith wrote:
> If the I/O ring is full, the guest cannot send any more requests
> until some responses are sent. Only sending all available responses
> just before checking for new work does not leave much time for the
> guest to supply new work, so thi
On Fri, Nov 02, 2018 at 10:01:09AM +, Tim Smith wrote:
> xen_disk currently allocates memory to hold the data for each ioreq
> as that ioreq is used, and frees it afterwards. Because it requires
> page-aligned blocks, this interacts poorly with non-page-aligned
> allocations and balloons the he
On 1 November 2018 at 23:55, Palmer Dabbelt wrote:
> The following changes since commit a2e002ff7913ce93aa0f7dbedd2123dce5f1a9cd:
>
> Merge remote-tracking branch
> 'remotes/vivier2/tags/qemu-trivial-for-3.1-pull-request' into staging
> (2018-10-30 15:49:55 +)
>
> are available in the Git
Am 02.11.2018 um 13:37 hat Philippe Mathieu-Daudé geschrieben:
> Hi Kevin,
>
> On 2/11/18 12:07, Kevin Wolf wrote:
> > Am 02.11.2018 um 09:58 hat Philippe Mathieu-Daudé geschrieben:
> > > This definitions are QCow2 specific, there is no need to expose them
> > > in the global namespace.
> > >
> >
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