(MCA: Laurent is AFK today so I'm posting the latest version of this
in advance of soft freeze. I've addressed the technical comments, the
only outstanding feedback is related to i) should comment blocks copied
from Linux headers be removed in patch 1?, ii) is it worth keeping ASC
emulation given t
From: Mao Zhongyi
According to qdev-properties.h, properties of pointer type should
be avoided, it seems a link type property is a good substitution.
Cc: Jan Kiszka
Cc: Peter Maydell
Cc: Gerd Hoffmann
Signed-off-by: Mao Zhongyi
Reviewed-by: Philippe Mathieu-Daudé
Message-id: 20181022074050
Co-developed-by: Mark Cave-Ayland
Signed-off-by: Mark Cave-Ayland
Signed-off-by: Laurent Vivier
---
hw/display/macfb.c | 56 ++
include/hw/display/macfb.h | 21 +
2 files changed, 77 insertions(+)
diff --git a/hw/display/macfb
From: Laurent Vivier
On Sparc and PowerMac, the bit 0 of the address
selects the register type (control or data) and
bit 1 selects the channel (B or A).
On m68k Macintosh, the bit 0 selects the channel and
bit 1 the register type.
This patch introduces a new parameter (bit_swap) to
the device i
From: Mao Zhongyi
Cc: Jan Kiszka
Cc: Peter Maydell
Cc: Gerd Hoffmann
Signed-off-by: Mao Zhongyi
Reviewed-by: Philippe Mathieu-Daudé
Message-id: 20181022074050.19638-2-maozhon...@cmss.chinamobile.com
Signed-off-by: Gerd Hoffmann
---
hw/arm/musicpal.c | 2 +-
hw/audio/marvell_88w86
From: Laurent Vivier
Co-developed-by: Mark Cave-Ayland
Signed-off-by: Mark Cave-Ayland
Signed-off-by: Laurent Vivier
---
hw/misc/Makefile.objs | 1 +
hw/misc/mac_via.c | 666 ++
include/hw/misc/mac_via.h | 107
3 files changed
From: Li Qiang
Cc: qemu-triv...@nongnu.org
Signed-off-by: Li Qiang
Reviewed-by: Peter Maydell
Reviewed-by: Fam Zheng
Message-id: 1538964972-3223-1-git-send-email-liq...@gmail.com
Signed-off-by: Stefan Hajnoczi
---
util/aio-posix.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff -
From: Laurent Vivier
Co-developed-by: Mark Cave-Ayland
Signed-off-by: Mark Cave-Ayland
Signed-off-by: Laurent Vivier
---
arch_init.c| 4 +
hw/display/Makefile.objs | 1 +
hw/display/macfb.c | 419 +
include/hw/display/m
From: Laurent Vivier
This is broken as the linux driver seems broken too...
Co-developed-by: Mark Cave-Ayland
Signed-off-by: Mark Cave-Ayland
Signed-off-by: Laurent Vivier
---
hw/audio/Makefile.objs | 1 +
hw/audio/asc.c | 446 +
incl
From: Laurent Vivier
Co-developed-by: Mark Cave-Ayland
Signed-off-by: Mark Cave-Ayland
Signed-off-by: Laurent Vivier
---
hw/scsi/esp.c | 292 +-
include/hw/scsi/esp.h | 7 ++
2 files changed, 270 insertions(+), 29 deletions(-)
diff --
From: Laurent Vivier
Co-developed-by: Mark Cave-Ayland
Signed-off-by: Mark Cave-Ayland
Signed-off-by: Laurent Vivier
---
hw/Makefile.objs| 1 +
hw/nubus/Makefile.objs | 4 +
hw/nubus/mac-nubus-bridge.c | 45
hw/nubus/nubus-bridge.c
From: Laurent Vivier
Co-developed-by: Mark Cave-Ayland
Signed-off-by: Mark Cave-Ayland
Signed-off-by: Laurent Vivier
---
hw/block/Makefile.objs | 1 +
hw/block/swim.c | 415
include/hw/block/swim.h | 76 +
3 files changed, 4
The following changes since commit 285278ca785f5fa9a570927e1c0958a2ca2b2150:
Merge remote-tracking branch 'remotes/famz/tags/testing-pull-request' into
staging (2018-10-27 19:55:08 +0100)
are available in the Git repository at:
git://github.com/stefanha/qemu.git tags/block-pull-request
for
From: Laurent Vivier
If you want to test the machine, it doesn't yet boot a MacROM, but you can
boot a linux kernel from the command line.
You can install your own disk using debian-installer with:
./qemu-system-m68k \
-M q800 \
-serial none -serial mon:stdio \
-m 1000M -drive f
From: Kees Cook
I spent way too much time trying to figure out why the emulated NVDIMM
was missing under Linux. In an effort to help others who might be looking
for these kinds of things in the future, include a hint.
Signed-off-by: Kees Cook
Message-id: 20181018201351.GA25286@beast
Signed-off-
Recent patches have removed ram_device and nonvolatile RAM
from dump-guest-memory's output. Do the same for dumps
that are extracted from a QEMU core file.
Signed-off-by: Paolo Bonzini
---
scripts/dump-guest-memory.py | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/script
Sorry, this pull request came out wrong. I will resend.
Stefan
From: Laurent Vivier
This is needed by Quadra 800, this card can run on little-endian
or big-endian bus.
Signed-off-by: Laurent Vivier
Tested-by: Hervé Poussineau
Reviewed-by: Philippe Mathieu-Daudé
---
hw/net/dp8393x.c | 88
1 file ch
From: Li Qiang
Cc: qemu-triv...@nongnu.org
Signed-off-by: Li Qiang
Reviewed-by: Peter Maydell
Reviewed-by: Fam Zheng
Message-id: 1538964972-3223-1-git-send-email-liq...@gmail.com
Signed-off-by: Stefan Hajnoczi
---
util/aio-posix.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff -
From: Stefan Markovic
Implement MIPS specific prctl() PR_SET_FP_MODE and PR_GET_FP_MODE emulation.
Reviewed-by: Aleksandar Markovic
Signed-off-by: Stefan Markovic
---
linux-user/mips/target_syscall.h | 2 ++
linux-user/mips64/target_syscall.h | 2 ++
linux-user/syscall.c | 6
From: Stefan Markovic
Floating-point mode is calculated from MIPS.abiflags FP ABI value
(based on kernel implementation). Illegal combinations are rejected.
Reviewed-by: Aleksandar Markovic
Signed-off-by: Stefan Markovic
---
linux-user/mips/cpu_loop.c | 75
From: Stefan Markovic
Add MIPS_ABI_FP_UNKNOWN as QEMU internal value to represent
unknown fp_abi (based on kernel mips/include/asm/elf.h definition)
Reviewed-by: Aleksandar Markovic
Signed-off-by: Stefan Markovic
---
include/elf.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/include/
From: Stefan Markovic
Add MIPS specific image_info struct fields fp_abi and interp_fp_abi
to store executable and interpreter fp_abi values (based on kernel
struct arch_elf_state in mips/include/asm/elf.h).
Reviewed-by: Aleksandar Markovic
Signed-off-by: Stefan Markovic
---
linux-user/qemu.h
From: Stefan Markovic
This series includes support for prctl() PR_GET_FP_MODE and PR_SET_FP_MODE.
This requires
extracting MIPS.abiflags section from ELF file and fp_abi value handling.
v1->v2:
- added commit messages
- fixed exit() error codes and appropriate exit messages printed
- min
From: Stefan Markovic
Read MIPS.abiflags section from ELF file into Mips_elf_abiflags_v0 struct.
Reviewed-by: Aleksandar Markovic
Signed-off-by: Stefan Markovic
---
linux-user/elfload.c | 33 +
1 file changed, 33 insertions(+)
diff --git a/linux-user/elfload.c
The following changes since commit 285278ca785f5fa9a570927e1c0958a2ca2b2150:
Merge remote-tracking branch 'remotes/famz/tags/testing-pull-request' into
staging (2018-10-27 19:55:08 +0100)
are available in the Git repository at:
git://github.com/stefanha/qemu.git tags/block-pull-request
for
On Mon, Oct 29, 2018 at 5:50 PM Paolo Bonzini wrote:
>
> Recent patches have removed ram_device and nonvolatile RAM
> from dump-guest-memory's output. Do the same for dumps
> that are extracted from a QEMU core file.
>
> Signed-off-by: Paolo Bonzini
Reviewed-by: Marc-André Lureau
> ---
> scr
From: Stefan Markovic
Set fp_abi and interp_fp_abi values to current fp_abi value read from
MIPS.abiflags.
Reviewed-by: Aleksandar Markovic
Signed-off-by: Stefan Markovic
---
linux-user/elfload.c | 4
1 file changed, 4 insertions(+)
diff --git a/linux-user/elfload.c b/linux-user/elfload
From: Kees Cook
I spent way too much time trying to figure out why the emulated NVDIMM
was missing under Linux. In an effort to help others who might be looking
for these kinds of things in the future, include a hint.
Signed-off-by: Kees Cook
Message-id: 20181018201351.GA25286@beast
Signed-off-
On 10/29/18 6:24 AM, Peter Maydell wrote:
On 27 October 2018 at 12:04, Guenter Roeck wrote:
On 10/26/18 3:12 AM, Peter Maydell wrote:
Hi Guenter; there's a proposal here to deprecate (and eventually
remove) the 'collie' board (strongarm) from QEMU. Is that one of
the ones you're currently usin
Future spice-server versions will call the client_monitors_config
callback with the monitors list filtered to only include the monitors
of the given display channel (aka QXLInstance). Luckily this is easily
detectable at runtime, so we can prepare for that in advance and also
make qemu compatible
From: Sebastian Krzyszkowiak
Without that, window effects in KWin get suspended as soon as any
qemu-sdl window becomes visible. While the SDL default makes sense
for games, it's not really suitable for QEMU.
Signed-off-by: Sebastian Krzyszkowiak
Message-id: 20181024143748.4425-1-...@dosowisko.n
The following changes since commit 285278ca785f5fa9a570927e1c0958a2ca2b2150:
Merge remote-tracking branch 'remotes/famz/tags/testing-pull-request' into
staging (2018-10-27 19:55:08 +0100)
are available in the git repository at:
git://git.kraxel.org/qemu tags/ui-20181029-pull-re
On 22 October 2018 at 18:35, Edgar E. Iglesias wrote:
> From: "Edgar E. Iglesias"
>
> This patch series adds initial support for Xilinx's Versal SoC.
> Xilinx is introducing Versal, an adaptive compute acceleration platform
> (ACAP), built on 7nm FinFET process technology. Versal ACAPs combine Sc
> On 26 Oct 2018, at 16:03, Markus Armbruster wrote:
>
> This is from my (imperfect) notes, corrections welcome.
>
> Motivation: QEMU contains stuff of dubious value, which gets in the way
> in various (sometimes painful and expensive) ways.
>
> Deprecation is the marking of an external inte
Hello, I would like to consult different versions of qemu virtual
machine. If I am doing hot migration, my current environment is cloudstack+ KVM
+ceph. One host has qemu version 2.9 and another has qemu version 2.6.I tried
low version to high version can be migrated, but high version,
On 25 October 2018 at 01:50, Julia Suvorova wrote:
> This series adds support for the nRF51 SoC UART, that used in
> BBC Micro:bit board, and QTest for it.
>
> v3:
> * serial_hd() moved to the board code
> * sysbus_init_child_obj() used for initialization
> * qemu_chr_fe_accept_input()
Hi Aleksandar,
> Without TARGET_MIPS64, we can't say we emulate R5900 - we are emulating
> some other CPU that never existed.
>
> Convince me that I am wrong.
R5900 O32 is usable. The R5900 toolchain is not yet ready for N32. Regarding
your proposal to rename TX79_MMI to MMI: what other ISAs do
> From: Stefan Markovic
> Subject: [PATCH v2 0/6] target/mips: Add support for prctl() PR_GET_FP_MODE
> and PR_SET_FP_MODE
>
> From: Stefan Markovic
>
> This series includes support for prctl() PR_GET_FP_MODE and PR_SET_FP_MODE.
> This requires
> extracting MIPS.abiflags section from ELF file
test_qmp_missing_any_arg() is about a bug in infrastructure used by
the QMP core, fixed in commit c489780203. We covered the bug in
infrastructure unit tests (commit bce3035a44). I wrote that test
earlier, to cover QMP level as well, the test could go into qmp-test.
Signed-off-by: Marc-André Lur
On 24 October 2018 at 12:37, Richard Henderson
wrote:
> Signed-off-by: Richard Henderson
> ---
> target/arm/kvm64.c | 63 --
> 1 file changed, 61 insertions(+), 2 deletions(-)
>
> diff --git a/target/arm/kvm64.c b/target/arm/kvm64.c
> index 5de8ff0ac5.
Hi Guenter,
On 29/10/18 15:09, Guenter Roeck wrote:
On 10/29/18 6:24 AM, Peter Maydell wrote:
On 27 October 2018 at 12:04, Guenter Roeck wrote:
On 10/26/18 3:12 AM, Peter Maydell wrote:
Hi Guenter; there's a proposal here to deprecate (and eventually
remove) the 'collie' board (strongarm) fr
> From: Fredrik Noring
> Subject: Re: [PATCH] target/mips: Support Toshiba specific three-operand MADD
> and MADDU
>
> Hi Aleksandar,
>
> > Without TARGET_MIPS64, we can't say we emulate R5900 - we are emulating
> > some other CPU that never existed.
> >
> > Convince me that I am wrong.
>
> R5
Pavel Dovgalyuk writes:
>> From: Alex Bennée [mailto:alex.ben...@linaro.org]
>> Pavel Dovgalyuk writes:
>> > One more question about your trace points.
>> > In case of using trace point on every instruction execution, we may need
>> > accessing vCPU registers (including the flags). Are they va
On 24 October 2018 at 12:37, Richard Henderson
wrote:
> Signed-off-by: Richard Henderson
> ---
> target/arm/kvm32.c | 33 -
> 1 file changed, 28 insertions(+), 5 deletions(-)
Reviewed-by: Peter Maydell
> +/*
> + * FIXME: There is not yet a way to read M
git repository at:
>
> git://git.kraxel.org/qemu tags/vga-20181029-pull-request
>
> for you to fetch changes up to e69a10f468d8f6aa6c00a4308f5a8e1f2fd6b3a1:
>
> vga_int: remove unused function protype (2018-10-29 10:43:48 +0100)
>
> -
On Wed, 12 Sep 2018 16:55:31 +0400
Marc-André Lureau wrote:
> hostmem-file and hostmem-memfd use the whole object path
maybe add something along the lines:
consisting from user supplied 'id' and ...
> for the
> memory region name, but hostname-ram uses only the path component (the
> basename):
From: Stefan Berger
This pull request fixes a couple of TPM support related issues,
such as full initialization of a variable to quiet down valgrind,
a possible race in the TPM related test cases and marking test
cases as skipped if swtpm was not found in PATH.
Stefan
The following changes s
From: Marc-André Lureau
Using g_spawn_async_with_pipes() is more complicated than running the
sync version. The async version returns a file descriptor for stdout, which may
not be fully read. Sometime "--tpm2" will failed to be read, and will
cause the related test to be silently skipped.
Use g
From: Aleksandar Markovic
The following changes since commit 03f400883a1dd92fac5b0d9127b38e34c9a722d7:
target/mips: Add MXU decoding engine (2018-10-29 14:13:47 +0100)
are available in the git repository at:
https://github.com/AMarkovic/qemu tags/mips-queue-october-2018-part-4
for you to
From: Craig Janeczek
Add emulation of non-MXU MULL within MXU decoding engine.
Reviewed-by: Aleksandar Markovic
Signed-off-by: Craig Janeczek
Signed-off-by: Aleksandar Markovic
---
target/mips/translate.c | 19 ++-
1 file changed, 18 insertions(+), 1 deletion(-)
diff --git a
From: Stefan Berger
Zero-init the ptm_loc structure so that we don't have fields that
are not initialised.
Signed-off-by: Stefan Berger
Reviewed-by: Philippe Mathieu-Daudé
---
hw/tpm/tpm_emulator.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/tpm/tpm_emulator.c b/hw/
From: Aleksandar Markovic
Add bit encoding for MXU accumulate add/subtract 1-bit pattern
'aptn1'.
Reviewed-by: Stefan Markovic
Signed-off-by: Aleksandar Markovic
---
target/mips/translate.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/target/mips/translate.c b/target/mips/transla
From: Aleksandar Markovic
Provide the placeholder and add the invocation logic for MXU
decoding engine.
Reviewed-by: Stefan Markovic
Signed-off-by: Aleksandar Markovic
---
target/mips/translate.c | 8
1 file changed, 8 insertions(+)
diff --git a/target/mips/translate.c b/target/mips
From: Craig Janeczek
Add bit encoding for MXU accumulate add/subtract 2-bit pattern
'aptn2'.
Reviewed-by: Stefan Markovic
Signed-off-by: Craig Janeczek
Signed-off-by: Aleksandar Markovic
---
target/mips/translate.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/target/mips/transla
From: Marc-André Lureau
If swtpm is not found in $PATH or --tpm2 isn't supported, let's mark
the test as SKIP.
Signed-off-by: Marc-André Lureau
Reviewed-by: Stefan Berger
Signed-off-by: Stefan Berger
---
tests/tpm-tests.c | 33 +
tests/tpm-util.c | 8 +--
From: Stefan Markovic
Add MIPS_ABI_FP_UNKNOWN as QEMU internal value to represent
unknown fp_abi (based on kernel mips/include/asm/elf.h definition)
Reviewed-by: Aleksandar Markovic
Signed-off-by: Stefan Markovic
---
include/elf.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/include/
From: Craig Janeczek
Add bit encoding for MXU operand getting pattern 'optn2'.
Reviewed-by: Stefan Markovic
Signed-off-by: Craig Janeczek
Signed-off-by: Aleksandar Markovic
---
target/mips/translate.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/target/mips/translate.c b/target/
From: Aleksandar Markovic
Coverity found two fallthroughs that miss break statement. Fix them.
Revieved-by: Stefan Markovic
Signed-off-by: Aleksandar Markovic
---
target/mips/translate.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/target/mips/translate.c b/target/mips/translate.c
in
From: Stefan Berger
My old email address will soon not work anymore, so change it to the
new domain.
Signed-off-by: Stefan Berger
---
MAINTAINERS | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/MAINTAINERS b/MAINTAINERS
index 40672c4eba..332353ce5c 100644
--- a/MAINTAINERS
From: Craig Janeczek
Add support for emulating the D16MAC MXU instruction.
Reviewed-by: Aleksandar Markovic
Signed-off-by: Craig Janeczek
Signed-off-by: Aleksandar Markovic
---
target/mips/translate.c | 90 +++--
1 file changed, 87 insertions(+), 3
From: Aleksandar Markovic
Add bit encoding for MXU execute 2-bit add/subtract pattern 'eptn2'.
Reviewed-by: Stefan Markovic
Signed-off-by: Aleksandar Markovic
---
target/mips/translate.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/target/mips/translate.c b/target/mips/translate.
From: Stefan Markovic
Read MIPS.abiflags section from ELF file into Mips_elf_abiflags_v0 struct.
Reviewed-by: Aleksandar Markovic
Signed-off-by: Stefan Markovic
---
linux-user/elfload.c | 33 +
1 file changed, 33 insertions(+)
diff --git a/linux-user/elfload.c
From: Stefan Berger
Add a few sentences about the implemented emulation of the TPM CRB
interface and its specification.
Signed-off-by: Stefan Berger
Reviewed-by: Marc-André Lureau
---
docs/specs/tpm.txt | 15 +++
1 file changed, 15 insertions(+)
diff --git a/docs/specs/tpm.txt b/
From: Craig Janeczek
Define a bit for MXU in insn_flags. This is the first non-MIPS
(third party) ASE supported in QEMU for MIPS, so it is placed in
the section "bits 56-63: vendor-specific ASEs".
Reviewed-by: Aleksandar Markovic
Signed-off-by: Craig Janeczek
Signed-off-by: Aleksandar Markovic
Emilio G. Cota writes:
> This lock will soon protect more fields of the struct. Give
> it a more appropriate name.
>
> Reviewed-by: Richard Henderson
> Signed-off-by: Emilio G. Cota
Reviewed-by: Alex Bennée
> ---
> include/qom/cpu.h | 5 +++--
> cpus-common.c | 14 +++---
> c
From: Craig Janeczek
Define and initialize the 16 MXU registers - 15 general computational
register, and 1 control register). There is also a zero register, but
it does not have any corresponding variable.
Reviewed-by: Richard Henderson
Signed-off-by: Craig Janeczek
Signed-off-by: Aleksandar M
From: Craig Janeczek
Add support for emulating the D16MUL MXU instruction.
Reviewed-by: Aleksandar Markovic
Signed-off-by: Craig Janeczek
Signed-off-by: Aleksandar Markovic
---
target/mips/translate.c | 66 ++---
1 file changed, 63 insertions(+), 3
From: Aleksandar Markovic
Move MUL, S32M2I, S32I2M handling out of switch. These are all
instructions that do not depend on MXU_EN flag of MXU_CR.
Reviewed-by: Stefan Markovic
Signed-off-by: Aleksandar Markovic
---
target/mips/translate.c | 41 +++--
1 file
From: Aleksandar Markovic
Add MXU decoding engine: add handlers for all instruction pools,
and main decode handler. The handlers, for now, for the purpose
of this patch, contain only sceleton in the form of a single
switch statement.
Reviewed-by: Stefan Markovic
Signed-off-by: Aleksandar Markov
From: Craig Janeczek
Adds support for emulating the Q8MUL and Q8MULSU MXU instructions.
Reviewed-by: Aleksandar Markovic
Signed-off-by: Craig Janeczek
Signed-off-by: Aleksandar Markovic
---
target/mips/translate.c | 101
1 file changed, 94 ins
From: Craig Janeczek
Add bit encoding for MXU operand getting pattern 'optn3'.
Reviewed-by: Stefan Markovic
Signed-off-by: Craig Janeczek
Signed-off-by: Aleksandar Markovic
---
target/mips/translate.c | 10 ++
1 file changed, 10 insertions(+)
diff --git a/target/mips/translate.c b/t
From: Julia Suvorova via Qemu-devel
New mini-kernel test for nRF51 SoC UART.
Signed-off-by: Julia Suvorova
Acked-by: Thomas Huth
Reviewed-by: Stefan Hajnoczi
Signed-off-by: Peter Maydell
---
tests/boot-serial-test.c | 19 +++
1 file changed, 19 insertions(+)
diff --git a/te
From: Craig Janeczek
Add support for emulating the S32LDD and S32LDDR MXU instructions.
Reviewed-by: Aleksandar Markovic
Signed-off-by: Craig Janeczek
Signed-off-by: Aleksandar Markovic
---
target/mips/translate.c | 54 ++---
1 file changed, 47 ins
From: Stefan Markovic
Set fp_abi and interp_fp_abi values to current fp_abi value read from
MIPS.abiflags.
Reviewed-by: Aleksandar Markovic
Signed-off-by: Stefan Markovic
---
linux-user/elfload.c | 4
1 file changed, 4 insertions(+)
diff --git a/linux-user/elfload.c b/linux-user/elfload
From: Aleksandar Markovic
Move MXU_EN check to the main MXU decoding function, to avoid code
repetition.
Reviewed-by: Stefan Markovic
Signed-off-by: Aleksandar Markovic
---
target/mips/translate.c | 509 ++--
1 file changed, 238 insertions(+), 271 d
From: "Edgar E. Iglesias"
Add a model of Xilinx Versal SoC.
Signed-off-by: Edgar E. Iglesias
Reviewed-by: Peter Maydell
Signed-off-by: Peter Maydell
---
hw/arm/Makefile.objs| 1 +
include/hw/arm/xlnx-versal.h| 122 +++
hw/arm/xlnx-versal.c| 3
From: Craig Janeczek
Add support for emulating the S32I2M and S32M2I MXU instructions.
This commit also contains utility functions for reading/writing
to MXU registers. This is required for overall MXU instruction
support.
Reviewed-by: Aleksandar Markovic
Signed-off-by: Craig Janeczek
Signed-o
From: Aleksandar Markovic
Add prefix, suffix, operation descriptions, and other corrections
and amendments to the comment that describes MXU ASE.
Reviewed-by: Stefan Markovic
Signed-off-by: Aleksandar Markovic
---
target/mips/translate.c | 84 +++--
From: Eric Auger
We are missing the VIRT_COMPAT_3_0 definition and setting.
Let's add them.
Signed-off-by: Eric Auger
Reviewed-by: Andrew Jones
Message-id: 20181024085602.16611-1-eric.au...@redhat.com
Signed-off-by: Peter Maydell
---
hw/arm/virt.c | 4
1 file changed, 4 insertions(+)
d
On 29/10/18 15:21, Peter Maydell wrote:
> On 29 October 2018 at 15:13, Peter Maydell wrote:
>> On 24 October 2018 at 12:37, Richard Henderson
>> wrote:
>>> Signed-off-by: Richard Henderson
>>> ---
>>> target/arm/kvm32.c | 33 -
>>> 1 file changed, 28 insertions(+
From: Craig Janeczek
Add support for emulating the S8LDD MXU instruction.
Reviewed-by: Aleksandar Markovic
Signed-off-by: Craig Janeczek
Signed-off-by: Aleksandar Markovic
---
target/mips/translate.c | 90 +++--
1 file changed, 87 insertions(+), 3
Emilio G. Cota writes:
> Instead of open-coding it.
>
> While at it, make sure that all accesses to the list are
> performed while holding the list's lock.
>
> Reviewed-by: Richard Henderson
> Signed-off-by: Emilio G. Cota
> ---
> include/qom/cpu.h | 6 +++---
> cpus-common.c | 25 +
From: Stefan Markovic
Floating-point mode is calculated from MIPS.abiflags FP ABI value
(based on kernel implementation). Illegal combinations are rejected.
Reviewed-by: Aleksandar Markovic
Signed-off-by: Stefan Markovic
---
linux-user/mips/cpu_loop.c | 75
On Mon, 29 Oct 2018, Aleksandar Markovic wrote:
> > > Without TARGET_MIPS64, we can't say we emulate R5900 - we are emulating
> > > some other CPU that never existed.
> > >
> > > Convince me that I am wrong.
> >
> > R5900 O32 is usable.
>
> Absolutely not. This kind of emulation infidelity can't
On 29 October 2018 at 15:13, Peter Maydell wrote:
> On 24 October 2018 at 12:37, Richard Henderson
> wrote:
>> Signed-off-by: Richard Henderson
>> ---
>> target/arm/kvm32.c | 33 -
>> 1 file changed, 28 insertions(+), 5 deletions(-)
>
> Reviewed-by: Peter Maydell
From: Aleksandar Markovic
Amend MXU instruction opcodes. Pool04 is actually only instruction
OPC_MXU_S16MAD. Two cases within S16MAD are recognized by 1-bit
subfield 'aptn1'.
Reviewed-by: Stefan Markovic
Signed-off-by: Aleksandar Markovic
---
target/mips/translate.c | 160
On 29 October 2018 at 15:40, Marc Zyngier wrote:
> My temptation would be not to expose it at all when running on a v7
> core, and return an error rather than zero.
>
> The other issue is that we currently don't support running 32bit KVM on
> any ARMv8 platform, as we strictly check the CPUs we wa
Emilio G. Cota writes:
> This will simplify the following commit's diff.
>
> Signed-off-by: Emilio G. Cota
Reviewed-by: Alex Bennée
> ---
> cpus-common.c | 18 +-
> 1 file changed, 9 insertions(+), 9 deletions(-)
>
> diff --git a/cpus-common.c b/cpus-common.c
> index 232cb1
I discussed the following maintainer updates at the kvm forum with
Conny. This is the first set of changes.
Can the affected persons please Ack the relevant patches?
PS: Alex, do you still want to be listed?
Christian Borntraeger (4):
MAINTAINERS: s390: more maintainers for vfio-ccw
MAINTAINE
From: Stefan Markovic
Add MIPS specific image_info struct fields fp_abi and interp_fp_abi
to store executable and interpreter fp_abi values (based on kernel
struct arch_elf_state in mips/include/asm/elf.h).
Reviewed-by: Aleksandar Markovic
Signed-off-by: Stefan Markovic
---
linux-user/qemu.h
On Mon, Oct 29, 2018 at 15:39:29 +, Alex Bennée wrote:
>
> Emilio G. Cota writes:
(snip)
> > @@ -357,7 +357,7 @@ struct CPUState {
> > sigjmp_buf jmp_env;
> >
> > QemuMutex work_mutex;
> > -struct qemu_work_item *queued_work_first, *queued_work_last;
> > +QSIMPLEQ_HEAD(, qem
Eric and Farhan will help with maintaining vfio-ccw.
Signed-off-by: Christian Borntraeger
---
MAINTAINERS | 2 ++
1 file changed, 2 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index d794bd7..10045b6 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1204,6 +1204,8 @@ F: include/hw/vfio/
Emilio G. Cota writes:
> The current implementation of exclusive work can suffer from high
> contention when the number of guest CPUs is large (> 16 or so). The
> reason is that all CPUs end up waiting on the same condvar/mutex pair,
> which unnecessarily slows them down to wake up.
FWIW this
From: Stefan Markovic
Implement MIPS specific prctl() PR_SET_FP_MODE and PR_GET_FP_MODE emulation.
Reviewed-by: Aleksandar Markovic
Signed-off-by: Stefan Markovic
---
linux-user/mips/target_syscall.h | 2 ++
linux-user/mips64/target_syscall.h | 2 ++
linux-user/syscall.c | 6
The s390-ccw bios and the ipl code do work in lock-step. Let us merge
them in the maintainer file.
Signed-off-by: Christian Borntraeger
---
MAINTAINERS | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/MAINTAINERS b/MAINTAINERS
index e63cfa2..8ce223d 100644
--- a/MAINTAINERS
From: Julia Suvorova via Qemu-devel
Wire up nRF51 UART in the corresponding SoC.
Signed-off-by: Julia Suvorova
Reviewed-by: Stefan Hajnoczi
Reviewed-by: Alistair Francis
Reviewed-by: Peter Maydell
Signed-off-by: Peter Maydell
---
include/hw/arm/nrf51_soc.h | 3 +++
hw/arm/microbit.c
On Sat, Oct 27, 2018 at 10:14:47 +0100, Alex Bennée wrote:
>
> Emilio G. Cota writes:
>
> > [I forgot to add the cover letter to git send-email; here it is]
> >
> > v3: https://lists.gnu.org/archive/html/qemu-devel/2018-10/msg04179.html
> >
> > "Why is this an RFC?" See v3 link above. Also, see
In http://lists.nongnu.org/archive/html/qemu-devel/2018-10/msg04181.html
(already upstream) I added a check for ASID changes without realizing
that TTBCR_EL1 has the A1 bit, controlling which register actually
contains the active ASID.
In http://lists.nongnu.org/archive/html/qemu-devel/2018-10/msg
Although we can't do much with ASIDs except remember them, this
will allow cleanups within target/ that should make things clearer.
Signed-off-by: Richard Henderson
---
include/exec/cpu-defs.h | 2 ++
include/exec/exec-all.h | 19 +++
accel/tcg/cputlb.c | 23 +++
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