On 10/26/2018 11:24 PM, Dr. David Alan Gilbert wrote:
* Peter Xu (pet...@redhat.com) wrote:
On Fri, Oct 26, 2018 at 09:10:19PM +0800, Fei Li wrote:
On 10/25/2018 08:58 PM, Peter Xu wrote:
On Thu, Oct 25, 2018 at 05:04:00PM +0800, Fei Li wrote:
[...]
@@ -1325,22 +1325,24 @@ bool multifd_
> From: Alex Bennée [mailto:alex.ben...@linaro.org]
> Pavel Dovgalyuk writes:
>
> >> From: Alex Bennée [mailto:alex.ben...@linaro.org]
> >> Pavel Dovgalyuk writes:
> >>
> >> >> From: Alex Bennée [mailto:alex.ben...@linaro.org]
> >> >> Any serious analysis tool should allow for us to track all me
Participants:
Christopher Dall, Marc Zyngier, Paolo Bonzini, Suraj Jitindar Singh, Frediano
Ziglio, Sean Christopherson, Radim Krcmar, Janosch Frank, Christian Borntraeger
+some more
- Discussion about common code for different architectures - initiated by my
talk
https://schd.ws/hosted_files/
On 10/25/18 9:17 AM, Yuval Shaia wrote:
Return value of 0 means ok, we want to free the memory only in case of
error.
Signed-off-by: Yuval Shaia
---
hw/rdma/vmw/pvrdma_cmd.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/rdma/vmw/pvrdma_cmd.c b/hw/rdma/vmw/pvrdma_c
Marc-André Lureau writes:
> Hi
>
> On Tue, Oct 9, 2018 at 8:41 PM Markus Armbruster wrote:
>>
>> Markus Armbruster writes:
>>
>> > Thomas Huth writes:
>> >
>> >> On 2018-08-31 15:24, Marc-André Lureau wrote:
[...]
>> >>> Tbh, I don't care so much about the naming of the test, but (for once)
>>
This patch adds PKU on Skylake-Server CPU model.
Changelog:
v2
Remove OSPKE which is not needed. Add
Skylake-Server-*-cpu.pku=off entries on
PC_COMPAT_3_0 to keep PKU disabled on
pc-*-3.0 and older.
Tao Xu (1):
i386: Add PKU on Skylake-Server CPU model
includ
As the release document ref below link (page 13):
https://software.intel.com/sites/default/files/managed/c5/15/\
architecture-instruction-set-extensions-programming-reference.pdf
PKU is supported in Skylake Server (Only Server) and later, and
on Intel(R) Xeon(R) Processor Scalable Family. So PKU i
Hi
On Wed, Oct 3, 2018 at 3:46 PM Marc-André Lureau
wrote:
>
> Hi,
>
> As discussed in the "[PATCH v10 6/6] tpm: add ACPI memory clear
> interface" thread, and proposed in the "[PATCH] RFC: mark non-volatile
> memory region", here is a small series to mark non-volvatile memory
> regions and skip
On Fri, Oct 26, 2018 at 05:23:37PM +0530, P J P wrote:
> +-- On Fri, 26 Oct 2018, Paolo Bonzini wrote --+
> | Oh, thanks! I said I was dumb. :) So the fix is just this:
> |
> | diff --git a/hw/audio/fmopl.h b/hw/audio/fmopl.h
> | index e7e578a48e..7199afaa3c 100644
> | --- a/hw/audio/fmopl.h
> |
On Thu, Oct 25, 2018 at 09:37:58PM +0100, Daniel P. Berrangé wrote:
> On Thu, Oct 25, 2018 at 10:52:56AM +0200, Gerd Hoffmann wrote:
> > While being at it deprecate cirrus too.
> >
> > Reason (short version): use stdvga instead.
> > Verbose version:
> > https://www.kraxel.org/blog/2014/10/qemu
On Thu, Oct 25, 2018 at 01:12:15PM +0200, Philippe Mathieu-Daudé wrote:
> Hi Gerd,
>
> On 25/10/18 10:52, Gerd Hoffmann wrote:
> > Simliar to deprecated machine types.
>
> "Similar"
>
> > Print a warning when creating a deprecated device.
> > Add deprecation notice to -device help.
> >
> > TODO
On Wed, Oct 24, 2018 at 04:37:48PM +0200, Sebastian Krzyszkowiak wrote:
> Without that, window effects in KWin get suspended as soon as any
> qemu-sdl window becomes visible. While the SDL default makes sense
> for games, it's not really suitable for QEMU.
>
> Signed-off-by: Sebastian Krzyszkowiak
On Mon, Oct 22, 2018 at 08:00:18PM -0700, Li Qiang wrote:
> This can avoid setting OCHIState.num_ports to a negative num.
Added to usb queue.
thanks,
Gerd
On Mon, Oct 22, 2018 at 04:00:53PM +0800, yuchen...@synology.com wrote:
> From: yuchenlin
>
> Signed-off-by: yuchenlin
> ---
> hw/display/vga_int.h | 1 -
> 1 file changed, 1 deletion(-)
>
> diff --git a/hw/display/vga_int.h b/hw/display/vga_int.h
> index 6e4fa48a79..55c418eab5 100644
> --- a/
On Fri, Oct 19, 2018 at 03:50:34AM -0700, Li Qiang wrote:
>
> Li Qiang (2):
> hw: ccid-card-emulated: introduce clean_event_notifier
> hw: ccid-card-emulated: cleanup resource when realize in error path
Added to usb queue.
thanks,
Gerd
> From: Emilio G. Cota [mailto:c...@braap.org]
> - 2-pass translation. Once a "TB translation" callback is called,
> the plugin must know the span of the TB. We should not
> force plugins to guess where the TB will end; that is strictly
> QEMU's job, and can change any time. A TB is thus a se
On 03/10/2018 13:44, Marc-André Lureau wrote:
> diff --git a/memory_mapping.c b/memory_mapping.c
> index 775466f3a8..724dd0b417 100644
> --- a/memory_mapping.c
> +++ b/memory_mapping.c
> @@ -206,7 +206,8 @@ static void guest_phys_blocks_region_add(MemoryListener
> *listener,
>
> /* we only
On Fri, 26 Oct 2018 12:13:21 -0300
Eduardo Habkost wrote:
> On Mon, Oct 22, 2018 at 03:33:30PM +0100, Igor Mammedov wrote:
> > On Wed, 12 Sep 2018 16:55:23 +0400
> > Marc-André Lureau wrote:
> >
> > > Improve a bit code readability.
> > >
> > > Signed-off-by: Marc-André Lureau
> > > ---
> >
On 2018-10-29 17:44, Gerd Hoffmann wrote:
On Mon, Oct 22, 2018 at 04:00:53PM +0800, yuchen...@synology.com wrote:
From: yuchenlin
Signed-off-by: yuchenlin
---
hw/display/vga_int.h | 1 -
1 file changed, 1 deletion(-)
diff --git a/hw/display/vga_int.h b/hw/display/vga_int.h
index 6e4fa48a79.
Concurrent call of multifd_save_cleanup() is unsafe, it will lead to
null pointer dereference. 'multifd_save_cleanup()' should not be called
in multifd_new_send_channel_async(), move it to ram_save_cleanup() like
other features do.
Signed-off-by: Liang Li
---
migration/migration.c | 5 -
mig
In that case, I guess this should be OK for now, as MXU support is
initiated by Craig and this will be
an easy add-on when he provide necessary information.
Reviewed-by: Stefan Markovic
On 28.10.18. 19:39, Aleksandar Markovic wrote:
>> Subject: Re: [PATCH v7 04/20] target/mips: Add and integ
Following the patch 04/20 discussion:
Reviewed-by: Stefan Markovic
On 26.10.18. 11:45, Stefan Markovic wrote:
>
> On 24.10.18. 14:18, Aleksandar Markovic wrote:
>> From: Aleksandar Markovic
>>
>> Move MUL, S32M2I, S32I2M handling out of switch. These are all
>> instructions that do not depend
On 26 October 2018 at 15:15, Fam Zheng wrote:
> The following changes since commit 808ebd66e467f77c0d1f8c6346235f81e9c99cf2:
>
> Merge remote-tracking branch 'remotes/riscv/tags/riscv-for-master-3.1-sf0'
> into staging (2018-10-25 17:41:03 +0100)
>
> are available in the Git repository at:
>
>
Hi; could somebody who understands the block layer refcounting have
a look at Coverity issues CID 1395870 and 1395871, please? In both
cases, Coverity reports a use-after-free because it thinks that a
sequence where a code path might (conditionally) end up calling
blk_deref() twice could be freeing
On 25 October 2018 at 21:19, Aleksandar Markovic
wrote:
> From: Dimitrije Nikolic
>
> Implement emulation of nanoMIPS EVA instructions. They are all
> part of P.LS.E0 instruction pool, or one of its subpools.
>
> Reviewed-by: Stefan Markovic
> Signed-off-by: Dimitrije Nikolic
> Signed-off-by: A
> From: Emilio G. Cota [mailto:c...@braap.org]
> Signed-off-by: Emilio G. Cota
> ---
> plugin-examples/bbcount_avgsize_racy.c | 50 ++
> plugin-examples/mem_count_racy_both.c | 58 ++
> plugin-examples/Makefile | 31 ++
> 3 fi
On Sun, Oct 28, 2018 at 01:40:29PM +0100, John Paul Adrian Glaubitz wrote:
> Hi!
>
> I just happened to read Gerd Hoffmann's post on the bochs-display [1] driver
> and was wondering what the future plans for VGA support are.
>
> Phoronix makes it sound like [2] that VGA support for guests is supp
On 19 October 2018 at 04:22, Jason Wang wrote:
> From: Zhang Chen
>
> We add almost full TCP state machine in filter-rewriter, except
> TCPS_LISTEN and some simplify in VM active close FIN states.
> The reason for this simplify job is because guest kernel will track
> the TCP status and wait 2MSL
Hi
On Wed, Oct 10, 2018 at 7:22 AM Peter Xu wrote:
>
> On Tue, Oct 09, 2018 at 12:54:37PM +0400, Marc-André Lureau wrote:
> > Hi
> > On Tue, Oct 9, 2018 at 10:28 AM Peter Xu wrote:
> > >
> > > Currently when QMP request queue full we won't resume the monitor until
> > > we have completely handle
> From: Peter Maydell
> Sent: Monday, October 29, 2018 11:57 AM
> Subject: Re: [PULL 2/3] target/mips: Implement emulation of nanoMIPS EVA
> instructions
>
> On 25 October 2018 at 21:19, Aleksandar Markovic
> wrote:
> > From: Dimitrije Nikolic
> >
> > Implement emulation of nanoMIPS EVA instru
From: Aleksandar Markovic
Coverity found two fallthroughs that lack break statements. Fix them.
Signed-off-by: Aleksandar Markovic
---
target/mips/translate.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/target/mips/translate.c b/target/mips/translate.c
index b8ace0b..813ad19 100644
-
On Tue, Oct 02, 2018 at 01:54:25PM +0400, Marc-André Lureau wrote:
> Hi
>
> On Thu, Sep 27, 2018 at 7:37 PM Liang Li wrote:
> >
> > During live migration, when stopping vhost-user device, 'vhost_dev_stop'
> > will be called, 'vhost_dev_stop' will call a batch of 'vhost_user_read'
> > and 'vhost_u
From: Aleksandar Markovic
Provide the placeholder and add the invocation logic for MXU
decoding engine.
Reviewed-by: Stefan Markovic
Signed-off-by: Aleksandar Markovic
---
target/mips/translate.c | 8
1 file changed, 8 insertions(+)
diff --git a/target/mips/translate.c b/target/mips
From: Aleksandar Markovic
This patch set begins to add MXU ASE instruction support.
v7->v8:
- corrected several mistakes in MXU ASE overview note
- add several clarifying comments
- rebased to the latest code
v6->v7:
- move MXU_EN check to the main MXU decoding function
- amend MXU
From: Craig Janeczek
Define and initialize the 16 MXU registers - 15 general computational
register, and 1 control register). There is also a zero register, but
it does not have any corresponding variable.
Reviewed-by: Richard Henderson
Signed-off-by: Craig Janeczek
Signed-off-by: Aleksandar M
From: Aleksandar Markovic
Add MXU decoding engine: add handlers for all instruction pools,
and main decode handler. The handlers, for now, for the purpose
of this patch, contain only sceleton in the form of a single
switch statement.
Reviewed-by: Stefan Markovic
Signed-off-by: Aleksandar Markov
From: Aleksandar Markovic
Add bit encoding for MXU accumulate add/subtract 1-bit pattern
'aptn1'.
Reviewed-by: Stefan Markovic
Signed-off-by: Aleksandar Markovic
---
target/mips/translate.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/target/mips/translate.c b/target/mips/transla
From: Craig Janeczek
Define a bit for MXU in insn_flags. This is the first non-MIPS
(third party) ASE supported in QEMU for MIPS, so it is placed in
the section "bits 56-63: vendor-specific ASEs".
Reviewed-by: Aleksandar Markovic
Signed-off-by: Craig Janeczek
Signed-off-by: Aleksandar Markovic
From: Craig Janeczek
Add bit encoding for MXU operand getting pattern 'optn3'.
Reviewed-by: Stefan Markovic
Signed-off-by: Craig Janeczek
Signed-off-by: Aleksandar Markovic
---
target/mips/translate.c | 10 ++
1 file changed, 10 insertions(+)
diff --git a/target/mips/translate.c b/t
From: Craig Janeczek
Add bit encoding for MXU accumulate add/subtract 2-bit pattern
'aptn2'.
Reviewed-by: Stefan Markovic
Signed-off-by: Craig Janeczek
Signed-off-by: Aleksandar Markovic
---
target/mips/translate.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/target/mips/transla
From: Aleksandar Markovic
Amend MXU instruction opcodes. Pool04 is actually only instruction
OPC_MXU_S16MAD. Two cases within S16MAD are recognized by 1-bit
subfield 'aptn1'.
Reviewed-by: Stefan Markovic
Signed-off-by: Aleksandar Markovic
---
target/mips/translate.c | 160
From: Craig Janeczek
Add bit encoding for MXU operand getting pattern 'optn2'.
Reviewed-by: Stefan Markovic
Signed-off-by: Craig Janeczek
Signed-off-by: Aleksandar Markovic
---
target/mips/translate.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/target/mips/translate.c b/target/
From: Craig Janeczek
Add emulation of non-MXU MULL within MXU decoding engine.
Reviewed-by: Aleksandar Markovic
Signed-off-by: Craig Janeczek
Signed-off-by: Aleksandar Markovic
---
target/mips/translate.c | 19 ++-
1 file changed, 18 insertions(+), 1 deletion(-)
diff --git a
From: Craig Janeczek
Add support for emulating the S32I2M and S32M2I MXU instructions.
This commit also contains utility functions for reading/writing
to MXU registers. This is required for overall MXU instruction
support.
Reviewed-by: Aleksandar Markovic
Signed-off-by: Craig Janeczek
Signed-o
Pavel Dovgalyuk writes:
>> From: Alex Bennée [mailto:alex.ben...@linaro.org]
>> Pavel Dovgalyuk writes:
>>
>> >> From: Alex Bennée [mailto:alex.ben...@linaro.org]
>> >> Pavel Dovgalyuk writes:
>> >>
>> >> >> From: Alex Bennée [mailto:alex.ben...@linaro.org]
>> >> >> Any serious analysis tool
From: Aleksandar Markovic
Add bit encoding for MXU execute 2-bit add/subtract pattern 'eptn2'.
Reviewed-by: Stefan Markovic
Signed-off-by: Aleksandar Markovic
---
target/mips/translate.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/target/mips/translate.c b/target/mips/translate.
From: Aleksandar Markovic
Add prefix, suffix, operation descriptions, and other corrections
and amendments to the comment that describes MXU ASE.
Reviewed-by: Stefan Markovic
Signed-off-by: Aleksandar Markovic
---
target/mips/translate.c | 84 +++--
From: Craig Janeczek
Add support for emulating the S8LDD MXU instruction.
Reviewed-by: Aleksandar Markovic
Signed-off-by: Craig Janeczek
Signed-off-by: Aleksandar Markovic
---
target/mips/translate.c | 90 +++--
1 file changed, 87 insertions(+), 3
From: Aleksandar Markovic
Move MUL, S32M2I, S32I2M handling out of switch. These are all
instructions that do not depend on MXU_EN flag of MXU_CR.
Reviewed-by: Stefan Markovic
Signed-off-by: Aleksandar Markovic
---
target/mips/translate.c | 41 +++--
1 file
From: Aleksandar Markovic
Move MXU_EN check to the main MXU decoding function, to avoid code
repetition.
Reviewed-by: Stefan Markovic
Signed-off-by: Aleksandar Markovic
---
target/mips/translate.c | 509 ++--
1 file changed, 238 insertions(+), 271 d
From: Craig Janeczek
Add support for emulating the D16MUL MXU instruction.
Reviewed-by: Aleksandar Markovic
Signed-off-by: Craig Janeczek
Signed-off-by: Aleksandar Markovic
---
target/mips/translate.c | 66 ++---
1 file changed, 63 insertions(+), 3
From: Craig Janeczek
Adds support for emulating the Q8MUL and Q8MULSU MXU instructions.
Reviewed-by: Aleksandar Markovic
Signed-off-by: Craig Janeczek
Signed-off-by: Aleksandar Markovic
---
target/mips/translate.c | 101
1 file changed, 94 ins
From: Craig Janeczek
Add support for emulating the D16MAC MXU instruction.
Reviewed-by: Aleksandar Markovic
Signed-off-by: Craig Janeczek
Signed-off-by: Aleksandar Markovic
---
target/mips/translate.c | 90 +++--
1 file changed, 87 insertions(+), 3
From: Craig Janeczek
Add support for emulating the S32LDD and S32LDDR MXU instructions.
Reviewed-by: Aleksandar Markovic
Signed-off-by: Craig Janeczek
Signed-off-by: Aleksandar Markovic
---
target/mips/translate.c | 54 ++---
1 file changed, 47 ins
Hi
On Wed, Oct 10, 2018 at 7:54 AM Peter Xu wrote:
>
> On Tue, Oct 09, 2018 at 05:12:48PM +0400, Marc-André Lureau wrote:
> > The feature should be set if the chardev is able to switch
> > GMainContext. Callers that want to put a chardev in a different thread
> > context can/should check this cap
> From: Aleksandar Markovic
> Subject: [PATCH v8 00/20] target/mips: Add limited support for Ingenic's MXU
> ASE
>
> From: Aleksandar Markovic
>
> This patch set begins to add MXU ASE instruction support.
>
Craig, do you have any comments/suggestions on this series?
Regards,
Aleksandar
> v
Hi, everyone.
When I have installed the QEMU3.0.0 in the Linux on non X86 CPUS, I want
to use user space emulator to run X86 executable. So I get the document from
the QEMU web page (QEMU document) .
I find the section 5.3 and read the content. But I have some questions in the
following:
Hi
On Wed, Oct 10, 2018 at 7:45 AM Peter Xu wrote:
>
> On Tue, Oct 09, 2018 at 05:12:47PM +0400, Marc-André Lureau wrote:
> > Chardev backends may not handle safely IO events from concurrent
> > threads. Better to wake up the chardev from the monitor IO thread if
> > it's being used as the charde
>
> From: Aleksandar Markovic
> Subject: Re: [PATCH] target/mips: Support Toshiba specific three-operand MADD
> and MADDU
>
> > From: Richard Henderson
> > Sent: Tuesday, October 16, 2018 8:37 PM
> > Subject: Re: [PATCH] target/mips: Support Toshiba specific three-operand
> > MADD and > MADDU
On 26 October 2018 at 16:31, Laurent Vivier wrote:
> The following changes since commit 808ebd66e467f77c0d1f8c6346235f81e9c99cf2:
>
> Merge remote-tracking branch 'remotes/riscv/tags/riscv-for-master-3.1-sf0'
> into staging (2018-10-25 17:41:03 +0100)
>
> are available in the Git repository at:
Hi
On Wed, Oct 10, 2018 at 8:38 AM Peter Xu wrote:
>
> On Tue, Oct 09, 2018 at 05:12:49PM +0400, Marc-André Lureau wrote:
> > Note: this patch will conflict with Peter "[PATCH v9 3/6] monitor:
> > remove "x-oob", turn oob on by default", but can be trivially updated.
> >
> > Signed-off-by: Marc-A
Hi; Coverity is complaining (in CID 1396476) about a problem in the
handle_vec_simd_shli() function, where we might dereference sli_op[]
with a size that's greater than 3. It thinks size might be > 3 because
we do a check
if (size > 3 && !is_q) {
unallocated_encoding(s);
retu
On Wed, 12 Sep 2018 16:55:28 +0400
Marc-André Lureau wrote:
> Set globals for all objects, although only TYPE_DEVICE &
> TYPE_USER_CREATABLE can have globals for now.
>
> Signed-off-by: Marc-André Lureau
> ---
> hw/core/qdev.c | 6 --
> qom/object.c | 2 ++
> 2 files changed, 2 insertion
> From: Alex Bennée [mailto:alex.ben...@linaro.org]
> Pavel Dovgalyuk writes:
> > One more question about your trace points.
> > In case of using trace point on every instruction execution, we may need
> > accessing vCPU registers (including the flags). Are they valid in such
> > cases?
>
> They
wj193102 writes:
> Hi, everyone.
>When I have installed the QEMU3.0.0 in the Linux on non X86 CPUS, I
> want to use user space emulator to run X86 executable. So I get the document
> from the QEMU web page (QEMU document) .
> I find the section 5.3 and read the content. But I have som
The transcript of the KVM Forum Contributor Q&A Panel is available here:
https://etherpad.net/p/KVMForum2018Panel
The topics discussed included how to get big features upstream,
email/patch workflow, how to discuss ideas with the community,
Spectre/Meltdown, and the perspective of cloud providers
On 29/10/18 7:29, Li Qiang wrote:
This avoid a memory leak in unhotplug nvme device.
Signed-off-by: Li Qiang
Reviewed-by: Philippe Mathieu-Daudé
---
hw/block/nvme.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/hw/block/nvme.c b/hw/block/nvme.c
index 359a06d0ad..09d7c90259 1006
On 10/29/18 12:06 PM, Peter Maydell wrote:
> I'm having difficulty figuring out where this check has come from;
> it doesn't seem to match up with the pseudocode and in any case
> I don't think size can ever be > 3. We calculate:
>
> int size = 32 - clz32(immh) - 1;
> where immh is a 4 bit fie
On 29/10/18 13:06, Peter Maydell wrote:
Hi; Coverity is complaining (in CID 1396476) about a problem in the
handle_vec_simd_shli() function, where we might dereference sli_op[]
with a size that's greater than 3. It thinks size might be > 3 because
we do a check
if (size > 3 && !is_q) {
On 29 October 2018 at 12:32, Richard Henderson
wrote:
> On 10/29/18 12:06 PM, Peter Maydell wrote:
>> I'm having difficulty figuring out where this check has come from;
>> it doesn't seem to match up with the pseudocode and in any case
>> I don't think size can ever be > 3. We calculate:
>>
>>
The following changes since commit b312532fd03413d0e6ae6767ec793a3e30f487b8:
Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into staging
(2018-10-19 19:01:07 +0100)
are available in the git repository at:
git://git.kraxel.org/qemu tags/vga-20181029-pull-reques
From: yuchenlin
Signed-off-by: yuchenlin
Reviewed-by: Philippe Mathieu-Daudé
Message-id: 20181022080053.9379-1-yuchen...@synology.com
Signed-off-by: Gerd Hoffmann
---
hw/display/vga_int.h | 1 -
1 file changed, 1 deletion(-)
diff --git a/hw/display/vga_int.h b/hw/display/vga_int.h
index 6e4f
See qemu_spice_add_display_interface(), the console index is also used
as channel id. So put that into the qxl->id field too.
In typical use cases (one primary qxl-vga device, optionally one or more
secondary qxl devices, no non-qxl display devices) this doesn't change
anything.
With this in pla
On 29.10.18. 12:15, Aleksandar Markovic wrote:
> From: Aleksandar Markovic
>
> Coverity found two fallthroughs that lack break statements. Fix them.
>
> Signed-off-by: Aleksandar Markovic
> ---
> target/mips/translate.c | 2 ++
> 1 file changed, 2 insertions(+)
Reviewed-by: Stefan Markovic
Hi,
Here is a small series of fixes for the monitor, mostly related to
threading issues.
v2: after Peter review
- patch 2: fix resuming with oob=off
- patch 4: keep MUX case explicit, improve commit message
Marc-André Lureau (6):
monitor: inline ambiguous helper functions
monitor: accept c
The feature should be set if the chardev is able to switch
GMainContext. Callers that want to put a chardev in a different thread
context can/should check this capabilities.
Signed-off-by: Marc-André Lureau
---
include/chardev/char.h | 3 +++
chardev/char.c | 11 +++
2 files cha
Chardev backends may not handle safely IO events from concurrent
threads. Better to wake up the chardev from the monitor IO thread if
it's being used as the chardev context.
Unify code paths by using a BH in all cases.
Drop the now redundant aio_notify() call.
Signed-off-by: Marc-André Lureau
-
The function were not named with "mon_iothread", or following the AIO
vs GMainContext distinction. Inline them instead.
Signed-off-by: Marc-André Lureau
---
monitor.c | 14 ++
1 file changed, 2 insertions(+), 12 deletions(-)
diff --git a/monitor.c b/monitor.c
index 823b5a1099..07712
When a monitor is connected to a Spice chardev, the monitor cleanup
can dead-lock:
#0 0x7f43446637fd in __lll_lock_wait () at /lib64/libpthread.so.0
#1 0x7f434465ccf4 in pthread_mutex_lock () at /lib64/libpthread.so.0
#2 0x556dd79f22ba in qemu_mutex_lock_impl (mutex=0x556dd81c922
In our current code, when multifd is used during migration, if there
is an error before the destination receives all new channels, the
source keeps running, however the destination does not exit but keeps
waiting until the source is killed deliberately.
Fix this by simply killing the destination w
When qemu_signal_init() fails in qemu_init_main_loop(), we return
without setting an error. Its callers crash then when they try to
report the error with error_report_err().
To avoid such segmentation fault, add a new Error parameter to make
the call trace to propagate the err to the final caller
qemu_log_mask(GUEST_ERROR) is more appropriate:
$ qemu -d help
Log items (comma separated):
guest_errorslog when the guest OS does something invalid (eg accessing a
non-existent register)
Signed-off-by: Philippe Mathieu-Daudé
Acked-by: Michael Walle
---
v3: Fixed format string (Peter
Hi,
This idea comes from BiteSizedTasks, and this patch series implement
the error checking of qemu_thread_create: make qemu_thread_create
return a flag to indicate if it succeeded rather than failing with an
error; make all callers check it.
The first and the third patch fixes some segmentation
Add a monitor_destroyed global to check if monitor_cleanup() has been
already called. In this case, don't insert the new monitor in the
list, but free it instead.
Signed-off-by: Marc-André Lureau
---
monitor.c | 14 --
1 file changed, 12 insertions(+), 2 deletions(-)
diff --git a/mo
When multifd is used during migration, a segmentaion fault will
occur in the source when multifd_save_cleanup() is called again if
the multifd_send_state has been freed in earlier error handling. This
can happen when migrate_fd_connect() fails and multifd_fd_cleanup()
is called, and then multifd_ne
This patch is to pave the way for a later patch as it is too long:
"qemu_thread_create: propagate the error to callers to handle."
The callers of qemu_init_vcpu() already passed the **errp to handle
errors. In view of this, add a new Error parameter to all the
functions called by qemu_init_vcpu()
Add error handling for qemu_ram_foreach_migratable_block() when
it fails.
Always call migrate_set_error() to set the error state without relying
on whether multifd_save_cleanup() succeeds. As the passed &local_err
is never used in multifd_save_cleanup(), remove it.
Signed-off-by: Fei Li
---
mig
To avoid the segmentation fault in qemu_thread_join(), just directly
return when the QemuThread *thread failed to be created in either
qemu-thread-posix.c or qemu-thread-win32.c.
Signed-off-by: Fei Li
Reviewed-by: Fam Zheng
---
util/qemu-thread-posix.c | 3 +++
util/qemu-thread-win32.c | 2 +-
Not all backends are able to switch gcontext. Those backends cannot
drive a OOB monitor (the monitor would then be blocking on main
thread).
For example, ringbuf, spice, or more esoteric input chardevs like
braille or MUX.
We currently forbid MUX because not all frontends are ready to run
outside
Make qemu_thread_create() return a Boolean to indicate if it succeeds
rather than failing with an error. And add an Error parameter to hold
the error message and let the callers handle it.
Signed-off-by: Fei Li
---
cpus.c | 45 ++-
dump.c
On 24 October 2018 at 12:25, Andrew Jones wrote:
> On Wed, Oct 24, 2018 at 10:56:02AM +0200, Eric Auger wrote:
>> We are missing the VIRT_COMPAT_3_0 definition and setting.
>> Let's add them.
>>
>> Signed-off-by: Eric Auger
>> ---
>> hw/arm/virt.c | 4
>> 1 file changed, 4 insertions(+)
>>
On 26 October 2018 at 08:30, P J P wrote:
> From: Prasad J Pandit
>
> The high[32:28] bits of 'direction' and 'state' registers of
> SA-1100/SA-1110 device are reserved. Setting them may lead to
> OOB 's->handler[]' array access issue. Mask off [32:28] bits to
> avoid it.
There is no bit 32 in a
exit() error codes are taken and left over from related kernel code. Will be
set to 1 in next series version. Also, appropriate error messages printing will
be added.
Regards,
Stefan
Original Message
Subject: Re: [Qemu-devel] [PATCH 5/6] Determine the desired FPU mode
Date:
On Wed, 12 Sep 2018 16:55:27 +0400
Marc-André Lureau wrote:
> Handle calls of object_property_set_globals() with any object type,
> but only apply globals to TYPE_DEVICE & TYPE_USER_CREATABLE.
>
> Signed-off-by: Marc-André Lureau
> ---
> qom/globals.c | 22 ++
> 1 file chan
On 27 October 2018 at 12:04, Guenter Roeck wrote:
> On 10/26/18 3:12 AM, Peter Maydell wrote:
>> Hi Guenter; there's a proposal here to deprecate (and eventually
>> remove) the 'collie' board (strongarm) from QEMU. Is that one of
>> the ones you're currently using in your automated testing of Linu
29.10.2018, 09:46, "Marc-André Lureau" :
> Hi
>
> On Mon, Oct 22, 2018 at 5:24 PM Yury Kotov wrote:
>
>> Hi,
>>
>> I examined vhost-user devices and found some chardev using strangeness.
>>
>> Is it ok, that vhost-user's set_status do sync chardev io ops from KVM
>> thread?
>> It seems tha
From: Mao Zhongyi
Cc: Jan Kiszka
Cc: Philippe Mathieu-Daudé
Cc: Peter Maydell
Signed-off-by: Mao Zhongyi
Reviewed-by: Philippe Mathieu-Daudé
Message-id: 20181022074050.19638-4-maozhon...@cmss.chinamobile.com
Signed-off-by: Gerd Hoffmann
---
include/hw/audio/wm8750.h | 1 +
hw/arm/musicpa
The following changes since commit 285278ca785f5fa9a570927e1c0958a2ca2b2150:
Merge remote-tracking branch 'remotes/famz/tags/testing-pull-request' into
staging (2018-10-27 19:55:08 +0100)
are available in the git repository at:
git://git.kraxel.org/qemu tags/audio-20181029-pu
From: Li Qiang
Signed-off-by: Li Qiang
Reviewed-by: Philippe Mathieu-Daudé
Message-id: 20181013060809.52496-1-liq...@163.com
Signed-off-by: Gerd Hoffmann
---
hw/audio/ac97.c | 12
1 file changed, 8 insertions(+), 4 deletions(-)
diff --git a/hw/audio/ac97.c b/hw/audio/ac97.c
inde
From: Laurent Vivier
Co-developed-by: Mark Cave-Ayland
Signed-off-by: Mark Cave-Ayland
Signed-off-by: Laurent Vivier
---
hw/misc/mac_via.c | 190 ++
include/hw/misc/mac_via.h | 7 ++
2 files changed, 197 insertions(+)
diff --git a/hw/misc
1 - 100 of 391 matches
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