On Fri, Oct 26, 2018 at 7:14 PM Dayeol Lee wrote:
>
> Hi,
>
> I submitted the patch, but just found this has been already fixed by
> Michael Clark
> and pushed to riscv/riscv-qemu https://github.com/riscv/riscv-qemu/pull/166
> but not in the upstream.
>
> Do we still need this patch?
Yeah, this p
On Fri, Oct 26, 2018 at 9:41 AM Luc Michel wrote:
>
> This commit adds the cpu-cluster type. It aims at gathering CPUs from
> the same cluster in a machine.
>
> For now it only has a `cluster-id` property.
>
> Signed-off-by: Luc Michel
> ---
> include/hw/cpu/cluster.h | 38 ++
Emilio G. Cota writes:
> [I forgot to add the cover letter to git send-email; here it is]
>
> v3: https://lists.gnu.org/archive/html/qemu-devel/2018-10/msg04179.html
>
> "Why is this an RFC?" See v3 link above. Also, see comment at
> the bottom of this message regarding the last patch of this s
add pvpanic device in virt acpi table, so when kenrel command line uses
acpi=force, kernel can get info from acpi table in aarch64.
Signed-off-by: Peng Hao
---
hw/arm/virt-acpi-build.c | 16
1 file changed, 16 insertions(+)
diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-ac
From: Philippe Mathieu-Daudé
The 'pvpanic' ISA device can be use by any machine with an ISA bus.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/misc/Makefile.objs | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/misc/Makefile.objs b/hw/misc/Makefile.objs
index 6d50b03..2499
From: Philippe Mathieu-Daudé
To ease the MMIO device addition in the next patch, rename:
- ISA_PVPANIC_DEVICE -> PVPANIC (this just returns a generic Object),
- ISADevice parent_obj -> isadev,
- MemoryRegion io -> mr.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/misc/pvpanic.c | 16 +--
add pvpanic device in aarch64 virt machine.
Signed-off-by: Peng Hao
Signed-off-by: Philippe Mathieu-Daudé
---
default-configs/aarch64-softmmu.mak | 1 +
hw/arm/virt.c | 21 +
include/hw/arm/virt.h | 1 +
3 files changed, 23 insertions(+)
Signed-off-by: Peng Hao
Signed-off-by: Philippe Mathieu-Daudé
---
hw/misc/pvpanic.c | 81 +--
include/hw/misc/pvpanic.h | 1 +
2 files changed, 65 insertions(+), 17 deletions(-)
diff --git a/hw/misc/pvpanic.c b/hw/misc/pvpanic.c
index dd3aef2
The first patches are simple cleanups:
- patch 1 move the pvpanic device with the 'ocmmon objects' so we compile
it once for the x86/arm/aarch64 archs,
- patch 2 simply renames ISA fields/definitions to generic ones.
Then instead of add/use the MMIO pvpanic device in the virt machine in an
uniqu
On 10/26/18 3:12 AM, Peter Maydell wrote:
On 26 October 2018 at 11:06, Thomas Huth wrote:
These files lack an entry in the MAINTAINERS file, and according to
the initial commits, the board and devices are incomplete. Since there
have hardly been any commits in the past to really improve them, w
Hello,
Thanks for working on this!
There is a lot of overlap with tcp_listen. It'd be much better to
refactor it this way:
struct socket *
tcpx_listen(Slirp *slirp, struct sockaddr *addr, socklen_t *addrlen, int flags)
{
... The current content of tcp_listen, with all heading and
Samuel Thibault, le sam. 27 oct. 2018 13:11:41 +0200, a ecrit:
> struct socket *
> tcp_listen(Slirp *slirp, uint32_t haddr, u_int hport, uint32_t laddr,
>u_int lport, int flags)
> {
> struct sockaddr_in addr;
> struct socket *so;
> socklen_t addrsize = sizeof(addr);
A
Ditto :)
Samuel
Hello,
Maxim Samoylov, le ven. 26 oct. 2018 03:03:42 +0300, a ecrit:
> +int slirp_remove_ipv6_hostfwd(Slirp *slirp, int is_udp,
> + struct in6_addr host_addr, int host_port)
Similarly, we'd rather share the code than duplicate it :)
Better put the existing slirp_remo
Maxim Samoylov, le ven. 26 oct. 2018 03:03:43 +0300, a ecrit:
> +void hmp_ipv6_hostfwd_remove(Monitor *mon, const QDict *qdict)
> +{
Similarly, a lot can be shared, by introducing
const char *hmp_hostfwd_lookup(Monitor *mon, const QDict *qdict, int is_v6)
which will contain all the lookup and t
On Thu, Oct 18, 2018 at 10:21 PM Stefan Berger
wrote:
>
> Add a few sentences about the implemented emulation of the TPM CRB
> interface and its specification.
>
> Signed-off-by: Stefan Berger
Reviewed-by: Marc-André Lureau
> ---
> docs/specs/tpm.txt | 15 +++
> 1 file changed, 15
On 26 October 2018 at 03:00, Michael S. Tsirkin wrote:
> OK I fixed 32 bit issues. Could not reproduce the test issues,
> could it be that it was a side effect of build issues maybe?
>
> Could you retyr?
> If it still ails I will drop the test for now.
Compiles OK, but still asserts
ERROR:/home/
On 10/27/18 1:16 AM, Emilio G. Cota wrote:
> On Tue, Oct 23, 2018 at 08:02:47 +0100, Richard Henderson wrote:
>> +static void tlb_flush_page_locked(CPUArchState *env, int midx,
>> + target_ulong addr)
>> +{
>> +target_ulong lp_addr = env->tlb_d[midx].large_page_
Daniel P. Berrangé writes:
> On Fri, Oct 26, 2018 at 04:03:51PM +0200, Markus Armbruster wrote:
>> This is from my (imperfect) notes, corrections welcome.
>>
>> Motivation: QEMU contains stuff of dubious value, which gets in the way
>> in various (sometimes painful and expensive) ways.
>>
>> Dep
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