Hello,
Now savevm, loadvm and delvm commands only allowed from hmp monitor.
This patch adds ability to send them via QMP api.
Signed-off-by: Pavel Balaev
---
hmp.c | 22 +-
migration/savevm.c | 27 +++
qapi/misc.json | 54 +++
On 2018-04-16 17:29, Peter Maydell wrote:
> On 16 April 2018 at 16:25, Jan Kiszka wrote:
>> On 2018-04-01 23:17, Jan Kiszka wrote:
>>> From: Jan Kiszka
>>>
>>> The spec does not justify clearing of any E1000_ICR_OTHER_CAUSES when
>>> E1000_ICR_OTHER is set in EIAC. In fact, removing this code fix
On 2018-03-29 14:51, Jan Kiszka wrote:
> From: Jan Kiszka
>
> Counting from the IVHD ID field to the all-devices entry, we have 28
> bytes, not 36.
>
> Signed-off-by: Jan Kiszka
> ---
> hw/i386/acpi-build.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/hw/i386/acpi-
We support up to 6 levels, but those are encoded as 10b according to the
AMD IOMMU spec (chapter 3.3.1, Extended Feature Register).
Signed-off-by: Jan Kiszka
---
hw/i386/amd_iommu.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/hw/i386/amd_iommu.h b/hw/i386/amd_iommu.h
On 2018-04-03 17:36, Jan Kiszka wrote:
> These patches allow to run Jailhouse in emulated x86-64 mode under QEMU.
> AMD IOMMU only works with one additional hack, but that's a different
> story, and we can test these changes without it.
>
> Change in v2:
> - build fix for 32-bit hosts
> - replac
Hi,
> You must /sometimes/ supply the correct machine type.
>
> It is quite dependent on the guest OS you have installed, and even
> just how the guest OS is configured. In general Linux is very
> flexible and can adapt to a wide range of hardware, automatically
> detecting things as needed. I
Beside rpi3 usb emulation not being there you are using the wrong
argument. bus= specifies the *guest* bus. hostbus= can be used to
specify the host bus number. When passing through devices using
vendorid and productid this should not be needed though. Oh, and you
can't pass through usb hubs, o
Doesn't reproduce. The *default* driver is changed to spice when spice
is enabled, but overriding using QEMU_AUDIO_DRV is not disabled. Any
chance you didn't export QEMU_AUDIO_DRV?
--
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
htt
Peter reported that the boot-serial tester sometimes runs into timeouts
with SPARC guests. It's currently completely unclear whether this is due
to too much load on the host machine (so that the guest really just ran
too slow), or whether there is something wrong with the guest's firmware
boot. For
On 22 May 2018 at 04:03, Peter Xu wrote:
> On Mon, May 21, 2018 at 03:03:49PM +0100, Peter Maydell wrote:
>> If an IOMMU supports mappings that care about the memory
>> transaction attributes, then it no longer has a unique
>> address -> output mapping, but more than one. We can
>> represent these
Hi,
Am 18.05.2018 um 17:30 schrieb Michael S. Tsirkin:
> Unfortunately this means that it's no longer possible
> to more or less reliably boot a VM just given a disk image,
> even if you select the correct QEMU binary:
...
> Would it be reasonable to support storing this information in the qcow
>
On 8 April 2018 at 02:50, Shannon Zhao wrote:
> On 2018/4/6 17:36, Peter Maydell wrote:
>> On reflection, I think I'd aim for 2.13 for this, since:
>> * it's not a regression
>> * it doesn't actually affect any of our boards, because
>>none of them define enough interrupt lines that they
>>
Peter Maydell writes:
> Add more detail to the documentation for memory_region_init_iommu()
> and other IOMMU-related functions and data structures.
>
> Signed-off-by: Peter Maydell
Reviewed-by: Alex Bennée
> ---
> v2->v3 changes:
> * minor wording tweaks per Eric's review
> * moved the bi
Peter Maydell writes:
> As part of plumbing MemTxAttrs down to the IOMMU translate method,
> add MemTxAttrs as an argument to tb_invalidate_phys_addr().
> Its callers either have an attrs value to hand, or don't care
> and can use MEMTXATTRS_UNSPECIFIED.
>
> Signed-off-by: Peter Maydell
Review
> > --- /dev/null
> > +++ b/include/hw/display/bochs-vbe.h
> > @@ -0,0 +1,64 @@
>
> No header guards & copyright notice?
Header guards ok.
Copyright?
I don't think interface #defines like this are copyrightable ...
cheers,
Gerd
On 22 May 2018 at 07:52, Jan Kiszka wrote:
> There was a nasty flip in identifying which register group an access is
> targeting. The issue caused spuriously raised priorities of the guest
> when handing CPUs over in the Jailhouse hypervisor.
>
> Signed-off-by: Jan Kiszka
Oops. Applied to target
On Fri, May 18, 2018 at 05:13:27PM +0200, Marc-André Lureau wrote:
> Hi
>
> On Thu, May 17, 2018 at 11:25 AM, Gerd Hoffmann wrote:
> > Signed-off-by: Gerd Hoffmann
> > ---
>
> Could you explain where the 0x80 offset comes from?
Pulled out of thin air. Standard pci cfg space header size is 0x4
Hi Richard,
On Sat, May 12, 2018 at 10:57 AM, Richard Henderson
wrote:
> I have one xtensa image against which to test this.
> There are enough options going on here in the xtensa
> frontend that this probably needs a better work-out.
>
>
> r~
>
>
> Richard Henderson (4):
> target/xtensa: Repla
On 05/21/18 13:53, Marcel Apfelbaum wrote:
>
>
> On 05/20/2018 10:28 AM, Zihan Yang wrote:
>> Currently only q35 host bridge us allocated space in MCFG table. To
>> put pxb host
>> into sepratate pci domain, each of them should have its own
>> configuration space
>> int MCFG table
>>
>> Signed-of
On 21 May 2018 at 23:01, Eduardo Habkost wrote:
> This provides the QEMU part of the mitigations for the speculative
> store buffer bypass vulnerabilities on the x86 platform[1], and is
> the companion of the kernel patches merged in:
>
>
> https://git.kernel.org/pub/scm/linux/kernel/git/torval
On 21 May 2018 at 16:49, Michael Walle wrote:
> The following changes since commit 81e9cbd0ca1131012b058df6804b1f626a6b730c:
>
> lm32: take BQL before writing IP/IM register (2018-05-21 13:37:12 +0200)
>
> are available in the git repository at:
>
> git://github.com/mwalle/qemu.git tags/lm32-q
On 30 April 2018 at 11:33, Daniel P. Berrangé wrote:
> a) Bump major version once a year, so we'll have 3.0, 3.1, 3.3,
> 4.0, 4.1, 4.2, 5.0, ...etc We missed the first release this
> year, so we would only have 3.0 and 3.1 this year.
I realised we didn't really come to a conclusion in t
On 21 May 2018 at 20:34, Stefano Stabellini wrote:
> The following changes since commit d32e41a1188e929cc0fb16829ce3736046951e39:
>
> Merge remote-tracking branch
> 'remotes/famz/tags/docker-and-block-pull-request' into staging (2018-05-18
> 14:11:52 +0100)
>
> are available in the git reposit
On Wed, May 16, 2018 at 9:13 PM, Dr. David Alan Gilbert
wrote:
> * 858585 jemmy (jemmy858...@gmail.com) wrote:
>
>
>
>> >> >> > I wonder why dereg_mr takes so long - I could understand if reg_mr
>> >> >> > took a long time, but why for dereg, that sounds like the easy side.
>> >> >>
>> >> >> I us
Rename the 2.13 machines to match the number we're going to
use for the next release.
Signed-off-by: Peter Maydell
---
hw/s390x/s390-virtio-ccw.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/hw/s390x/s390-virtio-ccw.c b/hw/s390x/s390-virtio-ccw.c
index e548d341a
We're going to make the next release be 3.0, not 2.13; change
the annotations in our json appropriately.
Changes produced with
sed -i -e 's/2\.13/3.0/g' qapi/*.json
Signed-off-by: Peter Maydell
---
qapi/block-core.json | 4 ++--
qapi/common.json | 2 +-
qapi/migration.json | 16 +++
Am 18.05.2018 um 20:12 hat Eric Blake geschrieben:
> On 05/18/2018 08:21 AM, Kevin Wolf wrote:
> > This adds QMP commands that control the transition between states of the
> > job lifecycle.
> >
> > Signed-off-by: Kevin Wolf
> > ---
> > qapi/job.json | 99 ++
Update references to 2.13 to read 3.0, since that's the
number we're using for the next release.
Signed-off-by: Peter Maydell
---
qemu-doc.texi | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/qemu-doc.texi b/qemu-doc.texi
index 0e0e0ae72b..cac1c3b39e 100644
--- a/qemu-doc
Rename the 2.13 machines to match the number we're going to
use for the next release.
Signed-off-by: Peter Maydell
---
target/ppc/cpu.h| 2 +-
hw/ppc/spapr.c | 14 +++---
target/ppc/machine.c| 8
target/ppc/translate_init.inc.c | 2
I think that we should number the next release 3.0
(3.0.0, in long form). We already have a few places that
have used "2.13", in machine-versions or in "feature
exists since release X" annotations; update those.
thanks
-- PMM
Peter Maydell (5):
qapi: Change "since 2.13" annotations to "since 3.
Am 18.05.2018 um 20:22 hat Eric Blake geschrieben:
> On 05/18/2018 08:21 AM, Kevin Wolf wrote:
> > This adds a minimal query-jobs implementation that shouldn't pose many
> > design questions. It can later be extended to expose more information,
> > and especially job-specific information.
> >
> >
Peter Maydell writes:
> As part of plumbing MemTxAttrs down to the IOMMU translate method,
> add MemTxAttrs as an argument to address_space_translate()
> and address_space_translate_cached(). Callers either have an
> attrs value to hand, or don't care and can use MEMTXATTRS_UNSPECIFIED.
>
> Sign
Peter Maydell writes:
> As part of plumbing MemTxAttrs down to the IOMMU translate method,
> add MemTxAttrs as an argument to address_space_access_valid().
> Its callers either have an attrs value to hand, or don't care
> and can use MEMTXATTRS_UNSPECIFIED.
>
> Signed-off-by: Peter Maydell
Rev
Peter Maydell writes:
> As part of plumbing MemTxAttrs down to the IOMMU translate method,
> add MemTxAttrs as an argument to address_space_map().
> Its callers either have an attrs value to hand, or don't care
> and can use MEMTXATTRS_UNSPECIFIED.
>
> Signed-off-by: Peter Maydell
Reviewed-by:
On Tue, May 22, 2018 at 09:35:55AM +0200, Gerd Hoffmann wrote:
> Hi,
>
> > You must /sometimes/ supply the correct machine type.
> >
> > It is quite dependent on the guest OS you have installed, and even
> > just how the guest OS is configured. In general Linux is very
> > flexible and can ada
Rename the 2.13 machine types to match what we're going to
use as our next release number.
Signed-off-by: Peter Maydell
---
hw/i386/pc_piix.c | 8
hw/i386/pc_q35.c | 8
2 files changed, 8 insertions(+), 8 deletions(-)
diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c
index e
Peter Maydell writes:
> As part of plumbing MemTxAttrs down to the IOMMU translate method,
> add MemTxAttrs as an argument to memory_region_access_valid().
> Its callers either have an attrs value to hand, or don't care
> and can use MEMTXATTRS_UNSPECIFIED.
>
> The callsite in flatview_access_va
Peter Maydell writes:
> As part of plumbing MemTxAttrs down to the IOMMU translate method,
> add MemTxAttrs as an argument to flatview_extend_translation().
> Its callers either have an attrs value to hand, or don't care
> and can use MEMTXATTRS_UNSPECIFIED.
>
> Signed-off-by: Peter Maydell
Re
Peter Maydell writes:
> As part of plumbing MemTxAttrs down to the IOMMU translate method,
> add MemTxAttrs as an argument to flatview_access_valid().
> Its callers now all have an attrs value to hand, so we can
> correct our earlier temporary use of MEMTXATTRS_UNSPECIFIED.
>
> Signed-off-by: Pe
Peter Maydell writes:
> As part of plumbing MemTxAttrs down to the IOMMU translate method,
> add MemTxAttrs as an argument to the MemoryRegion valid.accepts
> callback. We'll need this for subpage_accepts().
>
> We could take the approach we used with the read and write
> callbacks and add new a
Peter Maydell writes:
> As part of plumbing MemTxAttrs down to the IOMMU translate method,
> add MemTxAttrs as an argument to address_space_get_iotlb_entry().
>
> Signed-off-by: Peter Maydell
Reviewed-by: Alex Bennée
> ---
> include/exec/memory.h | 2 +-
> exec.c| 2 +-
> hw
Peter Maydell writes:
> As part of plumbing MemTxAttrs down to the IOMMU translate method,
> add MemTxAttrs as an argument to address_space_translate_iommu().
>
> Signed-off-by: Peter Maydell
Reviewed-by: Alex Bennée
> ---
> exec.c | 8 +---
> 1 file changed, 5 insertions(+), 3 deletion
Peter Maydell writes:
> As part of plumbing MemTxAttrs down to the IOMMU translate method,
> add MemTxAttrs as an argument to flatview_translate(); all its
> callers now have attrs available.
>
> Signed-off-by: Peter Maydell
Reviewed-by: Alex Bennée
> ---
> include/exec/memory.h | 7 --
Peter Maydell writes:
> As part of plumbing MemTxAttrs down to the IOMMU translate method,
> add MemTxAttrs as an argument to flatview_do_translate().
>
> Signed-off-by: Peter Maydell
Reviewed-by: Alex Bennée
> ---
> exec.c | 9 ++---
> 1 file changed, 6 insertions(+), 3 deletions(-)
>
Am 18.05.2018 um 20:41 hat Dr. David Alan Gilbert geschrieben:
> * Kevin Wolf (kw...@redhat.com) wrote:
> > Before we can make x-blockdev-create a background job, we need to
> > generalise the job infrastructure so that it can be used without any
> > associated block node.
>
> Is there any relatio
On 18 May 2018 at 12:44, Alex Bennée wrote:
> Since kernel commit a86bd139f2 (arm64: arch_timer: Enable CNTVCT_EL0
> trap..) user-space has been able to read these system registers. As we
> can't use QEMUTimer's in linux-user mode we just directly call
> cpu_get_clock().
>
> Signed-off-by: Alex Be
On Tue, May 22, 2018 at 09:40:44AM +0100, Peter Maydell wrote:
> On 22 May 2018 at 04:03, Peter Xu wrote:
> > On Mon, May 21, 2018 at 03:03:49PM +0100, Peter Maydell wrote:
> >> If an IOMMU supports mappings that care about the memory
> >> transaction attributes, then it no longer has a unique
> >
On Tue, 22 May 2018 11:39:56 +0100
Peter Maydell wrote:
> We're going to make the next release be 3.0, not 2.13; change
> the annotations in our json appropriately.
>
> Changes produced with
> sed -i -e 's/2\.13/3.0/g' qapi/*.json
>
> Signed-off-by: Peter Maydell
> ---
> qapi/block-core.jso
On Tue, 22 May 2018 11:39:57 +0100
Peter Maydell wrote:
> Rename the 2.13 machine types to match what we're going to
> use as our next release number.
>
> Signed-off-by: Peter Maydell
> ---
> hw/i386/pc_piix.c | 8
> hw/i386/pc_q35.c | 8
> 2 files changed, 8 insertions(+),
On 22 May 2018 at 12:02, Peter Xu wrote:
> On Tue, May 22, 2018 at 09:40:44AM +0100, Peter Maydell wrote:
>> On 22 May 2018 at 04:03, Peter Xu wrote:
>> The reason for not just passing in the transaction attributes to
>> translate is that
>> (a) the iommu index abstraction makes the notifier setu
Am 18.05.2018 um 20:17 hat Peter Maydell geschrieben:
> In commit 8b9ad56e9cbfd852a, we removed the code that could result
> in our getting to sd_prealloc()'s out_with_err_set label with a
> NULL blk pointer. That makes the NULL check in the error-handling
> path unnecessary, and Coverity gripes ab
On Tue, 22 May 2018 11:39:59 +0100
Peter Maydell wrote:
> Rename the 2.13 machines to match the number we're going to
> use for the next release.
>
> Signed-off-by: Peter Maydell
> ---
> target/ppc/cpu.h| 2 +-
> hw/ppc/spapr.c | 14 +++---
> target/pp
On Tue, 22 May 2018 11:39:58 +0100
Peter Maydell wrote:
> Rename the 2.13 machines to match the number we're going to
> use for the next release.
>
> Signed-off-by: Peter Maydell
> ---
> hw/s390x/s390-virtio-ccw.c | 10 +-
> 1 file changed, 5 insertions(+), 5 deletions(-)
Reviewed-by:
On Tue, 22 May 2018 11:40:00 +0100
Peter Maydell wrote:
> Update references to 2.13 to read 3.0, since that's the
> number we're using for the next release.
>
> Signed-off-by: Peter Maydell
> ---
> qemu-doc.texi | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
Reviewed-by: Cornelia
Hi Peter,
On 05/21/2018 04:03 PM, Peter Maydell wrote:
> Implement the Arm TrustZone Memory Protection Controller, which sits
> in front of RAM and allows secure software to configure it to either
> pass through or reject transactions.
>
> We implement the MPC as a QEMU IOMMU, which will direct t
On Wed, May 16, 2018 at 03:43:48PM +0200, Laurent Vivier wrote:
> Hi Bala,
>
> I've tested you patch migrating a pseries between a P9 host and a P8
> host with 1G huge page size on the P9 side and 16MB on P8 side and the
> information are strange now.
Hi Laurent,
Thank you for testing the patch,
Hi Peter,
On 05/21/2018 04:03 PM, Peter Maydell wrote:
> Add more detail to the documentation for memory_region_init_iommu()
> and other IOMMU-related functions and data structures.
>
> Signed-off-by: Peter Maydell
Reviewed-by: Eric Auger
Thanks
Eric
> ---
> v2->v3 changes:
> * minor wording
On 22.05.2018 12:39, Peter Maydell wrote:
> We're going to make the next release be 3.0, not 2.13; change
> the annotations in our json appropriately.
>
> Changes produced with
> sed -i -e 's/2\.13/3.0/g' qapi/*.json
>
> Signed-off-by: Peter Maydell
> ---
> qapi/block-core.json | 4 ++--
> q
On 22.05.2018 12:39, Peter Maydell wrote:
> Rename the 2.13 machine types to match what we're going to
> use as our next release number.
>
> Signed-off-by: Peter Maydell
> ---
> hw/i386/pc_piix.c | 8
> hw/i386/pc_q35.c | 8
> 2 files changed, 8 insertions(+), 8 deletions(-)
On Tue, May 22, 2018 at 11:39:57AM +0100, Peter Maydell wrote:
> Rename the 2.13 machine types to match what we're going to
> use as our next release number.
>
> Signed-off-by: Peter Maydell
Reviewed-by: Eduardo Habkost
--
Eduardo
On 22.05.2018 12:39, Peter Maydell wrote:
> Rename the 2.13 machines to match the number we're going to
> use for the next release.
>
> Signed-off-by: Peter Maydell
> ---
> hw/s390x/s390-virtio-ccw.c | 10 +-
> 1 file changed, 5 insertions(+), 5 deletions(-)
Reviewed-by: Thomas Huth
On 22.05.2018 12:39, Peter Maydell wrote:
> Rename the 2.13 machines to match the number we're going to
> use for the next release.
>
> Signed-off-by: Peter Maydell
> ---
> target/ppc/cpu.h| 2 +-
> hw/ppc/spapr.c | 14 +++---
> target/ppc/machine.c
On 22.05.2018 12:40, Peter Maydell wrote:
> Update references to 2.13 to read 3.0, since that's the
> number we're using for the next release.
>
> Signed-off-by: Peter Maydell
> ---
> qemu-doc.texi | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/qemu-doc.texi b/qemu
Patryk Olszewski writes:
> Signed-off-by: Patryk Olszewski
> ---
> chardev/char-serial.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/chardev/char-serial.c b/chardev/char-serial.c
> index feb52e5..ae548d2 100644
> --- a/chardev/char-serial.c
> +++ b/chardev/char-seri
On 22 May 2018 at 12:30, Auger Eric wrote:
> Hi Peter,
>
> On 05/21/2018 04:03 PM, Peter Maydell wrote:
>> Implement the Arm TrustZone Memory Protection Controller, which sits
>> in front of RAM and allows secure software to configure it to either
>> pass through or reject transactions.
>>
>> We i
The function is only ignored since QEMU version 1.7.0. Let's mark
it as deprecated, so that we can finally completely remove it soon.
Signed-off-by: Thomas Huth
---
qemu-doc.texi | 5 +
vl.c | 1 +
2 files changed, 6 insertions(+)
diff --git a/qemu-doc.texi b/qemu-doc.texi
index 0e
Hi Peter,
On 05/22/2018 01:56 PM, Peter Maydell wrote:
> On 22 May 2018 at 12:30, Auger Eric wrote:
>> Hi Peter,
>>
>> On 05/21/2018 04:03 PM, Peter Maydell wrote:
>>> Implement the Arm TrustZone Memory Protection Controller, which sits
>>> in front of RAM and allows secure software to configure
On 13 May 2018 at 15:35, Eric Auger wrote:
> To prepare for multiple redistributor regions, we introduce
> an array of uint32_t properties that stores the redistributor
> count of each redistributor region.
>
> Non accelerated VGICv3 only supports a single redistributor region.
> The capacity of a
On 13 May 2018 at 15:35, Eric Auger wrote:
> for KVM_VGIC_V3_ADDR_TYPE_REDIST_REGION attribute, the attribute
> data pointed to by kvm_device_attr.addr is a OR of the
> redistributor region address and other fields such as the index
> of the redistributor region and the number of redistributors th
On 13 May 2018 at 15:35, Eric Auger wrote:
> Let's check if KVM_VGIC_V3_ADDR_TYPE_REDIST_REGION is supported.
> If not, we check the number of redist region is equal to 1 and use the
> legacy KVM_VGIC_V3_ADDR_TYPE_REDIST attribute. Otherwise we use
> the new attribute and allow to register multipl
>Any chance you didn't export QEMU_AUDIO_DRV?
Okay, I just checked by calling env in the same fashion.
Well lash me bootlaces, it turns out that sudo needs to be invoked with
the -E flag to preserve the environment. It's funny, the examples I
read up on never mentioned this.
Sorry for littering
On 13 May 2018 at 15:35, Eric Auger wrote:
> This patch allows the creation of a GICv3 node with 1 or 2
> redistributor regions depending on the number of smu_cpus.
> The second redistributor region is located just after the
> existing RAM region, at 256GB and contains up to (512 - 123) vcpus.
>
>
Pavel Balaev writes:
> Hello,
>
> Now savevm, loadvm and delvm commands only allowed from hmp monitor.
> This patch adds ability to send them via QMP api.
>
> Signed-off-by: Pavel Balaev
Quoting my reply to a prior similar patch:
savevm and loadvm are HMP only precisely because an exact Q
On 13 May 2018 at 15:35, Eric Auger wrote:
> With a VGICv3 KVM device, if the number of vcpus exceeds the
> capacity of the legacy redistributor region (123 redistributors),
> we now attempt to register the second redistributor region. This
> extends the number of vcpus to 512 assuming the host ke
On 22 May 2018 at 13:33, Peter Maydell wrote:
> On 13 May 2018 at 15:35, Eric Auger wrote:
>> for KVM_VGIC_V3_ADDR_TYPE_REDIST_REGION attribute, the attribute
>> data pointed to by kvm_device_attr.addr is a OR of the
>> redistributor region address and other fields such as the index
>> of the red
On Tue, 15 May 2018 10:45:02 +0200
Laszlo Ersek wrote:
> I've come across this patch in downstream review (although I really have
> zero background in s390x), and Cornelia suggested I might want to repeat
> my comments on the upstream list too:
>
> On 05/04/18 09:25, Cornelia Huck wrote:
> > Fro
On 05/18/18 14:23, marcandre.lur...@redhat.com wrote:
> diff --git
> a/OvmfPkg/Library/Tcg2PhysicalPresenceLibNull/DxeTcg2PhysicalPresenceLib.inf
> b/OvmfPkg/Library/Tcg2PhysicalPresenceLibNull/DxeTcg2PhysicalPresenceLib.inf
> new file mode 100644
> index ..92ce5f04b37f
> --- /dev/nu
On Wed, 16 May 2018 15:32:48 +0200
Pierre Morel wrote:
> On 15/05/2018 18:10, Cornelia Huck wrote:
> > On Fri, 11 May 2018 11:33:35 +0200
> > Pierre Morel wrote:
> >
> >> On 09/05/2018 17:48, Cornelia Huck wrote:
> >>> @@ -126,7 +192,24 @@ static void fsm_io_request(struct vfio_ccw_private
Hi Peter,
On 05/21/2018 04:03 PM, Peter Maydell wrote:
> If an IOMMU supports mappings that care about the memory
> transaction attributes, then it no longer has a unique
> address -> output mapping, but more than one. We can
> represent these using an IOMMU index, analogous to TCG's
> mmu indexes.
** Changed in: qemu
Status: New => Invalid
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https://bugs.launchpad.net/bugs/1772262
Title:
Adding -spice doesn't respect environment variable QEMU_AUDIO_DRV
Status in QEMU:
I
On 22 May 2018 at 12:53, Markus Armbruster wrote:
> Patryk Olszewski writes:
>
>> Signed-off-by: Patryk Olszewski
>> ---
>> chardev/char-serial.c | 2 +-
>> 1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/chardev/char-serial.c b/chardev/char-serial.c
>> index feb52e5..ae548d2 1
On Sat, May 19, 2018 at 06:20:16AM +0800, Changpeng Liu wrote:
> Read only feature shouldn't be negotiable, because if the
> backend device reported Read only feature supported, QEMU
> host driver shouldn't change backend's RO attribute.
I don't understand this patch.
Does it make *all* virtio-bl
On Tue, 22 May 2018 11:39:59 +0100
Peter Maydell wrote:
> Rename the 2.13 machines to match the number we're going to
> use for the next release.
>
> Signed-off-by: Peter Maydell
> ---
Reviewed-by: Greg Kurz
> target/ppc/cpu.h| 2 +-
> hw/ppc/spapr.c | 14 +
On 22 May 2018 at 13:58, Auger Eric wrote:
> Hi Peter,
> On 05/21/2018 04:03 PM, Peter Maydell wrote:
>> If an IOMMU supports mappings that care about the memory
>> transaction attributes, then it no longer has a unique
>> address -> output mapping, but more than one. We can
>> represent these usi
> -Original Message-
> From: Duran, Leo
> Sent: Monday, May 21, 2018 8:32 PM
> To: Moger, Babu ; m...@redhat.com;
> marcel.apfelb...@gmail.com; pbonz...@redhat.com; r...@twiddle.net;
> ehabk...@redhat.com; mtosa...@redhat.com
> Cc: qemu-devel@nongnu.org; k...@vger.kernel.org; k...@tripleba
On Sat, May 19, 2018 at 06:20:46AM +0800, Changpeng Liu wrote:
> This patch reports the protocol feature that is only advertised by
> QEMU if the device implements the config ops.
>
> Signed-off-by: Changpeng Liu
> ---
> contrib/vhost-user-blk/vhost-user-blk.c | 7 +++
> 1 file changed, 7 in
Looking through old bug tickets... can you still reproduce this issue
with the latest version of QEMU and the latest version of GTK? Or could
we close this ticket nowadays?
** Changed in: qemu
Status: New => Incomplete
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Return code = 1 doesn't mean that we parsed base:allocation. Move
trace point to appropriate place.
Signed-off-by: Vladimir Sementsov-Ogievskiy
---
nbd/server.c | 7 +--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/nbd/server.c b/nbd/server.c
index 9e1f227178..84381baaa8 100
Looking through old bug tickets... can you still reproduce this issue
with the latest version of QEMU? Or could we close this ticket nowadays?
** Changed in: qemu
Status: New => Incomplete
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Looking through old bug tickets... can you still reproduce this issue
with the latest version of QEMU, using SDL2? Or could we close this
ticket nowadays? In case the problem persists, please also specify which
host system (Linux? Window manager? Or Windows?) you are using!
** Changed in: qemu
Looking through old bug tickets... can you still reproduce this issue
with the latest version of QEMU? Or could we close this ticket nowadays?
** Changed in: qemu
Status: New => Incomplete
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Looking through old bug tickets... can you still reproduce this issue
with the latest version of QEMU? Or could we close this ticket nowadays?
** Changed in: qemu
Status: New => Incomplete
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You have been subscribed to a public bug:
I run qemu from git with such command:
qemu-system-x86_64 -nodefaults -m 4096 -smp 8,cores=4,threads=2,sockets=1 -cpu
'kvm64' -device usb-mouse -M q35 -vga qxl -no-hpet -boot once=c,menu=on -device
vfio-pci,host=02:00.0,x-vga=on \
-enable-kvm -monitor s
On Mon, May 21, 2018 at 08:41:12PM -0400, Babu Moger wrote:
> Add information for cpuid 0x801D leaf. Populate cache topology information
> for different cache types(Data Cache, Instruction Cache, L2 and L3) supported
> by 0x801D leaf. Please refer Processor Programming Reference (PPR) for A
On Tue, May 22, 2018 at 01:32:52PM +, Moger, Babu wrote:
>
> > -Original Message-
> > From: Duran, Leo
> > Sent: Monday, May 21, 2018 8:32 PM
> > To: Moger, Babu ; m...@redhat.com;
> > marcel.apfelb...@gmail.com; pbonz...@redhat.com; r...@twiddle.net;
> > ehabk...@redhat.com; mtosa...@
Looking through old bug tickets... can you still reproduce this issue
with the latest version of QEMU? Or could we close this ticket nowadays?
** Changed in: qemu
Status: Confirmed => Incomplete
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Looking through old bug tickets... can you still reproduce this issue
with the latest version of QEMU? Or could we close this ticket nowadays?
** Changed in: qemu
Status: New => Incomplete
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** No longer affects: qemu
** Project changed: linux => qemu
** Changed in: qemu
Status: New => Incomplete
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https://bugs.launchpad.net/bugs/1175513
Title:
Qemu 1.5-git gpu clo
Looking through old bug tickets... can you still reproduce this issue
with the latest version of QEMU? Or could we close this ticket nowadays?
** Changed in: qemu
Status: New => Incomplete
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On 3 May 2018 at 22:44, Alex Williamson wrote:
> We'll currently replace any 'u64' with a 'uint64_t' including when
> it's embedded in an '__aligned_u64', creating a '__aligned_uint64_t'
> which doesn't exist. Add another sed entry to find these and convert
> them back to their original form.
>
>
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