On 04/11/2018 09:21 PM, Dr. David Alan Gilbert wrote:
> * Cédric Le Goater (c...@kaod.org) wrote:
>> Here is some context for this strange change request.
>>
>> On the POWER9 processor, the XIVE interrupt controller can control
>> interrupt sources using MMIO to trigger events, to EOI or to turn of
On 2018年04月12日 11:41, Michael S. Tsirkin wrote:
On Thu, Apr 12, 2018 at 11:37:35AM +0800, Jason Wang wrote:
On 2018年04月12日 09:57, Michael S. Tsirkin wrote:
On Thu, Apr 12, 2018 at 09:39:43AM +0800, Tiwei Bie wrote:
On Thu, Apr 12, 2018 at 04:29:29AM +0300, Michael S. Tsirkin wrote:
On Thu,
This patch implements the page table walk for VMSAv8-64.
Signed-off-by: Eric Auger
Signed-off-by: Prem Mallappa
---
v9 -> v10:
- Add 64b single-copy atomicity comment related to PTE fetch
- remove checks in get_block_pte_address and use formulae to compute
block address offset
- remove check_
We set up the infrastructure to enumerate all the PCI devices
attached to the SMMU and create an associated IOMMU memory
region and address space.
Those info are stored in SMMUDevice objects. The devices are
grouped according to the PCIBus they belong to. A hash table
indexed by the PCIBus pointer
This series implements the emulation code for ARM SMMUv3.
SMMUv3 gets instantiated by adding ",iommu=smmuv3" to the virt
machine option.
Only stage 1 and AArch64 PTW are supported. [1 - 14] bring the core
emulation code. [15, 16] bring optimizations and 17 brings the vhost
integration.
Main chan
The patch introduces the smmu base device and class for the ARM
smmu. Devices for specific versions will be derived from this
base device.
We also introduce some important datatypes.
Signed-off-by: Eric Auger
Signed-off-by: Prem Mallappa
Reviewed-by: Peter Maydell
---
v10 -> v11:
- remove has
From: Prem Mallappa
This patch implements a skeleton for the smmuv3 device.
Datatypes and register definitions are introduced. The MMIO
region, the interrupts and the queue are initialized.
Only the MMIO read operation is implemented here.
Signed-off-by: Prem Mallappa
Signed-off-by: Eric Auger
From: Prem Mallappa
Add code to instantiate an smmuv3 in virt machine. A new iommu
integer member is introduced in VirtMachineState to store the type
of the iommu in use.
Signed-off-by: Prem Mallappa
Signed-off-by: Eric Auger
Reviewed-by: Peter Maydell
---
v9 -> v10:
- add VirtIOMMUType
- ad
We introduce some helpers to handle wired IRQs and especially
GERROR interrupt. SMMU writes GERROR register on GERROR event
and SW acks GERROR interrupts by setting GERRORn.
The Wired interrupts are edge sensitive hence the pulse usage.
Signed-off-by: Eric Auger
Signed-off-by: Prem Mallappa
--
Now we have relevant helpers for queue and irq
management, let's implement MMIO write operations.
Signed-off-by: Eric Auger
Signed-off-by: Prem Mallappa
---
v9 -> v10:
- s/hwaddr/uint64_t in trace-events
- added SMMU_FEATURE_2LVL_STE in this patch
- removed smmu_write64 and created writel/write
At the moment, the SMMUv3 does not support notification on
TLB invalidation. So let's log an error as soon as such notifier
gets enabled.
Signed-off-by: Eric Auger
---
hw/arm/smmuv3.c | 11 +++
1 file changed, 11 insertions(+)
diff --git a/hw/arm/smmuv3.c b/hw/arm/smmuv3.c
index 4be676b
From: Prem Mallappa
This patch builds the smmuv3 node in the ACPI IORT table.
The RID space of the root complex, which spans 0x0-0x1
maps to streamid space 0x0-0x1 in smmuv3, which in turn
maps to deviceid space 0x0-0x1 in the ITS group.
The guest must feature the IOMMU probe deferr
We introduce helpers to read/write into the command and event
circular queues.
smmuv3_write_eventq and smmuv3_cmq_consume will become static
in subsequent patches.
Invalidation commands are not yet dealt with. We do not cache
data that need to be invalidated. This will change with vhost
integrati
Let's cache config data to avoid fetching and parsing STE/CD
structures on each translation. We invalidate them on data structure
invalidation commands.
Signed-off-by: Eric Auger
---
hw/arm/smmu-common.c | 24 +++-
hw/arm/smmuv3.c | 129 +
In case the MSI is translated by an IOMMU we need to fixup the
MSI route with the translated address.
Signed-off-by: Eric Auger
Signed-off-by: Bharat Bhushan
---
v9 -> v10:
- use address_space_translate
v5 -> v6:
- use IOMMUMemoryRegionClass API
---
target/arm/kvm.c| 27 ++
We emulate a TLB cache of size SMMU_IOTLB_MAX_SIZE=256.
It is implemented as a hash table whose key is a combination
of the 16b asid and 48b IOVA.
Entries are invalidated on TLB invalidation commands, either
globally, or per asid, or per asid/iova.
One peculiarity is the NH_VA invalidation comman
Let's introduce a helper function aiming at recording an
event in the event queue.
Signed-off-by: Eric Auger
---
v9 -> v10:
- rework SMMU_EVENT_STRING
- trigger a GERROR EVENTQ_ABT_ERR in case of eventq write failure
v8 -> v9:
- add SMMU_EVENT_STRING
v7 -> v8:
- use dma_addr_t instead of hwadd
This patch implements the IOMMU Memory Region translate()
callback. Most of the code relates to the translation
configuration decoding and check (STE, CD).
Signed-off-by: Eric Auger
Signed-off-by: Prem Mallappa
---
v10 -> v11:
- in case of error, print ret instead of the event.type which
may
On 2018年04月12日 09:44, Tiwei Bie wrote:
On Wed, Apr 11, 2018 at 08:37:17PM +0300, Michael S. Tsirkin wrote:
On Wed, Apr 11, 2018 at 04:38:53PM +0800, Tiwei Bie wrote:
On Wed, Apr 11, 2018 at 04:01:19PM +0800, Jason Wang wrote:
On 2018年04月11日 15:20, Tiwei Bie wrote:
This patch introduces VHOS
On Thu, 04/12 13:34, Peter Xu wrote:
> We will conditionally have a wrapper layer depending on whether the host
> has the PTHREAD_SETNAME capability. It complicates stuff. Let's keep
> the wrapper there; we opt out the pthread_setname_np() call only.
>
> Signed-off-by: Peter Xu
> ---
> v2:
> -
ARM virt machine now exposes a new "iommu" option.
The SMMUv3 IOMMU is instantiated using -machine virt,iommu=smmuv3.
Signed-off-by: Eric Auger
Signed-off-by: Prem Mallappa
---
v9 -> v10:
- remove no_iommu
v7 -> v8:
- Revert to machine option, now dubbed "iommu", preparing for virtio
instant
On TLB invalidation commands, let's call registered
IOMMU notifiers. Those can only be UNMAP notifiers.
SMMUv3 does not support notification on MAP (VFIO).
This patch allows vhost use case where IOTLB API is notified
on each guest IOTLB invalidation.
Signed-off-by: Eric Auger
---
hw/arm/smmu-co
On Tue, 04/10 20:39, Alex Bennée wrote:
> When calling our cross-compilation images we want to call something
> other than the default cc.
Makes sense to me!
>
> Signed-off-by: Alex Bennée
> ---
> tests/docker/docker.py | 18 +++---
> 1 file changed, 15 insertions(+), 3 deletions(-
On Tue, 04/10 20:39, Alex Bennée wrote:
> Signed-off-by: Alex Bennée
> ---
> tests/docker/docker.py | 5 +
> 1 file changed, 5 insertions(+)
>
> diff --git a/tests/docker/docker.py b/tests/docker/docker.py
> index 9444f4bea4..f79213044d 100755
> --- a/tests/docker/docker.py
> +++ b/tests/doc
* Cédric Le Goater (c...@kaod.org) wrote:
> On 04/11/2018 09:21 PM, Dr. David Alan Gilbert wrote:
> > * Cédric Le Goater (c...@kaod.org) wrote:
> >> Here is some context for this strange change request.
> >>
> >> On the POWER9 processor, the XIVE interrupt controller can control
> >> interrupt sour
On Thu, Apr 12, 2018 at 03:38:50PM +0800, Jason Wang wrote:
> On 2018年04月12日 09:44, Tiwei Bie wrote:
> > On Wed, Apr 11, 2018 at 08:37:17PM +0300, Michael S. Tsirkin wrote:
> > > On Wed, Apr 11, 2018 at 04:38:53PM +0800, Tiwei Bie wrote:
> > > > On Wed, Apr 11, 2018 at 04:01:19PM +0800, Jason Wang
On Tue, 04/10 20:39, Alex Bennée wrote:
> This make is now invoked from each individual target make with the
> appropriate CC and ARCH set for each guest. It includes all the
> multiarch tests by default as well as any tests from
> tests/tcg/$(ARCH).
>
> As there may be subtle additional requireme
On 04/12/2018 07:07 AM, David Gibson wrote:
> On Wed, Dec 20, 2017 at 08:38:41AM +0100, Cédric Le Goater wrote:
>> On 12/20/2017 06:09 AM, David Gibson wrote:
>>> On Sat, Dec 09, 2017 at 09:43:21AM +0100, Cédric Le Goater wrote:
With the POWER9 processor comes a new interrupt controller called
On Wed, Apr 11, 2018 at 05:35:55PM +0200, Andrea Bolognani wrote:
> On Tue, 2018-04-10 at 09:52 +0100, Daniel P. Berrangé wrote:
> > On Tue, Apr 10, 2018 at 09:41:33AM +0200, Andrea Bolognani wrote:
> > > I figure the people not explicitly specifying a CPU model on the
> > > command line will proba
On 04/12/2018 07:08 AM, David Gibson wrote:
> On Thu, Dec 21, 2017 at 11:12:06AM +1100, Benjamin Herrenschmidt wrote:
>> On Wed, 2017-12-20 at 16:09 +1100, David Gibson wrote:
>>>
>>> As you've suggested in yourself, I think we might need to more
>>> explicitly model the different components of the
On Wed, Apr 11, 2018 at 06:18:18PM +0100, Dr. David Alan Gilbert wrote:
> * Lidong Chen (jemmy858...@gmail.com) wrote:
> > The default get_return_path function of iochannel does not work for
> > RDMA live migration. So add the interface to set get_return_path.
> >
> > Signed-off-by: Lidong Chen
>
11.04.2018 19:11, Max Reitz wrote:
On 2018-04-11 15:05, Vladimir Sementsov-Ogievskiy wrote:
[...]
Hmm, first type? I'm now not sure about, did I really see sha256
mismatch, or something like this (should be error, but found bitmap):
--- /work/src/qemu/up-169/tests/qemu-iotests/169.out 2018
On 04/12/2018 07:16 AM, David Gibson wrote:
> On Mon, Feb 12, 2018 at 09:55:17AM +1100, Benjamin Herrenschmidt wrote:
>> On Sun, 2018-02-11 at 19:08 +1100, David Gibson wrote:
>>> On Thu, Jan 18, 2018 at 08:27:52AM +1100, Benjamin Herrenschmidt wrote:
On Wed, 2018-01-17 at 15:39 +0100, Cédric
On 11/04/2018 18:39, Kevin Wolf wrote:
> +bool bdrv_drain_poll(BlockDriverState *bs, bool top_level)
> {
> /* Execute pending BHs first and check everything else only after the BHs
> * have executed. */
> -while (aio_poll(bs->aio_context, false));
> +if (top_level) {
> +
On 11/04/2018 18:39, Kevin Wolf wrote:
> For bdrv_drain(), recursively waiting for child node requests is
> pointless because we didn't quiesce their parents, so new requests could
> come in anyway. Letting the function work only on a single node makes it
> more consistent.
>
> For subtree drains
On 04/12/2018 07:10 AM, David Gibson wrote:
> On Wed, Jan 17, 2018 at 10:18:43AM +0100, Cédric Le Goater wrote:
> Also, have we decided how the process of switching between XICS and
> XIVE will work vs. CAS ?
That's how it is described in the architecture. The current choice is
>
On 11/04/2018 18:39, Kevin Wolf wrote:
> +if (atomic_read(&bs->in_flight)) {
> +return true;
> +}
> +
> +if (recursive) {
> +QLIST_FOREACH_SAFE(child, &bs->children, next, next) {
QLIST_FOREACH_SAFE is only safe if child disappears, but not if e.g.
next disappears. So
On 11/04/2018 18:39, Kevin Wolf wrote:
> bdrv_drain_all() wants to have a single polling loop for draining the
> in-flight requests of all nodes. This means that the AIO_WAIT_WHILE()
> condition relies on activity in multiple AioContexts, which is polled
> from the mainloop context. We must therefo
On 11/04/2018 18:39, Kevin Wolf wrote:
> The much easier and more obviously correct way is to fundamentally
> change the way the functions work: Iterate over all BlockDriverStates,
> no matter who owns them, and drain them individually. Compensation is
> only necessary when a new BDS is created ins
Fam Zheng writes:
> On Tue, 04/10 20:39, Alex Bennée wrote:
>> This make is now invoked from each individual target make with the
>> appropriate CC and ARCH set for each guest. It includes all the
>> multiarch tests by default as well as any tests from
>> tests/tcg/$(ARCH).
>>
>> As there may be
On 04/12/2018 07:15 AM, David Gibson wrote:
> On Wed, Jan 17, 2018 at 03:39:46PM +0100, Cédric Le Goater wrote:
>> On 01/17/2018 12:10 PM, Benjamin Herrenschmidt wrote:
>>> On Wed, 2018-01-17 at 10:18 +0100, Cédric Le Goater wrote:
>>> Also, have we decided how the process of switching between
On 12 April 2018 at 08:02, Cédric Le Goater wrote:
> On 04/11/2018 09:21 PM, Dr. David Alan Gilbert wrote:
>> Interestingly, your patch comes less than 2 weeks after Lai Jiangshan's
>> 'add capability to bypass the shared memory'
>>https://lists.nongnu.org/archive/html/qemu-devel/2018-03/msg0
On 12/04/2018 09:55, Fam Zheng wrote:
> Reviewed-by: Fam Zheng
Queued, thanks Fam and Peter.
Paolo
12.04.2018 11:34, Vladimir Sementsov-Ogievskiy wrote:
11.04.2018 19:11, Max Reitz wrote:
On 2018-04-11 15:05, Vladimir Sementsov-Ogievskiy wrote:
[...]
Hmm, first type? I'm now not sure about, did I really see sha256
mismatch, or something like this (should be error, but found bitmap):
--- /
Sorry for the very late response. I completely forgot to check this
mailbox... Adding my usual corporate email to the cc.
On 4/2/2018 10:20, Paolo Bonzini wrote:
On 01/04/2018 17:35, Alexandro Sanchez Bach wrote:
I've noticed that `gdb_breakpoint_insert` only considers KVM so far. My
questio
On 29/03/2018 05:21, Alexey Kardashevskiy wrote:
> +DeviceState *dev = (DeviceState *) object_dynamic_cast(obj, TYPE_DEVICE);
> +const char *id = object_property_print(obj, "id", true, NULL);
I learnt now about commit e1ff3c67e8544f41f1bea76ba76385faee0d2bb7 and I
find it a mistake. The "
On Thu, 04/12 09:47, Alex Bennée wrote:
>
> Fam Zheng writes:
> >> +testthread: LDFLAGS=-lpthread
> >
> > I'm a bit curious why only testthread is left in this file but others
> > are gone.
>
> testthread is the only one that needs additional flags. However I could
> put those rules in a multiar
Right now we can only map PCDIMM/NVDIMM into guest address space. In the
future, we might want to do the same for virtio devices - e.g.
virtio-pmem or virtio-mem. Especially, they should be able to live side
by side to each other.
E.g. the virto based memory devices regions will not be exposed via
Let's allow to query the MemoryHotplugState from the machine.
This allows us to generically detect if a certain machine has support
for memory devices, and to generically manage it (find free address
range, plug/unplug a memory region).
Signed-off-by: David Hildenbrand
---
hw/i386/pc.c
To be able to reuse MemoryDevice logic from other devices besides
pc-dimm, factor the relevant stuff out into the MemoryDevice code.
As we don't care about slots for memory devices that are not pc-dimm,
don't factor that part out.
Most of this patch just moves checks and logic around. While at it
On the qmp level, we already have the concept of memory devices:
"query-memory-devices"
Right now, we only support NVDIMM and PCDIMM.
We want to map other devices later into the address space of the guest.
Such device could e.g. be virtio devices. These devices will have a
guest memory range a
We have a call to cpu_synchronize_state() on every kvm_arch_handle_exit().
Let's remove the ones that are no longer needed.
Remaining places (for s390x) are in
- target/s390x/sigp.c, on the target CPU
- target/s390x/cpu.c:s390_cpu_get_crash_info()
While at it, use kvm_cpu_synchronize_state() ins
On Thu, Apr 12, 2018 at 12:43 AM, Dr. David Alan Gilbert
wrote:
> * Lidong Chen (jemmy858...@gmail.com) wrote:
>> After postcopy, the destination qemu work in the dedicated
>> thread, so only invoke yield_until_fd_readable before postcopy
>> migration.
>
> The subject line needs to be more discrip
On 2018年04月12日 16:10, Tiwei Bie wrote:
On Thu, Apr 12, 2018 at 03:38:50PM +0800, Jason Wang wrote:
On 2018年04月12日 09:44, Tiwei Bie wrote:
On Wed, Apr 11, 2018 at 08:37:17PM +0300, Michael S. Tsirkin wrote:
On Wed, Apr 11, 2018 at 04:38:53PM +0800, Tiwei Bie wrote:
On Wed, Apr 11, 2018 at 04
Am 12.04.2018 um 10:37 hat Paolo Bonzini geschrieben:
> On 11/04/2018 18:39, Kevin Wolf wrote:
> > +bool bdrv_drain_poll(BlockDriverState *bs, bool top_level)
> > {
> > /* Execute pending BHs first and check everything else only after the
> > BHs
> > * have executed. */
> > -while
On 4 April 2018 at 13:26, Alex Bennée wrote:
>
> Abdallah Bouassida writes:
>
>> Generate an XML description for the cp-regs.
>> Register these regs with the gdb_register_coprocessor().
>> Add arm_gdb_get_sysreg() to use it as a callback to read those regs.
>> Add a dummy arm_gdb_set_sysreg().
>>
On Thu, Apr 12, 2018 at 4:28 PM, Daniel P. Berrangé wrote:
> On Wed, Apr 11, 2018 at 06:18:18PM +0100, Dr. David Alan Gilbert wrote:
>> * Lidong Chen (jemmy858...@gmail.com) wrote:
>> > The default get_return_path function of iochannel does not work for
>> > RDMA live migration. So add the interfa
On 12/04/2018 11:51, Kevin Wolf wrote:
> Am 12.04.2018 um 10:37 hat Paolo Bonzini geschrieben:
>> On 11/04/2018 18:39, Kevin Wolf wrote:
>>> +bool bdrv_drain_poll(BlockDriverState *bs, bool top_level)
>>> {
>>> /* Execute pending BHs first and check everything else only after the
>>> BHs
>>>
On 6 April 2018 at 18:28, Abdallah Bouassida
wrote:
> Alex wrote:
>> There is something odd going on here because if I run a simple little
>> features binary
>> (https://github.com/stsquad/testcases/blob/master/aarch64/features.c) I
>> get:
>>
>> ID_AA64ISAR0_EL1: 0x00011120
>> ID_
On the POWER9 processor, the XIVE interrupt controller can control
interrupt sources using MMIO to trigger events, to EOI or to turn off
the sources. Priority management and interrupt acknowledgment is also
controlled by MMIO in the presenter sub-engine.
These MMIO regions are exposed to guests in
Hi David,
> From: David Gibson [mailto:da...@gibson.dropbear.id.au]
> Sent: Thursday, April 12, 2018 10:36 AM
> On Tue, Mar 06, 2018 at 06:33:52PM +0800, Liu, Yi L wrote:
> > On Mon, Mar 05, 2018 at 02:31:44PM +1100, David Gibson wrote:
> > > On Thu, Mar 01, 2018 at 06:31:55PM +0800, Liu, Yi L wro
Am 12.04.2018 um 12:12 hat Paolo Bonzini geschrieben:
> On 12/04/2018 11:51, Kevin Wolf wrote:
> > Am 12.04.2018 um 10:37 hat Paolo Bonzini geschrieben:
> >> On 11/04/2018 18:39, Kevin Wolf wrote:
> >>> +bool bdrv_drain_poll(BlockDriverState *bs, bool top_level)
> >>> {
> >>> /* Execute pendi
Signed-off-by: Prasanna Kumar Kalever
---
block/gluster.c | 15 +--
configure | 8
2 files changed, 21 insertions(+), 2 deletions(-)
diff --git a/block/gluster.c b/block/gluster.c
index 4adc1a875b..2474580ad6 100644
--- a/block/gluster.c
+++ b/block/gluster.c
@@ -996,
Hi, all
I encounterd a bug when I try to migrate a windows vm.
Enviroment information:
host A: cpu E5620(model WestmereEP without flag xsave)
host B: cpu E5-2643(model SandyBridgeEP with xsave)
The reproduce steps is :
1. Start a windows 2008 vm with -cpu host(which means host-passthrough).
2. Mi
On 12/04/2018 13:11, Kevin Wolf wrote:
>> Well, there is one gotcha: bdrv_ref protects against disappearance, but
>> bdrv_ref/bdrv_unref are not thread-safe. Am I missing something else?
>
> Apart from the above, if we do an extra bdrv_ref/unref we'd also have
> to keep track of all the nodes that
On Thu, 12 Apr 2018 11:35:21 +0200
David Hildenbrand wrote:
> We have a call to cpu_synchronize_state() on every kvm_arch_handle_exit().
>
> Let's remove the ones that are no longer needed.
>
> Remaining places (for s390x) are in
> - target/s390x/sigp.c, on the target CPU
> - target/s390x/cpu.c
On 04/12/2018 11:35 AM, David Hildenbrand wrote:
> We have a call to cpu_synchronize_state() on every kvm_arch_handle_exit().
>
> Let's remove the ones that are no longer needed.
>
> Remaining places (for s390x) are in
> - target/s390x/sigp.c, on the target CPU
> - target/s390x/cpu.c:s390_cpu_g
On 12 April 2018 at 11:18, Cédric Le Goater wrote:
> On the POWER9 processor, the XIVE interrupt controller can control
> interrupt sources using MMIO to trigger events, to EOI or to turn off
> the sources. Priority management and interrupt acknowledgment is also
> controlled by MMIO in the presen
* Peter Maydell (peter.mayd...@linaro.org) wrote:
> On 12 April 2018 at 11:18, Cédric Le Goater wrote:
> > On the POWER9 processor, the XIVE interrupt controller can control
> > interrupt sources using MMIO to trigger events, to EOI or to turn off
> > the sources. Priority management and interrupt
Am 12.04.2018 um 13:30 hat Paolo Bonzini geschrieben:
> On 12/04/2018 13:11, Kevin Wolf wrote:
> >> Well, there is one gotcha: bdrv_ref protects against disappearance, but
> >> bdrv_ref/bdrv_unref are not thread-safe. Am I missing something else?
> >
> > Apart from the above, if we do an extra bdr
From: "Emilio G. Cota"
Before 8936006 ("fpu/softfloat: re-factor minmax", 2018-02-21),
we used to return +Zero for maxnummag(-Zero,+Zero); after that
commit, we return -Zero.
Fix it by making {min,max}nummag consistent with {min,max}num,
deferring to the latter when the absolute value of the ope
Hi,
I'd hope to include fixes for our longstanding fcvt bugs but I ran out
of time. The fixes in this series are purely regression fixes from the
softfloat re-factor. On the plus side I have a very good test case of
fcvt now ;-)
Only my patch is not reviewed.
Alex Bennée (1):
fpu/softfloat: ra
Fixes https://bugs.launchpad.net/qemu/+bug/1759264
Signed-off-by: Alex Bennée
Cc: Bastian Koppelmann
---
fpu/softfloat.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/fpu/softfloat.c b/fpu/softfloat.c
index 9b99aa6ec8..ddc77c273c 100644
--- a/fpu/softfloat.c
+++ b/fpu/softfloat.c
@@ -1344
On 12/04/2018 13:53, Kevin Wolf wrote:
>> The problem I have is that there is a direction through which I/O flows
>> (parent-to-child), so why can't draining follow that natural direction.
>> Having to check for the parents' I/O, while draining the child, seems
>> wrong. Perhaps we can't help it,
On 12 April 2018 at 12:53, Dr. David Alan Gilbert wrote:
> * Peter Maydell (peter.mayd...@linaro.org) wrote:
>> David suggested on IRC that we would want a flag on the ramblock
>> for "not migratable", because there are other uses for "don't
>> migrate this" than just "is this a ram device".
>
> M
Not only qemu-x86_64, but also:
qemu-aarch64 => qemu: Unsupported syscall: 279
qemu-arm => qemu: Unsupported syscall: 385
qemu-mips => qemu: Unsupported syscall: 4354
qemu-mips64 => qemu: Unsupported syscall: 5314
qemu-powerpc => qemu: Unsupported syscall: 360
qemu-powerpc64 => qemu: Unsupported s
On 12 April 2018 at 12:58, Alex Bennée wrote:
> Fixes https://bugs.launchpad.net/qemu/+bug/1759264
>
> Signed-off-by: Alex Bennée
> Cc: Bastian Koppelmann
> ---
> fpu/softfloat.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/fpu/softfloat.c b/fpu/softfloat.c
> index 9b99aa6ec8..ddc77
On 04/12/2018 02:26 PM, Peter Maydell wrote:
> On 12 April 2018 at 12:58, Alex Bennée wrote:
>> Fixes https://bugs.launchpad.net/qemu/+bug/1759264
>>
>> Signed-off-by: Alex Bennée
>> Cc: Bastian Koppelmann
>> ---
>> fpu/softfloat.c | 1 +
>> 1 file changed, 1 insertion(+)
>>
>> diff --git a/fpu
* linzhecheng (linzhech...@huawei.com) wrote:
> Hi, all
> I encounterd a bug when I try to migrate a windows vm.
>
> Enviroment information:
> host A: cpu E5620(model WestmereEP without flag xsave)
> host B: cpu E5-2643(model SandyBridgeEP with xsave)
>
> The reproduce steps is :
> 1. Start a win
On Wed, Apr 11, 2018 at 08:02:58AM -0500, Eric Blake wrote:
> You could always add qemu_fopen/qemu_fclose to match the existing
> qemu_open/qemu_close. But you do have a point that you can't call
> qemu_close/fclose (because fclose would be left with a stale fd that
> might spuriously close someth
It's the natural type for object sizes and matches the return value of
sizeof(buf).
Signed-off-by: Simon Ruderich
---
cpus.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/cpus.c b/cpus.c
index 292d5b94b1..d256d8e9b4 100644
--- a/cpus.c
+++ b/cpus.c
@@ -2239,7 +2239,7 @@
Hi Eric,
On Wed, Feb 14, 2018 at 11:37 AM, Auger Eric wrote:
> On 09/02/18 16:17, Geert Uytterhoeven wrote:
>> Allow the instantation of generic dynamic sysbus devices again, without
>> the need to create a new device-specific vfio type.
>>
>> This is a partial revert of commit 6f2062b9758ebc64
qemu_open() allow passing file descriptors to qemu which is used in
restricted environments like libvirt where open() is prohibited.
Suggested-by: Eric Blake
Signed-off-by: Simon Ruderich
---
cpus.c | 20 ++--
1 file changed, 10 insertions(+), 10 deletions(-)
diff --git a/cpus.
The called function takes an uint64_t as size parameter and
qdict_get_int() returns an uint64_t. Don't truncate it needlessly to an
uint32_t.
Signed-off-by: Simon Ruderich
---
hmp.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/hmp.c b/hmp.c
index a25c7bd9a8..1e392055f7
Signed-off-by: Simon Ruderich
---
cpus.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/cpus.c b/cpus.c
index 38eba8bff3..c78f430532 100644
--- a/cpus.c
+++ b/cpus.c
@@ -2263,8 +2263,9 @@ void qmp_memsave(int64_t addr, int64_t size, const char
*filename,
while (
Adapted patch from Baojun Wang [1] with the following commit message:
I found this could be useful to have qemu-softmmu as a cross
debugger (launch with -s -S command line option), then if we can
have a command to load guest physical memory, we can use cross gdb
to do some target d
* Juan Quintela (quint...@redhat.com) wrote:
> It will be used to store the uri parameters. We want this only for
> tcp, so we don't set it for other uris. We need it to know what port
> is migration running.
>
> Signed-off-by: Juan Quintela
>
> --
>
> This used to be uri parameter, but it has
Peter Maydell writes:
> On 12 April 2018 at 12:58, Alex Bennée wrote:
>> Fixes https://bugs.launchpad.net/qemu/+bug/1759264
>>
>> Signed-off-by: Alex Bennée
>> Cc: Bastian Koppelmann
>> ---
>> fpu/softfloat.c | 1 +
>> 1 file changed, 1 insertion(+)
>>
>> diff --git a/fpu/softfloat.c b/fpu/s
Am 12.04.2018 um 14:02 hat Paolo Bonzini geschrieben:
> On 12/04/2018 13:53, Kevin Wolf wrote:
> >> The problem I have is that there is a direction through which I/O flows
> >> (parent-to-child), so why can't draining follow that natural direction.
> >> Having to check for the parents' I/O, while d
This change looks good to me, but a commit message would have been
helpful. I suggest something like this:
Gluster 4.0 changed the signature of glfs_ftruncate(). The function
now has two additional arguments, namely prestat and poststat. These
provide not benefit for QEMU, so ignoring them a
Bastian Koppelmann writes:
> On 04/11/2018 01:01 PM, Alex Bennée wrote:
>> Bastian Koppelmann writes:
>>
>>> On 04/10/2018 10:07 PM, Alex Bennée wrote:
Yeah it looks like it was missed, the round_to_uint code does it.
Do you have a test case I can verify?
>>>
>>> For the NaN
On 04/12/2018 02:08 PM, Peter Maydell wrote:
> On 12 April 2018 at 12:53, Dr. David Alan Gilbert wrote:
>> * Peter Maydell (peter.mayd...@linaro.org) wrote:
>>> David suggested on IRC that we would want a flag on the ramblock
>>> for "not migratable", because there are other uses for "don't
>>> mi
On 12/04/2018 15:27, Kevin Wolf wrote:
> Not sure I follow. Let's look at an example. Say, we have a block job
> BlockBackend as the root (because that uses proper layering, unlike
> devices which use aio_disable_external()), connected to a qcow2 node
> over file.
>
> 1. The block job issues a req
On 12 April 2018 at 14:41, Cédric Le Goater wrote:
> On 04/12/2018 02:08 PM, Peter Maydell wrote:
>> On 12 April 2018 at 12:53, Dr. David Alan Gilbert
>> wrote:
>>> * Peter Maydell (peter.mayd...@linaro.org) wrote:
David suggested on IRC that we would want a flag on the ramblock
for "n
It is not uncommon for a contemporary FDT to be larger than 64 KiB,
leading to failures loading the device tree from sysfs:
qemu-system-aarch64: qemu_fdt_setprop: Couldn't set ...: FDT_ERR_NOSPACE
Hence increase the limit to 1 MiB, like on PPC.
For reference, the largest arm64 DTB created fr
AArch64 stack frames include a 'frame record' which holds a pointer
to the next frame record in the chain and the LR on entry to the
function. The procedure calling standard doesn't mandate where
exactly this frame record is in the stack frame, but for signal
frames the kernel puts it right at the
On 12/04/2018 15:51, Peter Maydell wrote:
> Paolo may have an opinion what the API here should be, but
> at the MemoryRegion level we already have a mix of functions
> memory_region_init_foo_nomigrate() and memory_region_init_foo(),
> which at the moment just control whether we call
> vmstate_regis
Hello,
On Tue, Apr 10, 2018 at 03:33:35PM +0200, Gerd Hoffmann wrote:
> > # @off: Disable OpenGL (default).
Just to be sure, I have to add @ in front of all parameter, right?
> >
> > > + # 'on'Use OpenGL, pick context type automatically.
> > > + # Would better be named 'auto' but is
Am 12.04.2018 um 15:42 hat Paolo Bonzini geschrieben:
> On 12/04/2018 15:27, Kevin Wolf wrote:
> > Not sure I follow. Let's look at an example. Say, we have a block job
> > BlockBackend as the root (because that uses proper layering, unlike
> > devices which use aio_disable_external()), connected t
(changed subject and decoupling from udmabuf thread)
On Wed, Apr 11, 2018 at 08:59:32AM +0300, Oleksandr Andrushchenko wrote:
> On 04/10/2018 08:26 PM, Dongwon Kim wrote:
> >On Tue, Apr 10, 2018 at 09:37:53AM +0300, Oleksandr Andrushchenko wrote:
> >>On 04/06/2018 09:57 PM, Dongwon Kim wrote:
> >>
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