2018-02-23 21:30-0500, Babu Moger:
> From: Stanislav Lanci
>
> Adds information about cache size and topology from cpuid 0x801D leaf
> for different cache types on AMD processors.
>
> Signed-off-by: Stanislav Lanci
> Signed-off-by: Babu Moger
> ---
> diff --git a/target/i386/cpu.c b/target
Am 27.02.2018 um 22:01 hat John Snow geschrieben:
> All false positives unless someone really would like to advocate for me
> to change the format of the table.
Agreed, this isn't going to stop the series. Changing the format of the
table would make it much harder to read.
Kevin
v2:
* Tackle the .ioeventfd_stop() vs vq handler race by removing the ioeventfd
from a BH in the IOThread [Fam]
There are several race conditions in virtio-blk/virtio-scsi dataplane code.
This patch series addresses them, see the commit description for details on the
individual cases.
Stefan
Am 27.02.2018 um 22:57 hat John Snow geschrieben:
>
>
> On 02/27/2018 03:16 PM, Eric Blake wrote:
> > On 02/23/2018 05:51 PM, John Snow wrote:
> >> Expose the "manual" property via QAPI for the backup-related jobs.
> >> As of this commit, this allows the management API to request the
> >> "conclu
Am 27.02.2018 um 21:24 hat Eric Blake geschrieben:
> On 02/23/2018 05:51 PM, John Snow wrote:
> > This allows us to easily force the option for all jobs belonging
> > to a transaction to ensure consistency with how all those jobs
> > will be handled.
> >
> > This is purely a convenience.
> >
> >
* Michael S. Tsirkin (m...@redhat.com) wrote:
> On Tue, Feb 27, 2018 at 08:05:25PM +, Dr. David Alan Gilbert wrote:
> > * Michael S. Tsirkin (m...@redhat.com) wrote:
> > > On Fri, Feb 16, 2018 at 01:15:56PM +, Dr. David Alan Gilbert (git)
> > > wrote:
> > > > From: "Dr. David Alan Gilbert"
On 02/28/2018 11:38 AM, Radim Krčmář wrote:
2018-02-23 21:30-0500, Babu Moger:
In the subject line: s/reviwing/reviewing/ [It's never a good sign when
a fix claiming to fix a typo introduces a typo ;) ]
Or go for a shorter subject:
target/i386: Fix a minor typo
Changed KVM_CPUID_FLAG_SIG
The TLS test cert generation relies on a fixed set of algorithms that are
only usable under GNUTLS' default priority setting. When building QEMU
with a custom distro specific priority setting, this can cause the TLS
tests to fail. By forcing the tests to always use "NORMAL" priority we
can make the
On 02/28/2018 12:49 PM, Daniel P. Berrangé wrote:
The TLS test cert generation relies on a fixed set of algorithms that are
only usable under GNUTLS' default priority setting. When building QEMU
with a custom distro specific priority setting, this can cause the TLS
tests to fail. By forcing the t
Hi,
This series failed docker-build@min-glib build test. Please find the testing
commands and
their output below. If you have Docker installed, you can probably reproduce it
locally.
Type: series
Message-id: 20180228180507.3964-1-mre...@redhat.com
Subject: [Qemu-devel] [PATCH v3 00/16] block/mir
* Jia He (hejia...@gmail.com) wrote:
> In commit 0ca1fd2d6878 ("vhost: Simplify ring verification checks"),
> it checks the virtqueue desc mapping for 3 times.
>
> Fixed: commit 0ca1fd2d6878 ("vhost: Simplify ring verification checks")
> Signed-off-by: Jia He
Oops, well spotted; copy & paste str
On 02/26/2018 09:39 PM, Emilio G. Cota wrote:
> qht_lookup now uses the default cmp function. qht_lookup_custom is defined
> to retain the old behaviour, that is a cmp function is explicitly provided.
>
> qht_insert will gain use of the default cmp in the next patch.
>
> Signed-off-by: Emilio G.
On 02/26/2018 09:39 PM, Emilio G. Cota wrote:
> The meaning of "existing" is now changed to "matches in hash and
> ht->cmp result". This is saner than just checking the pointer value.
>
> Note that we now return NULL on insertion success, or the existing
> pointer on failure. We can do this becaus
On 02/28/2018 01:15 PM, Kevin Wolf wrote:
> Is it because you want to avoid that the user picks an automatic job for
> completing the mixed transaction?
I wanted to avoid the case that a job without the manual property would
be stuck "pending" -- which I have defined to mean that it is waiting o
On 02/28/2018 01:23 PM, Kevin Wolf wrote:
> But given how often I already said that and people still don't consider
> it as an option, this doesn't appear to have been very convincing. So
> whatever... *shrug*
>
Sorry, I didn't mean to give that impression.
I initially *did* use two (or more?)
On 02/28/2018 01:25 PM, Kevin Wolf wrote:
> Am 24.02.2018 um 00:51 hat John Snow geschrieben:
>> Expose the "manual" property via QAPI for the backup-related jobs.
>> As of this commit, this allows the management API to request the
>> "concluded" and "dismiss" semantics for backup jobs.
>>
>> Sig
On 02/28/2018 01:29 PM, Kevin Wolf wrote:
> Am 27.02.2018 um 21:24 hat Eric Blake geschrieben:
>> On 02/23/2018 05:51 PM, John Snow wrote:
>>> This allows us to easily force the option for all jobs belonging
>>> to a transaction to ensure consistency with how all those jobs
>>> will be handled.
>
On 02/28/2018 09:54 AM, Kevin Wolf wrote:
> Am 24.02.2018 um 00:51 hat John Snow geschrieben:
>> Add a new state ABORTING.
>>
>> This makes transitions from normative states to error states explicit
>> in the STM, and serves as a disambiguation for which states may complete
>> normally when norma
On 02/28/2018 01:20 PM, John Snow wrote:
+if (!backup->has_manual) {
+backup->manual = false;
+}
I think this is unnecessary these days, NULL/0/false is the default
value for QMP/QAPI.
That's what I get for cargo cult. Eric, confirm/deny? Should I remove
the other auto-false
On 02/28/2018 10:37 AM, Kevin Wolf wrote:
> Am 24.02.2018 um 00:51 hat John Snow geschrieben:
>> add a new state "CONCLUDED" that identifies a job that has ceased all
>> operations. The wording was chosen to avoid any phrasing that might
>> imply success, error, or cancellation. The task has simp
Not enabled anywhere yet.
Reviewed-by: Alex Bennée
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
target/arm/cpu.h | 1 +
linux-user/elfload.c | 1 +
2 files changed, 2 insertions(+)
diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index 2b9740878b..7c8e87544a 100644
---
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
target/arm/helper.h| 9 +
target/arm/translate-a64.c | 83 ++
target/arm/vec_helper.c| 74 +
3 files changed, 166 insertions(+)
di
The integer size check was already outside of the opcode switch;
move the floating-point size check outside as well. Unify the
size vs index adjustment between fp and integer paths.
Signed-off-by: Richard Henderson
---
target/arm/translate-a64.c | 65 +++-
Reviewed-by: Alex Bennée
Signed-off-by: Richard Henderson
---
target/arm/helper.h| 4 ++
target/arm/translate-a64.c | 84 ++
target/arm/vec_helper.c| 109 +
target/arm/Makefile.objs | 2 +-
4 files cha
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
target/arm/translate.c | 46 ++
1 file changed, 42 insertions(+), 4 deletions(-)
diff --git a/target/arm/translate.c b/target/arm/translate.c
index 05fa6a53f9..9169b6b367 100644
I believe I've incorporated all of Peter's feedback from v2.
This is based on target-arm.next, which now contains Alex's fp16 work.
Re-tested our standard aarch64 risu tests with -cpu cortex-a57,
and against the new risu tests I posted this morning for aa64 and aa32.
r~
Richard Henderson (16):
Reviewed-by: Alex Bennée
Signed-off-by: Richard Henderson
---
target/arm/translate-a64.c | 29 +
1 file changed, 29 insertions(+)
diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c
index ae16313eb0..e4d2d548ba 100644
--- a/target/arm/translate-a64.c
Signed-off-by: Richard Henderson
---
target/arm/translate.c | 68 ++
1 file changed, 68 insertions(+)
diff --git a/target/arm/translate.c b/target/arm/translate.c
index 9169b6b367..45513c9d86 100644
--- a/target/arm/translate.c
+++ b/target/arm/tra
Include the U bit in the switches rather than testing separately.
Signed-off-by: Richard Henderson
---
target/arm/translate-a64.c | 129 +
1 file changed, 61 insertions(+), 68 deletions(-)
diff --git a/target/arm/translate-a64.c b/target/arm/translate
Enable it for the "any" CPU used by *-linux-user.
Signed-off-by: Richard Henderson
---
target/arm/cpu.c | 1 +
target/arm/cpu64.c | 1 +
2 files changed, 2 insertions(+)
diff --git a/target/arm/cpu.c b/target/arm/cpu.c
index 1b3ae62db6..ca5fb1162a 100644
--- a/target/arm/cpu.c
+++ b/target/ar
Reviewed-by: Peter Maydell
Signed-off-by: Richard Henderson
---
target/arm/translate.c | 86 +++---
1 file changed, 67 insertions(+), 19 deletions(-)
diff --git a/target/arm/translate.c b/target/arm/translate.c
index aa6dcaa577..05fa6a53f9 100644
---
Signed-off-by: Richard Henderson
---
target/arm/helper.h| 11
target/arm/translate-a64.c | 94 +---
target/arm/vec_helper.c| 149 +
3 files changed, 246 insertions(+), 8 deletions(-)
diff --git a/target/arm/he
Not enabled anywhere yet.
Reviewed-by: Alex Bennée
Signed-off-by: Richard Henderson
---
target/arm/cpu.h | 1 +
linux-user/elfload.c | 1 +
2 files changed, 2 insertions(+)
diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index 7c8e87544a..f67f357724 100644
--- a/target/arm/cpu.h
+++ b/tar
h
On 02/26/2018 05:57 PM, Cornelia Huck wrote:
> On Fri, 23 Feb 2018 18:42:58 +0100
> Claudio Imbrenda wrote:
>
>> Extend the SCLP event masks to 64 bits.
>>
>> Notice that using any of the new bits results in a state that cannot be
>> migrated to an older version.
>>
>> Signed-off-by: Claudio I
Happily, the bits are in the same places compared to a32.
Signed-off-by: Richard Henderson
---
target/arm/translate.c | 14 +-
1 file changed, 13 insertions(+), 1 deletion(-)
diff --git a/target/arm/translate.c b/target/arm/translate.c
index 3ad8b4031c..ba6ab7d287 100644
--- a/targe
Enable it for the "any" CPU used by *-linux-user.
Signed-off-by: Richard Henderson
---
target/arm/cpu.c | 1 +
target/arm/cpu64.c | 1 +
2 files changed, 2 insertions(+)
diff --git a/target/arm/cpu.c b/target/arm/cpu.c
index ca5fb1162a..452bc32f10 100644
--- a/target/arm/cpu.c
+++ b/target/ar
Reviewed-by: Alex Bennée
Signed-off-by: Richard Henderson
---
target/arm/helper.h| 7
target/arm/translate-a64.c | 48 ++-
target/arm/vec_helper.c| 97 ++
3 files changed, 151 insertions(+), 1 deletion(-)
diff --g
Signed-off-by: Richard Henderson
---
target/arm/translate.c | 61 ++
1 file changed, 61 insertions(+)
diff --git a/target/arm/translate.c b/target/arm/translate.c
index 45513c9d86..3ad8b4031c 100644
--- a/target/arm/translate.c
+++ b/target/arm/tra
When a guests reboots with diagnose 308 subcode 3 it requests the memory
to be cleared. We did not do it so far. This does not only violate the
architecture, it also misses the chance to free up that memory on
reboot, which would help on host memory over commitment. By using
ram_block_discard_rang
* Peter Xu (pet...@redhat.com) wrote:
> On Fri, Feb 16, 2018 at 01:15:57PM +, Dr. David Alan Gilbert (git) wrote:
> > From: "Dr. David Alan Gilbert"
> >
> > The choice of call to discard a block is getting more complicated
> > for other cases. We use fallocate PUNCH_HOLE in any file cases;
On 02/28/2018 10:42 AM, Kevin Wolf wrote:
> Am 24.02.2018 um 00:51 hat John Snow geschrieben:
>> Add a new state that specifically demarcates when we begin to permanently
>> demolish a job after it has performed all work. This makes the transition
>> explicit in the STM table and highlights condi
On 2018-02-28 19:08, Max Reitz wrote:
> On 2018-02-27 17:17, Stefan Hajnoczi wrote:
>> On Mon, Feb 26, 2018 at 06:03:13PM +0100, Max Reitz wrote:
>>> There are filesystems (among which is tmpfs) that have a hard time
>>> reporting allocation status. That is definitely a bug in them.
>>>
>>> Howeve
A vfio ioeventfd will perform the pre-specified device write on
triggering of an eventfd. When coupled with KVM ioeventfds, this
feature allows a VM to trap a device page for virtualization, while
also registering targeted ioeventfds to maintain performance of high
frequency register writes within
* Peter Xu (pet...@redhat.com) wrote:
> On Wed, Feb 14, 2018 at 06:56:59PM +, Dr. David Alan Gilbert wrote:
> > * Peter Xu (pet...@redhat.com) wrote:
> > > On Tue, Feb 13, 2018 at 08:11:00PM +, Dr. David Alan Gilbert wrote:
> > > > * Peter Xu (pet...@redhat.com) wrote:
> > > > > It pauses a
This creates a common helper that we'll use for ioeventfd setup.
Signed-off-by: Alex Williamson
---
drivers/vfio/pci/vfio_pci_rdwr.c | 39 ++
1 file changed, 27 insertions(+), 12 deletions(-)
diff --git a/drivers/vfio/pci/vfio_pci_rdwr.c b/drivers/vfio/pci/
The iowriteXX/ioreadXX functions assume little endian hardware and
convert to little endian on a write and from little endian on a read.
We currently do our own explicit conversion to negate this. Instead,
add some endian dependent defines to avoid all byte swaps. There
should be no functional ch
The ioeventfd here is actually irqfd handling of an ioeventfd such as
supported in KVM. A user is able to pre-program a device write to
occur when the eventfd triggers. This is yet another instance of
eventfd-irqfd triggering between KVM and vfio. The impetus for this
is high frequency writes to
On 2018-02-28 21:11, Max Reitz wrote:
> On 2018-02-28 19:08, Max Reitz wrote:
[...]
> In any case it's interesting to see that even the current qemu-img
> convert takes longer to read sparsely allocated qcow2/raw files from xfs
> than fully allocated images...
(That's because I didn't drop the c
On 02/28/2018 07:08 AM, Wouter Verhelst wrote:
Or, we can revert the change in commit 56c77720, and keep
NBD_REPLY_TYPE_BLOCK_STATUS at 5 (it leaves a hole in the NBD_REPLY_TYPE
numbering, where 3 and 4 might be filled in by other future extensions, or
permanently skipped). This works IF there
On 02/28/2018 02:26 PM, Eric Blake wrote:
Okay, I've gone ahead and reverted the renumbering; NBD_INFO_BLOCK_SIZE
is back to 5
It helps if I don't copy-and-paste the wrong thing. NBD_INFO_BLOCK_SIZE
remains 3 (as it has always been), NBD_REPLY_TYPE_BLOCK_STATUS is
reverted back to 5 (undo
The current recommendation is to embed subdevices directly within their
container
device, so do this for the DBDMA device.
Signed-off-by: Mark Cave-Ayland
---
hw/misc/macio/macio.c | 13 +++--
1 file changed, 7 insertions(+), 6 deletions(-)
diff --git a/hw/misc/macio/macio.c b/hw/misc/
This patchset eliminates the legacy macio_init() function used to setup the
ESCC and PIC memory regions and instead allows the macio device to be
instantiated directly via qdev, wiring up the ESCC internally using sysbus MMIO
memory regions and the PIC via QOM object links.
The biggest surprise in
This enables the device to be made available during the setup of the Old World
machine. In order to pass back the previous set of IRQs we temporarily introduce
a new pic_irqs parameter until it can be removed.
An additional benefit of this change is that it is also possible to remove the
pic_mem p
Also switch macio_oldworld_realize() over to use it rather than using the
pic_mem
memory region directly.
Signed-off-by: Mark Cave-Ayland
Reviewed-by: David Gibson
---
hw/misc/macio/macio.c | 14 ++
hw/ppc/mac_oldworld.c | 8 +---
include/hw/misc/macio/macio.h
Signed-off-by: Mark Cave-Ayland
Reviewed-by: David Gibson
Reviewed-by: Philippe Mathieu-Daudé
---
hw/misc/macio/macio.c | 43 +
hw/ppc/mac.h | 3 --
hw/ppc/mac_newworld.c | 1 +
hw/ppc/mac_oldworld.c | 1 +
include/hw/misc/maci
Signed-off-by: Mark Cave-Ayland
---
hw/intc/heathrow_pic.c | 32 +++-
hw/intc/trace-events | 5 +
2 files changed, 16 insertions(+), 21 deletions(-)
diff --git a/hw/intc/heathrow_pic.c b/hw/intc/heathrow_pic.c
index 7bf44e0d86..5fd2b33a12 100644
--- a/hw/intc/h
Signed-off-by: Mark Cave-Ayland
---
hw/intc/heathrow_pic.c | 126 +++--
include/hw/intc/heathrow_pic.h | 49
2 files changed, 119 insertions(+), 56 deletions(-)
create mode 100644 include/hw/intc/heathrow_pic.h
diff --git a/hw/intc/h
This is needed before the next patch because the target-dependent kvm stub
uses the existing kvm_openpic_connect_vcpu() declaration, making it impossible
to move the device-specific declarations into the same file without breaking
ppc-linux-user compilation.
Signed-off-by: Mark Cave-Ayland
---
h
Now that the ESCC device is instantiated directly via qdev, move it to within
the macio device and wire up the IRQs and memory regions using the sysbus API.
This enables to remove the now-obsolete escc_mem parameter to the macio_init()
function.
(Note this patch also contains small touch-ups to t
This removes the last of the functionality from macio_init() in preparation
for its subsequent removal.
Signed-off-by: Mark Cave-Ayland
Reviewed-by: David Gibson
---
hw/misc/macio/macio.c | 7 ++-
1 file changed, 2 insertions(+), 5 deletions(-)
diff --git a/hw/misc/macio/macio.c b/hw/misc/
On 02/28/2018 10:53 AM, Kevin Wolf wrote:
> Am 24.02.2018 um 00:51 hat John Snow geschrieben:
>> For jobs that have reached their CONCLUDED state, prior to having their
>> last reference put down (meaning jobs that have completed successfully,
>> unsuccessfully, or have been canceled), allow the
This is to faciliate access to OpenPICState when wiring up the PIC to the macio
controller.
Signed-off-by: Mark Cave-Ayland
Reviewed-by: David Gibson
---
hw/intc/openpic.c| 157 --
include/hw/ppc/openpic.h | 159 +++
Also switch macio_newworld_realize() over to use it rather than using the
pic_mem
memory region directly.
Now that both Old World and New World macio devices no longer make use of the
pic_mem memory region directly, we can remove it.
Signed-off-by: Mark Cave-Ayland
Reviewed-by: David Gibson
--
Move the remaining comment into macio.c for reference, then remove the
macio_init() function and instantiate the macio devices for both Old World
and New World machines via qdev_init_nofail() directly.
Signed-off-by: Mark Cave-Ayland
---
hw/misc/macio/macio.c | 11 +++
hw/ppc/mac_newworl
On Thu, Mar 1, 2018 at 12:53 AM, Peter Maydell
wrote:
> On 28 February 2018 at 00:09, Michael Clark wrote:
> > I've just talked to SiFive about this. They have agreed that we can
> remove
> > the sifive_e300 and sifive_u500 boards from the patch series that we are
> > going to submit upstream ag
This will later be used to include list initialization.
Reviewed-by: Eric Auger
Signed-off-by: Alex Williamson
---
hw/vfio/pci-quirks.c | 48 +---
1 file changed, 21 insertions(+), 27 deletions(-)
diff --git a/hw/vfio/pci-quirks.c b/hw/vfio/pci-qui
Quirks can be self modifying, provide a hook to allow them to cleanup
on device reset if desired.
Signed-off-by: Alex Williamson
---
hw/vfio/pci-quirks.c | 15 +++
hw/vfio/pci.c|2 ++
hw/vfio/pci.h|2 ++
3 files changed, 19 insertions(+)
diff --git a/hw/vfi
Update with proposed ioeventfd API.
Signed-off-by: Alex Williamson
---
linux-headers/linux/vfio.h | 27 +++
1 file changed, 27 insertions(+)
diff --git a/linux-headers/linux/vfio.h b/linux-headers/linux/vfio.h
index 4312e961ffd3..c9d7e2db132e 100644
--- a/linux-headers
This is the QEMU counterpart to https://lkml.org/lkml/2018/2/28/1222
As described in the third patch, we have a use case for taking
advantage of existing KVM ioeventfd support for accelerating the
MSI-ACK behavior of NVIDIA GPUs. This series adds generic
infrastructure within vfio quirks for maki
The NVIDIA BAR0 quirks virtualize the PCI config space mirrors found
in device MMIO space. Normally PCI config space is considered a slow
path and further optimization is unnecessary, however NVIDIA uses a
register here to enable the MSI interrupt to re-trigger. Exiting to
QEMU for this MSI-ACK h
With vfio ioeventfd support, we can program vfio-pci to perform a
specified BAR write when an eventfd is triggered. This allows the
KVM ioeventfd to be wired directly to vfio-pci, entirely avoiding
userspace handling for these events. On the same micro-benchmark
where the ioeventfd got us to almo
On 02/26/2018 09:39 PM, Emilio G. Cota wrote:
> This paves the way for enabling scalable parallel generation of TCG code.
>
> Instead of tracking TBs with a single binary search tree (BST), use a
> BST for each TCG region, protecting it with a lock. This is as scalable
> as it gets, since each TCG
Hi,
This series seems to have some coding style problems. See output below for
more information:
Type: series
Subject: [Qemu-devel] [PATCHv3 00/12] macio: remove legacy macio_init() function
Message-id: 20180228203243.1413-1-mark.cave-ayl...@ilande.co.uk
=== TEST SCRIPT BEGIN ===
#!/bin/bash
BA
On 02/26/2018 09:39 PM, Emilio G. Cota wrote:
> Thereby making it per-TCGContext. Once we remove tb_lock, this will
> avoid an atomic increment every time a TB is invalidated.
>
> Signed-off-by: Emilio G. Cota
> ---
> accel/tcg/translate-all.c | 5 +++--
> include/exec/tb-context.h | 1 -
> tc
Hi,
This series seems to have some coding style problems. See output below for
more information:
Type: series
Message-id: 20180228203243.1413-1-mark.cave-ayl...@ilande.co.uk
Subject: [Qemu-devel] [PATCHv3 00/12] macio: remove legacy macio_init() function
=== TEST SCRIPT BEGIN ===
#!/bin/bash
BA
FYI this seems to be fixed with qemu.git master, I didn't track down the
specific commit but there were several keymap related changes. so qemu
2.12 will be fixed
** Changed in: qemu
Status: New => Fix Committed
--
You received this bug notification because you are a member of qemu-
devel
Hi,
This series seems to have some coding style problems. See output below for
more information:
Type: series
Message-id: 20180228203243.1413-1-mark.cave-ayl...@ilande.co.uk
Subject: [Qemu-devel] [PATCHv3 00/12] macio: remove legacy macio_init() function
=== TEST SCRIPT BEGIN ===
#!/bin/bash
BA
xtensa_cpu_dump_state outputs CPU physical registers as is, without
synchronization from current window. That may result in different values
printed for the current window and corresponding physical registers.
Synchronize physical registers from window before dumping.
Cc: qemu-sta...@nongnu.org
Si
System emulation should provide access to all registers, userspace
emulation should only provide access to unprivileged registers.
Record register flags from GDB register map definition, calculate both
num_regs and num_core_regs if either is zero. Use num_regs in system
emulation, num_core_regs in
Hello,
this series adds linux-user support for target/xtensa.
It starts with a small cleanup for xtensa registers dumping.
It adds support for debugging linux-user process with xtensa-linux-gdb
(as opposed to xtensa-elf-gdb), which can only access unprivileged
registers.
It then enables MTTCG for
target_mprotect/target_munmap return value goes through get_errno at the
call site, thus the functions must either set errno to host error code
and return -1 or return negative guest error code. Do the latter.
Cc: qemu-sta...@nongnu.org
Cc: Riku Voipio
Cc: Laurent Vivier
Signed-off-by: Max Filip
Add arrows that mark beginning of register windows and position of the
current window in the windowed register file.
Signed-off-by: Max Filippov
---
target/xtensa/translate.c | 9 +++--
1 file changed, 7 insertions(+), 2 deletions(-)
diff --git a/target/xtensa/translate.c b/target/xtensa/tr
- emit TCG barriers for MEMW, EXTW, S32RI and L32AI;
- do atomic_cmpxchg_i32 for S32C1I.
Cc: Emilio G. Cota
Signed-off-by: Max Filippov
---
configure | 1 +
target/xtensa/cpu.h | 3 +++
target/xtensa/translate.c | 46 +++---
3 file
In linux-user QEMU that runs for a target with TARGET_ABI_BITS bigger
than L1_MAP_ADDR_SPACE_BITS an assertion in page_set_flags fires when
mmap, munmap, mprotect, mremap or shmat is called for an address outside
the guest address space. mmap and mprotect should return ENOMEM in such
case.
Introdu
This patch series provides support for AMD's new Secure Encrypted
Virtualization (SEV) feature.
SEV is an extension to the AMD-V architecture which supports running
multiple VMs under the control of a hypervisor. The SEV feature allows
the memory contents of a virtual machine (VM) to be transpare
Extend the MemTxAttrs to include 'debug' flag. The flag can be used as
general indicator that operation was triggered by the debugger.
Later in the patch series we set the debug=1 when issuing a memory access
from the gdbstub or HMP commands. This patch is prerequisite to support
debugging the enc
shmdt fails to call mmap_lock/mmap_unlock around page_set_flags,
resulting in the following assertion:
page_set_flags: Assertion `have_mmap_lock()' failed.
Wrap shmdt internals into mmap_lock/mmap_unlock.
Cc: qemu-sta...@nongnu.org
Cc: Riku Voipio
Cc: Laurent Vivier
Signed-off-by: Max Filippo
The QMP query command can used to retrieve the SEV information when
memory encryption is enabled on AMD platform.
Cc: Eric Blake
Cc: "Daniel P. Berrangé"
Cc: "Dr. David Alan Gilbert"
Cc: Markus Armbruster
Signed-off-by: Brijesh Singh
---
monitor.c | 7 ++
qapi-schema.json
Updates kmv.h to include memory encryption ioctls and SEV commands.
Cc: Christian Borntraeger
Cc: Cornelia Huck
Cc: Paolo Bonzini
Signed-off-by: Brijesh Singh
---
linux-headers/linux/kvm.h | 90 +++
1 file changed, 90 insertions(+)
diff --git a/lin
Adds the following new APIs
- cpu_physical_memory_read_debug
- cpu_physical_memory_write_debug
- cpu_physical_memory_rw_debug
- ldl_phys_debug
- ldq_phys_debug
Cc: Paolo Bonzini
Cc: Peter Crosthwaite
Cc: Richard Henderson
Signed-off-by: Brijesh Singh
Reviewed-by: Paolo Bonzini
---
exec.c
target_msync is not used, remove its declaration and implementation.
Cc: Riku Voipio
Cc: Laurent Vivier
Signed-off-by: Max Filippov
---
linux-user/mmap.c | 17 -
linux-user/qemu.h | 1 -
2 files changed, 18 deletions(-)
diff --git a/linux-user/mmap.c b/linux-user/mmap.c
index
SEV launch flow requires us to issue LAUNCH_FINISH command before guest
is ready to run.
Cc: Paolo Bonzini
Cc: Richard Henderson
Cc: Eduardo Habkost
Signed-off-by: Brijesh Singh
---
target/i386/sev.c| 29 +
target/i386/trace-events | 1 +
2 files changed,
The header file provide the ioctl command and structure to communicate
with /dev/sev device.
Cc: Paolo Bonzini
Cc: Richard Henderson
Cc: Eduardo Habkost
Signed-off-by: Brijesh Singh
---
linux-headers/linux/psp-sev.h | 142 ++
1 file changed, 142 inserti
Currently, the guest memory access for the debug purpose is performed
using the memcpy(). Lets extend the 'struct MemoryRegion' to include
ram_debug_ops callbacks. The ram_debug_ops can be used to override
memcpy() with something else.
The feature can be used by encrypted guest -- which can regist
Register qemu-xtensa and qemu-xtensaeb for transparent linux userspace
emulation.
Cc: Riku Voipio
Cc: Laurent Vivier
Signed-off-by: Max Filippov
---
scripts/qemu-binfmt-conf.sh | 12 ++--
1 file changed, 10 insertions(+), 2 deletions(-)
diff --git a/scripts/qemu-binfmt-conf.sh b/scrip
The command can be used by libvirt to query the SEV capabilities.
Cc: "Daniel P. Berrangé"
Cc: "Dr. David Alan Gilbert"
Cc: Markus Armbruster
Signed-off-by: Brijesh Singh
---
monitor.c | 7 +++
qapi-schema.json | 42 ++
target/i386
When SEV is enabled, the hardware encryption engine uses a tweak such
that the two identical plaintext at different location will have a
different ciphertexts. So swapping or moving a ciphertexts of two guest
pages will not result in plaintexts being swapped. Hence relocating
a physical backing pag
When CPU supports memory encryption feature, the property can be used to
specify the encryption object to use when launching an encrypted guest.
Cc: Paolo Bonzini
Cc: Eduardo Habkost
Cc: Marcel Apfelbaum
Cc: Stefan Hajnoczi
Signed-off-by: Brijesh Singh
---
hw/core/machine.c | 22 ++
Signed-off-by: Max Filippov
---
MAINTAINERS | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/MAINTAINERS b/MAINTAINERS
index a334a25e5df0..33c4ef0935dc 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -279,7 +279,7 @@ T: git git://github.com/ehabkost/qemu.git x86-next
Xtensa
M
> -Original Message-
> From: Eric Blake [mailto:ebl...@redhat.com]
> Sent: Wednesday, February 28, 2018 12:49 PM
> To: Radim Krčmář ; Moger, Babu
>
> Cc: ehabk...@redhat.com; k...@vger.kernel.org; mtosa...@redhat.com;
> Hook, Gary ; qemu-devel@nongnu.org;
> pbonz...@redhat.com; p...@polep
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