On Thu 15 Feb 2018 05:28:54 AM CET, Philippe Mathieu-Daudé wrote:
> It ease code review, unit is explicit.
>
> Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Alberto Garcia
Berto
On Wed 14 Feb 2018 12:33:22 AM CET, Eric Blake wrote:
> I mentioned this while reviewing Berto's series on L2 slice handling;
> this is a first cut at patches that I think are worth doing throughout
> the qcow2 code base if we like the idea.
>
> Eric Blake (2):
> qcow2: Prefer 'entries' over 'siz
Le 15/02/2018 à 00:33, Oliver Smith a écrit :
> Hello there,
>
> I'm a little late to the party. But what is necessary to get this
> upstreamed, and how can I help?
>
> PS: Sorry if I picked the wrong e-mail addresses, I wasn't subscribed to
> the ML at that point and used the addresses I could f
After reviewing a patch from Philippe that removes block-backend.h
from hw/lm32/milkymist.c, I noticed that this header is included
unnecessarily in a lot of other files, too. Remove those unneeded
includes to speed up the compilation process a little bit.
Signed-off-by: Thomas Huth
---
hw/arm/h
On Wed, Feb 14, 2018 at 02:17:34PM -0600, Wei Huang wrote:
>
>
> On 02/12/2018 11:31 AM, Andrew Jones wrote:
> > On Fri, Feb 09, 2018 at 04:42:42PM -0500, Wei Huang wrote:
> >> This patch adds migration test support for aarch64. The test code, which
> >> implements the same functionality as x86,
On Wed, Feb 14, 2018 at 04:31:45PM -0600, Eric Blake wrote:
> On 02/14/2018 08:06 AM, Stefan Hajnoczi wrote:
> > On Tue, Feb 13, 2018 at 10:01:06AM -0600, Eric Blake wrote:
> > I hope this explains things! The main issue that raised these questions
> > was that aio_context_in_iothread() has a misl
On Tue, Feb 13, 2018 at 02:20:58PM +, Stefan Hajnoczi wrote:
> v2:
> * Introduce AIO_WAIT_WHILE() since aio_poll(ctx, true) is not allowed [Paolo]
>
> Using bdrv_inc_in_flight(blk_bs(blk)) doesn't work since BlockBackend->root
> may
> be NULL.
>
> This patch series solves the issue by addin
This patch fixes an incorrect behavior when the -kernel argument has been
specified without -bios. In this case the kernel was loaded twice. At address
32M as a raw image and afterwards by load_elf/load_uimage at the
corresponding load address. In this case the region for the device tree and
the ra
ping
07.02.2018 15:50, Vladimir Sementsov-Ogievskiy wrote:
v2:
01: add block_latency_histogram_clear()
02: fix spelling (sorry =()
some rewordings
remove histogram if latency parameter unspecified
Vladimir Sementsov-Ogievskiy (2):
block/accounting: introduce latency histogram
qa
ping
07.02.2018 18:58, Vladimir Sementsov-Ogievskiy wrote:
Hi all!
There is a new version of dirty bitmap postcopy migration series.
Now it is based on Max's block tree:
https://github.com/XanClic/qemu/commits/block,
where it needs only one patch: "block: maintain persistent disabled bitmaps",
On Wed, Feb 14, 2018 at 09:58:27PM +0800, Fam Zheng wrote:
> On Wed, Feb 14, 2018 at 9:25 PM, Stefan Hajnoczi wrote:
> > On Wed, Feb 14, 2018 at 08:48:20AM +0800, Fam Zheng wrote:
> >> On Tue, 02/13 17:34, Stefan Hajnoczi wrote:
> >> > The following changes since commit
> >> > fb68096da3d35e64c88
Commit dce8921b2baaf95974af8176406881872067adfa ("iothread: Stop threads
before main() quits") introduced iothread_stop_all() to avoid the
following virtio-scsi assertion failure:
assert(blk_get_aio_context(d->conf.blk) == s->ctx);
Back then the assertion failed because when bdrv_close_all() ma
Hi Eric,
On Wed, Feb 14, 2018 at 09:11:02AM -0600, Eric Blake wrote:
[NBD and keepalive]
> This is more food for thought on whether it even makes sense for NBD to
> worry about assisting in keepalive matters, or whether it would just be
> bloating the protocol.
I'm currently leaning towards the l
On 14.02.2018 20:04, Richard Henderson wrote:
> On 02/14/2018 09:31 AM, David Hildenbrand wrote:
>> Let's add proper alignment checks for a handful of instructions that
>> require a SPECIFICATION exception in case alignment is violated.
>>
>> Introduce new wout/in functions. Declare them as "static
On Thu, 15 Feb 2018 10:47:45 +0100
David Hildenbrand wrote:
> On 14.02.2018 20:04, Richard Henderson wrote:
> > On 02/14/2018 09:31 AM, David Hildenbrand wrote:
> >> Let's add proper alignment checks for a handful of instructions that
> >> require a SPECIFICATION exception in case alignment is
On Thu, Feb 15, 2018 at 5:28 AM, Philippe Mathieu-Daudé wrote:
> It ease code review, unit is explicit.
>
> Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Marc-André Lureau
> ---
> include/hw/acpi/tpm.h | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/include/hw/a
From: Marc-André Lureau
s/pupulate/populate
Signed-off-by: Marc-André Lureau
Reviewed-by: Peter Maydell
Message-id: 20180208162447.10851-1-marcandre.lur...@redhat.com
Signed-off-by: Stefan Hajnoczi
---
util/qemu-coroutine-lock.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --g
The following changes since commit bec9c64ef7be8063f1192608b83877bc5c9ea217:
Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into staging
(2018-02-13 18:24:08 +)
are available in the Git repository at:
git://github.com/stefanha/qemu.git tags/block-pull-request
for you
On Thu, Feb 15, 2018 at 5:28 AM, Philippe Mathieu-Daudé wrote:
> (added in 076b35b5a56)
>
> Signed-off-by: Philippe Mathieu-Daudé
Or osdep.h?
Reviewed-by: Marc-André Lureau
> ---
> include/qemu/cunits.h | 11 +++
> include/qemu/cutils.h | 8 +---
> 2 files changed, 12 insertion
From: Wolfgang Bumiller
It is possible for rate limited writes to keep overshooting a slice's
quota by a tiny amount causing the slice-aligned waiting period to
effectively halve the rate.
Signed-off-by: Wolfgang Bumiller
Reviewed-by: Alberto Garcia
Message-id: 20180207071758.6818-1-w.bumil...
On Thu, Feb 15, 2018 at 01:28:52AM -0300, Philippe Mathieu-Daudé wrote:
> It ease code review, unit is explicit.
Reviewed-by: Gerd Hoffmann
On Thu, Feb 15, 2018 at 07:02:40AM +0100, Thomas Huth wrote:
> On 14.02.2018 21:23, Eric Blake wrote:
> > On 02/14/2018 11:31 AM, Thomas Huth wrote:
> >> When running configure with --with-pkgversion=foo there is no
> >> space anymore between the version number and the parentheses:
> >>
> >> $ m68k
Am 14.02.2018 um 00:33 hat Eric Blake geschrieben:
> I mentioned this while reviewing Berto's series on L2 slice handling;
> this is a first cut at patches that I think are worth doing throughout
> the qcow2 code base if we like the idea.
I agree it's a good change.
While we're at it, something I
On Thu, Feb 15, 2018 at 01:07:25AM -0500, Wei Huang wrote:
> This patch adds migration test support for aarch64. The test code, which
> implements the same functionality as x86, is booted as a kernel in qemu.
> Here are the design choices we make for aarch64:
>
> * We choose this -kernel approach
On 15.02.2018 10:49, Cornelia Huck wrote:
> On Thu, 15 Feb 2018 10:47:45 +0100
> David Hildenbrand wrote:
>
>> On 14.02.2018 20:04, Richard Henderson wrote:
>>> On 02/14/2018 09:31 AM, David Hildenbrand wrote:
Let's add proper alignment checks for a handful of instructions that
requir
Am 15.02.2018 um 10:27 hat Stefan Hajnoczi geschrieben:
> On Wed, Feb 14, 2018 at 04:31:45PM -0600, Eric Blake wrote:
> > On 02/14/2018 08:06 AM, Stefan Hajnoczi wrote:
> > > On Tue, Feb 13, 2018 at 10:01:06AM -0600, Eric Blake wrote:
> > > I hope this explains things! The main issue that raised t
On Wed, Feb 14, 2018 at 08:27:10PM -0500, Bandan Das wrote:
>
> I get the error mentioined in the subject line when using vncviewer with
> commit 13e1d0e71e78a925848258391a6e616b6b5ae219:
>
> Author: Daniel P. Berrange
> Date: Thu Feb 1 16:45:14 2018 +
>
> ui: convert VNC server to QI
On 13 February 2018 at 17:04, Kevin Wolf wrote:
> The following changes since commit fb68096da3d35e64c88cd610c1fa42766c58e92a:
>
> Revert "tests: use memfd in vhost-user-test" (2018-02-13 09:51:52 +)
>
> are available in the git repository at:
>
> git://repo.or.cz/qemu/kevin.git tags/for-u
This series consolidates patches around a performance issue
caused by the usage of QMP query-cpus.
A performance issue was found in an OpenStack environment, where
ceilometer was collecting domain statistics with libvirt. The domain
statistics reported by libvirt include the vCPU halted state, whi
The s390 CPU state can be retrieved without interrupting the
VM execution. Extendend the CpuInfoFast union with architecture
specific data and an implementation for s390.
Return data looks like this:
[
{"thread-id":64301,"props":{"core-id":0},
"arch":"s390","cpu-state":"operating",
"qo
Presently s390x is the only architecture not exposing specific
CPU information via QMP query-cpus. Upstream discussion has shown
that it could make sense to report the architecture specific CPU
state, e.g. to detect that a CPU has been stopped.
With this change the output of query-cpus will look l
From: Luiz Capitulino
The query-cpus command has an extremely serious side effect:
it always interrupts all running vCPUs so that they can run
ioctl calls. This can cause a huge performance degradation for
some workloads. And most of the information retrieved by the
ioctl calls are not even used
Start the deprecation period for QAPI query-cpus (replaced by
query-cpus-fast) and HMP 'info cpus' (replaced by 'info cpus_fast')
beginning with 2.12.0.
Signed-off-by: Viktor Mihajlovski
---
hmp-commands-info.hx | 4 ++--
qapi-schema.json | 4
qemu-doc.texi| 10 ++
3 f
On 12/2/2018 7:38 PM, Anton Nefedov wrote:
On 3/2/2018 6:59 PM, Markus Armbruster wrote:
Eric Blake writes:
On 01/19/2018 06:50 AM, Anton Nefedov wrote:
+
+##
+# @BlockDriverStats:
+#
+# Statistics of a block driver (driver-specific)
+#
+# Since: 2.12
+##
+{ 'union': 'BlockDriverStats',
vnc_listen_io() does not own the reference on the 'cioc' parameter is it
passed, so should not be unref'ing it.
Reported-by: Bandan Das
Signed-off-by: Daniel P. Berrangé
---
ui/vnc.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/ui/vnc.c b/ui/vnc.c
index c715bae1cf..b97769aa9e 100644
--- a
There is currently no way to test the block/iscsi.c block driver.
Using a third-party iSCSI target isn't sufficient since we need fault
injection and control over I/O request execution in order to exercise
specific code paths in the initiator.
Are you willing to co-mentor a Google Summer of Code p
On Sat, Feb 03, 2018 at 07:16:18AM +0100, Stefan Hajnoczi wrote:
> v2:
> * It was unnecessary to avoid duplicate iscsi_schedule_bh() calls since this
>function already protects against duplicate calls internally [Stefan]
>
> Patches 1 & 2 are cleanups.
>
> Patch 3 fixes cancellation of ioctl
Let's add proper alignment checks for a handful of instructions that
require a SPECIFICATION exception in case alignment is violated.
Introduce new wout/in functions. As we are right now only using them for
privileged instructions, we have to add ugly ifdefs to silence
compilers.
Convert STORE CP
On 15.02.2018 11:38, David Hildenbrand wrote:
> Let's add proper alignment checks for a handful of instructions that
> require a SPECIFICATION exception in case alignment is violated.
>
> Introduce new wout/in functions. As we are right now only using them for
> privileged instructions, we have to
Since commit 67a1de0d195a there is no space anymore between the
version number and the parentheses when running configure with
--with-pkgversion=foo :
$ qemu-system-s390x --version
QEMU emulator version 2.11.50(foo)
But the space is included when building without that option
when building from
On 15.02.2018 10:55, Marc-André Lureau wrote:
> On Thu, Feb 15, 2018 at 5:28 AM, Philippe Mathieu-Daudé
> wrote:
>> (added in 076b35b5a56)
>>
>> Signed-off-by: Philippe Mathieu-Daudé
>
> Or osdep.h?
No, osdep.h is for "OS includes and handling of OS dependencies", not
for declaring constants l
The series looks fine to me:
Reviewed-by: Richard W.M. Jones
Rich.
--
Richard Jones, Virtualization Group, Red Hat http://people.redhat.com/~rjones
Read my programming and virtualization blog: http://rwmj.wordpress.com
virt-builder quickly builds VMs from scratch
http://libguestfs.org/virt-
The libiscsi iscsi_task_mgmt_async() API documentation says:
abort_task will also cancel the scsi task. The callback for the scsi
task will be invoked with SCSI_STATUS_CANCELLED
The libiscsi implementation does not fulfil this promise. The task's
callback is not invoked and its struct iscsi_
On 2 February 2018 at 00:42, Alistair Francis
wrote:
> List all possible valid CPU options.
>
> Signed-off-by: Alistair Francis
> Reviewed-by: Philippe Mathieu-Daudé
> ---
>
> V5:
> - Use cpu_model names
> V4:
> - Remove spaces
> V3:
> - Add static property
> V2:
> - Fix the indentation
>
>
Fix has been released with QEMU 2.11:
https://git.qemu.org/?p=qemu.git;a=commitdiff;h=a8b154a637b586441b
** Changed in: qemu
Status: In Progress => Fix Released
--
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https://bugs.laun
David's patch has been included here:
https://git.qemu.org/?p=qemu.git;a=commitdiff;h=51f84465dd985fc21589b2e
** Changed in: qemu
Status: In Progress => Fix Committed
--
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devel-ml, which is subscribed to QEMU.
https://bu
On 8 February 2018 at 05:50, Pekka Enberg wrote:
> This patch adds a "cpu-type" property to BCM2836 SoC in preparation for
> reusing the code for the Raspberry Pi 3, which has a different processor
> model.
>
> Signed-off-by: Pekka Enberg
> --- a/hw/arm/raspi.c
> +++ b/hw/arm/raspi.c
> @@ -135,6
On 02/14/2018 01:39 PM, Kevin O'Connor wrote:
On Tue, Feb 13, 2018 at 03:29:20PM -0500, Stefan Berger wrote:
[...]
In these 0x400 bytes we have 256 bytes that are used for configuration flags
describing the supported opcode as you previously described. This array
allows us to decouple the firmwa
Triaging old bug tickets... can you still reproduce this issue with the
latest version of QEMU? Or could we close this ticket nowadays?
** Changed in: qemu
Status: New => Incomplete
--
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devel-ml, which is subscribed to QE
On 02/15/2018 08:00 AM, Alan Robinson wrote:
> Hi Philippe,
>
> On Thu, Feb 15, 2018 at 01:29:00AM -0300, Philippe Mathieu-Daudé wrote:
>> From: Philippe Mathieu-Daudé
>> Subject: [Xen-devel] [PATCH 30/30] xen: use the BYTE-based definitions
>> List-Id: Xen developer discussion
>>
>> It ease cod
Hi Thomas,
On 02/15/2018 03:19 AM, Thomas Huth wrote:
> On 15.02.2018 05:28, Philippe Mathieu-Daudé wrote:
>> Signed-off-by: Philippe Mathieu-Daudé
>> ---
>> hw/mips/mips_r4k.c | 5 ++---
>> 1 file changed, 2 insertions(+), 3 deletions(-)
>>
>> diff --git a/hw/mips/mips_r4k.c b/hw/mips/mips_r4k.
Hi
On Thu, Feb 15, 2018 at 2:21 AM, Stefan Berger
wrote:
> Move the TPM TIS related register and flag #defines into
> include/hw/acpi/tpm.h for access by the test case.
>
> Write a test case that covers the TIS functionality.
>
> Add the tests cases to the MAINTAINERS file.
>
> Signed-off-by: Ste
On 8 February 2018 at 05:50, Pekka Enberg wrote:
> This patch adds a "raspi3" machine type, which can now be selected as
> the machine to run on by users via the "-M" command line option to QEMU.
>
> The machine type does *not* ignore memory transaction failures so we
> likely need to add some dum
On 02/15/2018 09:39 AM, Peter Maydell wrote:
> On 8 February 2018 at 05:50, Pekka Enberg wrote:
>> This patch adds a "raspi3" machine type, which can now be selected as
>> the machine to run on by users via the "-M" command line option to QEMU.
>>
>> The machine type does *not* ignore memory trans
On 14 February 2018 at 10:39, Laurent Vivier wrote:
> The following changes since commit bec9c64ef7be8063f1192608b83877bc5c9ea217:
>
> Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into
> staging (2018-02-13 18:24:08 +)
>
> are available in the Git repository at:
>
> gi
Hi Peter,
On 02/15/2018 08:29 AM, Peter Maydell wrote:
> On 2 February 2018 at 00:42, Alistair Francis
> wrote:
>> List all possible valid CPU options.
>>
>> Signed-off-by: Alistair Francis
>> Reviewed-by: Philippe Mathieu-Daudé
>> ---
>>
>> V5:
>> - Use cpu_model names
>> V4:
>> - Remove spa
The align_offset() function is equivalent to the ROUND_UP() macro so
there's no need to use the former. The ROUND_UP() name is also a bit
more explicit.
This patch uses ROUND_UP() instead of the slower QEMU_ALIGN_UP()
because align_offset() already requires that the second parameter is a
power of
On 02/15/2018 09:49 AM, Philippe Mathieu-Daudé wrote:
> On 02/15/2018 09:39 AM, Peter Maydell wrote:
>> On 8 February 2018 at 05:50, Pekka Enberg wrote:
>>> This patch adds a "raspi3" machine type, which can now be selected as
>>> the machine to run on by users via the "-M" command line option to
On 15 February 2018 at 13:04, Philippe Mathieu-Daudé wrote:
> Hi Peter,
>
> On 02/15/2018 08:29 AM, Peter Maydell wrote:
>> On 2 February 2018 at 00:42, Alistair Francis
>> wrote:
>>> List all possible valid CPU options.
>>>
>>> Signed-off-by: Alistair Francis
>>> Reviewed-by: Philippe Mathieu-D
On 15 February 2018 at 13:14, Philippe Mathieu-Daudé wrote:
> On 02/15/2018 09:49 AM, Philippe Mathieu-Daudé wrote:
>> On 02/15/2018 09:39 AM, Peter Maydell wrote:
>>> On 8 February 2018 at 05:50, Pekka Enberg wrote:
>
> Now I remember why I hesitated with this patch,
>
> This part {
>
+
On 11 February 2018 at 20:58, Richard Henderson
wrote:
> Signed-off-by: Richard Henderson
> ---
> linux-user/signal.c | 348
> ++--
> 1 file changed, 283 insertions(+), 65 deletions(-)
>
> diff --git a/linux-user/signal.c b/linux-user/signal.c
> i
Hi Peter,
On 02/01/2018 09:42 PM, Alistair Francis wrote:
> The BCM2836 uses a Cortex-A7 not a Cortex-A15. Update the device to use
> the correct CPU.
> https://www.raspberrypi.org/documentation/hardware/raspberrypi/bcm2836/QA7_rev3.4.pdf
Can you add these lines with reference to the commits?
Le 29/01/2018 à 11:47, Andreas Schwab a écrit :
> With glibc 2.27 the openpty function prefers the TIOCGPTPEER ioctl.
>
> Signed-off-by: Andreas Schwab
> Reviewed-by: Laurent Vivier
> ---
> v2: handle host with old kernel headers
> v3: fix sparc typos
> ---
> linux-user/aarch64/termbits.h|
Le 02/02/2018 à 11:02, Guido Günther a écrit :
> This unbreaks the testcase from
>
> http://lists.nongnu.org/archive/html/qemu-arm/2018-01/msg00514.html
>
> Thanks to Laurent Vivier for spotting the 7th one.
>
> Signed-off-by: Guido Günther
> Tested-by: Philippe Mathieu-Daudé
> Suggested-b
On 02/15/2018 10:18 AM, Peter Maydell wrote:
> On 15 February 2018 at 13:14, Philippe Mathieu-Daudé wrote:
>> On 02/15/2018 09:49 AM, Philippe Mathieu-Daudé wrote:
>>> On 02/15/2018 09:39 AM, Peter Maydell wrote:
On 8 February 2018 at 05:50, Pekka Enberg wrote:
>>
>> Now I remember why I hes
Hi Philippe,
On Thu, Feb 15, 2018 at 01:29:00AM -0300, Philippe Mathieu-Daudé wrote:
> From: Philippe Mathieu-Daudé
> Subject: [Xen-devel] [PATCH 30/30] xen: use the BYTE-based definitions
> List-Id: Xen developer discussion
>
> It ease code review, unit is explicit.
>
> Signed-off-by: Philipp
On 11 February 2018 at 20:58, Richard Henderson
wrote:
> Changes for v2:
> Include signal frames and PR_SVE_SET/GET_VL.
>
>
> Blurb for v1:
> First, we had noted that ARM_CP_64BIT needed to be removed from
> the ZCR_EL registers, but the patch set was applied without
> actually fixing that.
>
> Se
On 11 February 2018 at 20:58, Richard Henderson
wrote:
> As an implementation choice, widening VL has zeroed the
> previously inaccessible portion of the sve registers.
>
> Signed-off-by: Richard Henderson
> ---
> target/arm/cpu.h | 2 ++
> linux-user/syscall.c | 20 +
> tar
Hi Philippe,
On Thu, Feb 15, 2018 at 09:23:52AM -0300, Philippe Mathieu-Daudé wrote:
>
> Can I add your R-b tag once fixed? Respin will be:
>
> +xenstore_write_int(dom, "memory/target", ram_size / K_BYTE);
> +xenstore_write_int(vm, "memory", ram_size / M_BYTE);
> +xenstore_wr
On 02/15/2018 07:35 AM, Marc-André Lureau wrote:
+#define DPRINTF_STS \
>+DPRINTF("%s: %d: sts = 0x%08x\n", __func__, __LINE__, sts)
>+
>+typedef struct TestState {
>+CompatGMutex data_mutex;
>+CompatGCond data_cond;
>+SocketAddress *addr;
>+QIOChannel *tpm_ioc;
>+GThread
Le 11/02/2018 à 18:47, Samuel Thibault a écrit :
> We properly computed the capped mask size to be put to the application
> buffer, but didn't actually used it. Also, we need to return the capped mask
> size instead of 0 on success.
>
> Signed-off-by: Samuel Thibault
>
> ---
> Difference from v1
Le 13/02/2018 à 14:22, Peter Maydell a écrit :
> Back when we used to support compiling either with or without
> NPTL threading library support, we used a macro THREAD which would
> expand either to nothing (no thread support) or to __thread (threads
> supported). For a long time now we have requir
Le 24/01/2018 à 22:13, Laurent Vivier a écrit :
> From: YunQiang Su
>
> So here we need to detect the version of binaries and set
> cpu_model for it.
>
> Signed-off-by: YunQiang Su
> [lv: original patch modified to move code into cpu_get_model()]
> Signed-off-by: Laurent Vivier
> Reviewed-by:
Le 24/01/2018 à 22:12, Laurent Vivier a écrit :
> Instead of a sequence of "#if ... #endif" move the
> selection to a function in linux-user/*/target_elf.h
>
> We can't add them in linux-user/*/target_cpu.h
> because we will need to include "elf.h" to
> use ELF flags with eflags, and including
> "
Le 24/01/2018 à 22:12, Laurent Vivier a écrit :
> From: YunQiang Su
>
> Add a function to return ELF e_flags and use it
> to select the CPU model.
>
> Signed-off-by: YunQiang Su
> [lv: split the patch and some cleanup in get_elf_eflags()]
> Signed-off-by: Laurent Vivier
> Reviewed-by: Richard
Le 24/01/2018 à 22:13, Laurent Vivier a écrit :
> M680x0 doesn't support the same set of instructions
> as ColdFire, so we can't use "any" CPU type to execute
> m68020 instructions.
> We select CPU type ("m68040" or "any" for ColdFire)
> according to the ELF header. If we can't, we
> use by default
Hi all.
Here is minimal realization of base:allocation context of NBD
block-status extension, which allows to get block status through
NBD.
Vladimir Sementsov-Ogievskiy (9):
nbd/server: add nbd_opt_invalid helper
nbd: change indenting in nbd.h
nbd: BLOCK_STATUS for standard get_block_status
Minimal realization: only one extent in server answer is supported.
Signed-off-by: Vladimir Sementsov-Ogievskiy
---
include/block/nbd.h | 33 ++
nbd/common.c| 10 ++
nbd/server.c| 310 +++-
3 files changed, 352 insertions(+),
NBD_REP_ERR_INVALID is often parameter to nbd_opt_drop and it would
be used more in following patches. So, let's add a helper.
Signed-off-by: Vladimir Sementsov-Ogievskiy
---
nbd/server.c | 50 --
1 file changed, 36 insertions(+), 14 deletions(-)
Prepared indenting for the following patch.
Signed-off-by: Vladimir Sementsov-Ogievskiy
---
include/block/nbd.h | 22 +++---
1 file changed, 11 insertions(+), 11 deletions(-)
diff --git a/include/block/nbd.h b/include/block/nbd.h
index fc50003003..ef1698914b 100644
--- a/include
Minimal realization: only one extent in server answer is supported.
Flag NBD_CMD_FLAG_REQ_ONE is used to force this behavior.
Tests 140, 147 and 205 are fixed due to now server failed on searching
export in context of NBD_OPT_SET_META_CONTEXT option negotiation.
Signed-off-by: Vladimir Sementsov-
The Coprocessor Power Control Register (CPPWR) is new in v8M.
It allows software to control whether coprocessors are allowed
to power down and lose their state. QEMU doesn't have any
notion of power control, so we choose the IMPDEF option of
making the whole register RAZ/WI (indicating that no copr
Signed-off-by: Vladimir Sementsov-Ogievskiy
---
tests/qemu-iotests/iotests.py | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/tests/qemu-iotests/iotests.py b/tests/qemu-iotests/iotests.py
index 1bcc9ca57d..c1302a2f9b 100644
--- a/tests/qemu-iotests/iotests.py
+++ b/tests/
1. NBD_REP_ERR_INVALID is not only about length, so, make message more
general
2. hex format is not very good: it's hard to read something like
"option a (set meta context)", so switch to dec.
Signed-off-by: Vladimir Sementsov-Ogievskiy
---
nbd/client.c | 14 +++---
1 file changed
Signed-off-by: Vladimir Sementsov-Ogievskiy
---
tests/qemu-iotests/206 | 34 ++
tests/qemu-iotests/206.out | 2 ++
tests/qemu-iotests/group | 1 +
3 files changed, 37 insertions(+)
create mode 100644 tests/qemu-iotests/206
create mode 100644 tests/qemu-io
From: Pekka Enberg
This patch adds a "raspi3" machine type, which can now be selected as
the machine to run on by users via the "-M" command line option to QEMU.
The machine type does *not* ignore memory transaction failures so we
likely need to add some dummy devices later when people run somet
5 10:14:11 +)
are available in the Git repository at:
git://git.linaro.org/people/pmaydell/qemu-arm.git
tags/pull-target-arm-20180215
for you to fetch changes up to e545f0f9be1f9e60951017c1e6558216732cc14e:
target/arm: Implement v8M MSPLIM and PSPLIM registers (2018-02-15 13:48
It is ok, that fatal error hides previous not fatal, but hiding
first fatal error is a bad feature.
Signed-off-by: Vladimir Sementsov-Ogievskiy
---
block/nbd-client.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/block/nbd-client.c b/block/nbd-client.c
index 9206652e45..
From: Richard Henderson
Because they are ARM_CP_STATE_AA64, ARM_CP_64BIT is implied.
Signed-off-by: Richard Henderson
Message-id: 20180211205848.4568-2-richard.hender...@linaro.org
Reviewed-by: Peter Maydell
Signed-off-by: Peter Maydell
---
target/arm/helper.c | 8
1 file changed, 4
The PENDNMISET/CLR bits in the ICSR should be RAZ/WI from
NonSecure state if the AIRCR.BFHFNMINS bit is zero. We had
misimplemented this as making the bits RAZ/WI from both
Secure and NonSecure states. Fix this bug by checking
attrs.secure so that Secure code can pend and unpend NMIs.
Signed-off-b
Instead of hardcoding the values of M profile ID registers in the
NVIC, use the fields in the CPU struct. This will allow us to
give different M profile CPU types different ID register values.
This commit includes the addition of the missing ID_ISAR5,
which exists as RES0 in both v7M and v8M.
(Th
Simple way to have auto generated filenames with auto clenup. Like
FilePath but without using 'with' statement and without additional
indentation of the whole test.
Signed-off-by: Vladimir Sementsov-Ogievskiy
---
tests/qemu-iotests/iotests.py | 32
1 file changed
From: Richard Henderson
This also makes sure that we get the correct ordering of
SVE vs FP exceptions.
Signed-off-by: Richard Henderson
Message-id: 20180211205848.4568-5-richard.hender...@linaro.org
Reviewed-by: Peter Maydell
Signed-off-by: Peter Maydell
---
target/arm/cpu.h | 3 +
For M profile cores, cache maintenance operations are done by
writing to special registers in the system register space.
For QEMU, cache operations are always NOPs, since we don't
implement the cache. Implementing these explicitly avoids
a spurious LOG_GUEST_ERROR when the guest uses them.
Signed-
From: Richard Henderson
Signed-off-by: Richard Henderson
Message-id: 20180211205848.4568-3-richard.hender...@linaro.org
Reviewed-by: Peter Maydell
Signed-off-by: Peter Maydell
---
target/arm/cpu.h | 35 ++-
target/arm/helper.c| 6 --
targ
From: Richard Henderson
When storing to an AdvSIMD FP register, all of the high
bits of the SVE register are zeroed. Therefore, call it
more often with is_q as a parameter.
Signed-off-by: Richard Henderson
Message-id: 20180211205848.4568-6-richard.hender...@linaro.org
Reviewed-by: Peter Maydel
From: Pekka Enberg
This patch adds Raspberry Pi 3 support to hw/arm/raspi.c. The
differences to Pi 2 are:
- Firmware address
- Board ID
- Board revision
The CPU is different too, but that's going to be configured as part of
the machine default CPU when we introduce a new machine type.
The p
M profile cores have a similar setup for cache ID registers
to A profile:
* Cache Level ID Register (CLIDR) is a fixed value
* Cache Type Register (CTR) is a fixed value
* Cache Size ID Registers (CCSIDR) are a bank of registers;
which one you see is selected by the Cache Size Selection
Re
From: Philippe Mathieu-Daudé
(qemu) info mtree
address-space: cpu-memory-0
- (prio 0, i/o): system
-07ff (prio 0, rom): aspeed.boot_rom
1e60-1e7f (prio -1, i/o): aspeed_soc.io
- 1e784000
From: Richard Henderson
Nothing in either register affects the TB.
Signed-off-by: Richard Henderson
Message-id: 20180211205848.4568-4-richard.hender...@linaro.org
Reviewed-by: Peter Maydell
Signed-off-by: Peter Maydell
---
target/arm/helper.c | 4 ++--
1 file changed, 2 insertions(+), 2 dele
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