Hi Peter,
On 2018/1/13 13:24, gengdongjiu wrote:
>>> +
>>> +/* For the AArch64, instruction length is 32-bit */
>>> +esr |= ARM_EL_IL;
>>> +env->exception.syndrome = esr;
>>> +
>>> +cc->do_interrupt(c);
>>> +
>>> +/* set ESR_EL1 */
>>> +ret = kvm_arm_cpreg_value(cpu, offset
and introduce SFC and DFC control registers.
Signed-off-by: Laurent Vivier
---
v2: copy bit 2 of SFC and DFC to tb->flags to
inline memory access in moves decoder.
target/m68k/cpu.h | 10 --
target/m68k/helper.c| 10 ++
target/m68k/monitor.c | 2 ++
target/m68k/op_helpe
Only add MC68040 MMU page table processing and related
registers (Special Status Word, Translation Control Register,
User Root Pointer and Supervisor Root Pointer).
Transparent Translation Registers, DFC/SFC and pflush/ptest
will be added later.
Signed-off-by: Laurent Vivier
---
v3: s/smaller/sm
This series introduces the MC68040 MMU.
But first of all, we need to modify the prototype
of tlb_fill() and handle_mmu_fault handler to pass
the size of the access. MC68040 stores this value
in the exception stack frame.
Following patches add:
- MMU page table and fault handlers,
- Transparent Tr
Dump MMU state and address mappings.
Signed-off-by: Laurent Vivier
Reviewed-by: Richard Henderson
---
CC: Dr. David Alan Gilbert
hmp-commands-info.hx | 2 +-
target/m68k/cpu.h | 1 +
target/m68k/helper.c | 216 ++
target/m68k/monitor.c
Add ittr0, ittr1, dttr0, dttr1 and manage Transparent Translations
Signed-off-by: Laurent Vivier
Reviewed-by: Richard Henderson
---
target/m68k/cpu.h | 18 +++
target/m68k/helper.c| 79 +
target/m68k/monitor.c | 4 +++
target/
Signed-off-by: Laurent Vivier
Reviewed-by: Richard Henderson
---
v2: change ACCESS_PTEST value because of new ACCESS_DEBUG
use -page_size to mask address instead of TARGET_PAGE_MASK
target/m68k/cpu.h | 3 +++
target/m68k/helper.c| 72 ++
The MC68040 MMU provides the size of the access that
triggers the page fault.
This size is set in the Special Status Word which
is written in the stack frame of the access fault
exception.
So we need the size in m68k_cpu_unassigned_access() and
m68k_cpu_handle_mmu_fault().
To be able to do that,
The instruction "moves" can select source and destination
address space (user or kernel). This patch modifies
all the load/store functions to be able to provide
the address space the caller wants to use instead
of using the current one. All the callers are modified
to provide the default address sp
Hello Konrad,
thanks for review.
On Friday 12 of January 2018 11:43:18 KONRAD Frederic wrote:
> You should add that to the title as well:
>
> git format-patch ... --subject-prefix="PATCH V3" ...
>
> to avoid any confusion.
OK, I add V4.
> You need to run the ./scripts/checkpatch.pl on your patc
The actual imx_eth_enable_rx() function is buggy.
It updates s->regs[ENET_RDAR] after calling qemu_flush_queued_packets().
qemu_flush_queued_packets() is going to call imx_XXX_receive() which itself
is going to call imx_eth_enable_rx().
By updating s->regs[ENET_RDAR] after calling qemu_flush_que
On 13 January 2018 at 01:04, francisco iglesias
wrote:
> CID 1383841 (#2 of 4): Uninitialized scalar variable (UNINIT)29.
> uninit_use_in_call: Using uninitialized value (uint32_t)tx_rx[0] when
> calling
> ssi_transfer.
>
> This is correct, tx_rx is used uninitialized but since we are transmitting
On 01/12/2018 11:06 AM, Marc-André Lureau wrote:
Hi
On Thu, Dec 7, 2017 at 10:30 PM, wrote:
From: "Michael S. Tsirkin"
Allowing arbitary file names on command line is setting us up for
failure: future guests will look for a specific QEMU-specified name and
will get confused finding a user f
M680x0 doesn't support the same set of instructions
as ColdFire, so we can't use "any" CPU type to execute
m68020 instructions.
We select CPU type ("m68020" or "any" for ColdFire)
according to the ELF header. If we can't, we
use by default the value used until now: "any".
Signed-off-by: Laurent Vi
This idea has been suggested to me before by Philippe
Mathieu-Daudé, and recently YunQiang Su has proposed a
patch to manage the MIPS r6 case.
Based on this, this series tries to clean-up the original
patch, and introduces the use for m68k architecture and
port the patch from YunQiang Su.
Laurent
From: YunQiang Su
So here we need to detect the version of binaries and set
cpu_model for it.
[lv: original patch modified to move code into get_cpu_model()]
Signed-off-by: Laurent Vivier
---
Notes:
YunQiang Su, please add your Signed-off-by that was
missing in your original patch.
i
From: YunQiang Su
Move CPU type name selection to a function,
and add a function to return ELF e_flags.
[lv: splitted the patch and some cleanup in get_elf_eflags()]
Signed-off-by: Laurent Vivier
---
Notes:
YunQiang Su, please add your Signed-off-by that was
missing in your original pa
Hi Richard,
+# Field examples:
+#
+# %disp 0:s16 -- sextract(i, 0, 16)
+# %imm9 16:6 10:3 -- extract(i, 16, 6) << 3 | extract(i, 10, 3)
startindex:endindex for unnamed_field is more intuitive. As any ISA
manual would specify those.
+#
+# It is recommended, but not required,
On 13 January 2018 at 17:14, Bastian Koppelmann
wrote:
> Hi Richard,
>
> +# Field examples:
> +#
> +# %disp 0:s16 -- sextract(i, 0, 16)
> +# %imm9 16:6 10:3 -- extract(i, 16, 6) << 3 | extract(i, 10, 3)
>
> startindex:endindex for unnamed_field is more intuitive. As any ISA
>
On Saturday, 13 January 2018, Peter Maydell
wrote:
> On 13 January 2018 at 01:04, francisco iglesias
> wrote:
> > CID 1383841 (#2 of 4): Uninitialized scalar variable (UNINIT)29.
> > uninit_use_in_call: Using uninitialized value (uint32_t)tx_rx[0] when
> > calling
> > ssi_transfer.
> >
> > This
Signed-off-by: Deniz Eren
I’ve tested and used this work actively at for developing driverless Straddle
and AGV embedded software with QNX and Linux hosts with Advantech CAN-bus cards.
Sent from my iPhone
Deniz Eren
+61 400 307 762
> On 7 Jan 2018, at 7:47 am, p...@cmp.felk.cvut.cz wrote:
>
Signed-off-by: Deniz Eren
Sent from my iPhone
Deniz Eren
+61 400 307 762
> On 7 Jan 2018, at 7:47 am, p...@cmp.felk.cvut.cz wrote:
>
> From: Deniz Eren
>
> Signed-off-by: Pavel Pisa
> ---
> hw/can/Makefile.objs | 1 +
> hw/can/can_mioe3680_pci.c | 335
Hi,
Learning how to implement QOM devices I found the pattern changing parent hooks
when the parent is abstract not trivial to understand.
This series add few helpers to have this pattern more explicit.
Those functions deserve some comments, but before spending more time I'd like
to get some fee
following the DeviceRealize and DeviceUnrealize typedefs,
this unify a bit the new QOM API.
Signed-off-by: Philippe Mathieu-Daudé
---
include/hw/qdev-core.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/include/hw/qdev-core.h b/include/hw/qdev-core.h
index 0a71bf83f0..8
changes generated using the following Coccinelle patch:
@@
type DeviceParentClass;
DeviceParentClass *pc;
DeviceClass *dc;
identifier parent_fn;
identifier child_fn;
@@
(
+device_class_set_parent_realize(dc, child_fn, &pc->parent_fn);
-pc->parent_fn = dc->realize;
...
-dc->
QOM API learning curve is quite hard, in particular when devices inherit from
abstract parent.
To be more explicit about when a device class change the parent hooks, add few
helpers hoping a device class_init() will be easier to understand.
Signed-off-by: Philippe Mathieu-Daudé
---
include/hw/qd
Signed-off-by: Philippe Mathieu-Daudé
---
hw/usb/ccid.h | 9 +--
hw/usb/ccid-card-emulated.c | 48 +++-
hw/usb/ccid-card-passthru.c | 13 +-
hw/usb/dev-smartcard-reader.c | 57 +++
4 files cha
Cc'ing Andreas Färber
On 01/13/2018 11:35 PM, Philippe Mathieu-Daudé wrote:
> Signed-off-by: Philippe Mathieu-Daudé
> ---
> hw/usb/ccid.h | 9 +--
> hw/usb/ccid-card-emulated.c | 48 +++-
> hw/usb/ccid-card-passthru.c | 13 +-
> hw
Signed-off-by: Philippe Mathieu-Daudé
---
hw/i2c/core.c | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/hw/i2c/core.c b/hw/i2c/core.c
index 59068f157e..c84dbfb884 100644
--- a/hw/i2c/core.c
+++ b/hw/i2c/core.c
@@ -8,6 +8,7 @@
*/
#include "qemu/osdep.h"
+#incl
Signed-off-by: Philippe Mathieu-Daudé
---
hw/core/sysbus.c | 11 ++-
1 file changed, 6 insertions(+), 5 deletions(-)
diff --git a/hw/core/sysbus.c b/hw/core/sysbus.c
index 5d0887f499..0531eb60ce 100644
--- a/hw/core/sysbus.c
+++ b/hw/core/sysbus.c
@@ -18,6 +18,7 @@
*/
#include "qemu
This description is more appropriate:
"hw/i2c: convert i2c slave init() to realize()"
On 01/13/2018 11:45 PM, Philippe Mathieu-Daudé wrote:
> Signed-off-by: Philippe Mathieu-Daudé
> ---
> hw/i2c/core.c | 12 ++--
> 1 file changed, 6 insertions(+), 6 deletions(-)
>
> diff --git a/hw/i2c/
On Friday, January 12, 2018 6:38 PM, Stefan Hajnoczi wrote:
> On Fri, Jan 12, 2018 at 02:44:00PM +0800, Wei Wang wrote:
> > On 01/11/2018 05:56 PM, Stefan Hajnoczi wrote:
> > > On Thu, Jan 11, 2018 at 6:31 AM, Wei Wang
> wrote:
> > > > On 01/11/2018 12:14 AM, Stefan Hajnoczi wrote:
> >
> I expect
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