On 18 December 2017 at 21:08, Jeff Cody wrote:
> The following changes since commit 411ad78115ebeb3411cf4b7622784b93dfabe259:
>
> Merge remote-tracking branch
> 'remotes/stefanberger/tags/pull-tpm-2017-12-15-1' into staging (2017-12-17
> 15:27:41 +)
>
> are available in the git repository
Hi Marcel, Yuval,
On Sun, Dec 17, 2017 at 9:54 AM, Marcel Apfelbaum wrote:
> From: Yuval Shaia
>
> PVRDMA is the QEMU implementation of VMware's paravirtualized RDMA device.
> It works with its Linux Kernel driver AS IS, no need for any special guest
> modifications.
>
> While it complies with t
On 19/12/17 11:54, Laurent Vivier wrote:
It makes the code clearer to separate the bus implementation
from the devices one.
Remove ADB_DPRINTF() from adb.c instead of adding it to new files.
Some minor changes to make checkpatch.pl happy.
Signed-off-by: Laurent Vivier
---
hw/input/Makefile.
Hello Laurent,
On Tue, Dec 19, 2017 at 05:17:35PM +0100, Laurent Vivier wrote:
> > below patches add support for big-endian aarch64 to linux-user. Almost
> Could you also update scripts/qemu-binfmt-conf.sh for the aarch64_be magic?
Done. v2 forthcoming.
--
Bye,
Michael
Since for aarch64 the signal trampoline is synthesized directly into the
signal frame we need to make sure the instructions end up little-endian.
Otherwise the wrong endianness will cause a SIGILL upon return from the
signal handler on big-endian targets.
Signed-off-by: Michael Weiser
---
linux-
Hello,
below patches add support for big-endian aarch64 to linux-user. Almost
everything is already in place. The patches just set up the CPU flags as
required for big-endianess, add a distinction in uname and make sure the
instructions for the signal trampoline end up in memory little-endian.
Fin
Enable big-endian mode for data accesses on aarch64 for big-endian linux
user mode. Activate it for all execution levels as documented by ARM:
Set the SCTLR EE bit for ELs 1 through 3. Additionally set bit E0E in
EL1 to enable it in EL0 as well.
Signed-off-by: Michael Weiser
---
linux-user/main.
On 12/19/2017 11:29 AM, Collin L. Walling wrote:
On 12/19/2017 02:31 AM, Thomas Huth wrote:
On 18.12.2017 17:16, Collin L. Walling wrote:
On 12/18/2017 08:06 AM, Thomas Huth wrote:
On 11.12.2017 23:19, Collin L. Walling wrote:
Moved:
memcmp from bootmap.h to libc.h (renamed from _memcmp)
Make big-endian aarch64 systems identify as aarch64_be as expected by
big-endian userland and toolchains.
Signed-off-by: Michael Weiser
---
linux-user/aarch64/target_syscall.h | 4
1 file changed, 4 insertions(+)
diff --git a/linux-user/aarch64/target_syscall.h
b/linux-user/aarch64/target
As we now have a linux-user aarch64_be target, we can add it to the list
of supported targets in qemu-binfmt-conf.sh
Signed-off-by: Michael Weiser
---
scripts/qemu-binfmt-conf.sh | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/scripts/qemu-binfmt-conf.sh b/scripts/qemu-b
Add target aarch64_be-linux-user. This allows a qemu-aarch64_be binary
to be built that will run big-endian aarch64 binaries.
Signed-off-by: Michael Weiser
---
configure | 9 +
default-configs/aarch64_be-linux-user.mak | 1 +
2 files changed, 6 insertions(
Am 19.12.2017 um 17:34 schrieb Thomas Huth:
> No, as far as I know, the online qemu-doc is only updated for release
> candidates and releases, so the current information will stay there a
> little bit longer.
It's normally updated when I create new QEMU installers for Windows.
I can update it when
On 18 December 2017 at 22:40, Aurelien Jarno wrote:
> The following changes since commit eaefea537b476cb853e2edbdc68e969ec777e4bb:
>
> Merge remote-tracking branch 'remotes/mjt/tags/trivial-patches-fetch' into
> staging (2017-12-18 14:17:42 +)
>
> are available in the Git repository at:
>
>
On Fri, Dec 15, 2017 at 04:45:53PM +0800, Jay Zhou wrote:
> v1 -> v2:
> * delete the "used_memslots" global variable, and add it
> for vhost-user and vhost-kernel separately
imammedo, any feedback on this?
> Jay Zhou (2):
> vhost: add used memslot number for vhost-user and vhost-kernel
On 19/12/2017 18:34, Philippe Mathieu-Daudé wrote:
> Hi,
>
> This is a very boring series.
>
> I a later series I refactor the iotests.py class, however when the first
> version
> of series [1] was posted I received comments that this class should no support
> Python 3.
>
> I didn't tested with
Public bug reported:
For example:
qemu-system-x86_64 -cdrom /path/to/directory
Results in:
Could not read image for determining its format: File too large
** Affects: qemu
Importance: Undecided
Status: New
--
You received this bug notification because you are a member o
On Mon, Nov 13, 2017 at 11:40 PM, Thomas Huth wrote:
> On 13.11.2017 23:36, Alistair Francis wrote:
>> Signed-off-by: Alistair Francis
> [...]
>> diff --git a/target/ppc/translate.c b/target/ppc/translate.c
>> index 998fbed848..8eafe30624 100644
>> --- a/target/ppc/translate.c
>> +++ b/target/ppc
Is this the correct place to file kvm-pr bug reports?
--
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
https://bugs.launchpad.net/bugs/1738691
Title:
Guest kernel crashes with kvm_pr on POWER8
Status in QEMU:
New
Bug description
I believe this is the issue i am seeing as well. QEMU continues to
consume memory (>6GB) until the host machine runs out of memory (I am
also using slirp for networking). I am able to reproduce it from qemu
2.5 (version found in apt-get for ubuntu 16.04.3 LTS) and I verified it
exists after I compi
This patch adds an interface for pacing the execution of QEMU to match an
external
simulation clock. Its aim is to permit QEMU to be used as a module within a
larger simulation system. This version renames the feature "external-sim"
and cleans up the code for the most recent code in the git repo.
Hi,
This series seems to have some coding style problems. See output below for
more information:
Type: series
Message-id: 1513724822-25232-1-git-send-email-nutar...@ornl.gov
Subject: [Qemu-devel] [PATCH V10] qqq: module for synchronizing with a
simulation
=== TEST SCRIPT BEGIN ===
#!/bin/bash
List all possible valid CPU options.
Signed-off-by: Alistair Francis
Reviewed-by: Philippe Mathieu-Daudé
---
V4:
- Remove spaces
V3:
- Add static property
V2:
- Fix the indentation
hw/arm/raspi.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/hw/arm/raspi.c b/hw/arm/raspi.c
ind
There are numorous QEMU machines that only have a single or a handful of
valid CPU options. To simplyfy the management of specificying which CPU
is/isn't valid let's create a property that can be set in the machine
init. We can then check to see if the user supplied CPU is in that list
or not.
I h
The BCM2836 uses a Cortex-A7 not a Cortex-A15. Update the device to use
the correct CPU.
https://www.raspberrypi.org/documentation/hardware/raspberrypi/bcm2836/QA7_rev3.4.pdf
Signed-off-by: Alistair Francis
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Igor Mammedov
---
V3:
- Use ARM_CPU_TY
List all possible valid CPU options.
Signed-off-by: Alistair Francis
Reviewed-by: Philippe Mathieu-Daudé
---
V4:
- Remove spaces
V3:
- Make variable static
V2:
- Fixup alignment
hw/arm/xilinx_zynq.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/hw/arm/xilinx_zynq.c b/hw/arm/xil
List all possible valid CPU options.
Signed-off-by: Alistair Francis
Reviewed-by: Eduardo Habkost
Reviewed-by: Philippe Mathieu-Daudé
---
An implementation for single CPU machines is still being discussed. A
solution proposed by Eduardo is this:
1) Change the default on TYPE_MACHINE to:
List all possible valid CPU options.
Although the board only ever has a Cortex-M3 we mark the Cortex-M4 as
supported because the Netduino2 Plus supports the Cortex-M4 and the
Netduino2 Plus is similar to the Netduino2.
Signed-off-by: Alistair Francis
Reviewed-by: Eduardo Habkost
Reviewed-by: Ph
On 20 December 2017 at 00:27, Alistair Francis
wrote:
> There are numorous QEMU machines that only have a single or a handful of
> valid CPU options. To simplyfy the management of specificying which CPU
> is/isn't valid let's create a property that can be set in the machine
> init. We can then che
On Tue, 19 Dec 2017 15:57:18 +0100
Markus Armbruster wrote:
> QAPI/QMP interface review only.
>
> You neglected to cc: the maintainers of qapi-schema.json, so I'm doing
> that for you.
>
Thank you so much. I screwed up with this patchset at least twice: with
list of maintainers and with my own
On Thu, Dec 14, 2017 at 7:19 AM, Andrey Smirnov
wrote:
> Add code to emulate Xilinx Slave Serial FPGA configuration port.
>
> Cc: "Edgar E. Iglesias"
> Cc: Alistair Francis
> Cc: qemu-devel@nongnu.org
> Cc: qemu-...@nongnu.org
> Cc: yurov...@gmail.com
> Signed-off-by: Andrey Smirnov
Hey,
Than
On Tue, Dec 19, 2017 at 4:43 PM, Peter Maydell wrote:
> On 20 December 2017 at 00:27, Alistair Francis
> wrote:
>> There are numorous QEMU machines that only have a single or a handful of
>> valid CPU options. To simplyfy the management of specificying which CPU
>> is/isn't valid let's create a p
On 19/12/2017 14:33, sochin.jiang wrote:
> From: "sochin.jiang"
>
> Till now, we've already notify guest as a batch mostly, an
> extra BH won't decrease guest interrupts much, but cause a
> significant notification loss. Generally, we could have 15%
> or so performance lost in single queue IO
On Tue, Dec 19, 2017 at 4:55 PM, Alistair Francis
wrote:
> On Tue, Dec 19, 2017 at 4:43 PM, Peter Maydell
> wrote:
>> On 20 December 2017 at 00:27, Alistair Francis
>> wrote:
>>> There are numorous QEMU machines that only have a single or a handful of
>>> valid CPU options. To simplyfy the mana
On 12/19/2017 11:07 AM, Vladimir Sementsov-Ogievskiy wrote:
> 13.12.2017 07:12, Fam Zheng wrote:
>> On Mon, 11/13 19:20, Vladimir Sementsov-Ogievskiy wrote:
>>> Hi all.
>>>
>>> There are three qmp commands, needed to implement external backup API.
>>>
>>> Using these three commands, client may do
On 20/12/17 04:26, Alex Williamson wrote:
> On Tue, 19 Dec 2017 15:52:02 +1100
> David Gibson wrote:
>
>> On Fri, Dec 15, 2017 at 05:29:14PM +1100, Alexey Kardashevskiy wrote:
>>> This makes use of a new VFIO_REGION_INFO_CAP_MSIX_MAPPABLE capability
>>> which tells that a region with MSIX data ca
On 12/18/2017 08:18 PM, David Gibson wrote:
> On Mon, Dec 18, 2017 at 01:33:07PM -0500, John Snow wrote:
>>
>>
>> On 12/18/2017 07:30 AM, BALATON Zoltan wrote:
>>> On Mon, 18 Dec 2017, David Gibson wrote:
On Sat, Dec 16, 2017 at 11:42:39PM +0100, BALATON Zoltan wrote:
> This is a common
On 20/12/17 01:59, Paolo Bonzini wrote:
> On 19/12/2017 15:09, Alex Williamson wrote:
>> On Tue, 19 Dec 2017 12:12:35 +0100
>> Paolo Bonzini wrote:
>>
>>> On 12/12/2017 06:46, Alex Williamson wrote:
> +enum IOMMUMemoryRegionAttr {
> +IOMMU_ATTR_KVM_FD
You're generalizing th
Matthew Wilcox wrote:
> > I think xb_find_set() has a bug in !node path.
>
> Don't think. Write a test-case. Please. If it shows a bug, then great,
+unsigned long xb_find_set(struct xb *xb, unsigned long size,
+ unsigned long offset)
+{
+ struct radix_tree_root *r
In fact, I firstly found a performance loss before and after
commit 9ffe337 using fio tools in suse11-sp3 guest(vitio-blk), especially
when testing 4k single IO models(say, write, randwrite, read and
randread, with iodepth set to 1), the result is 15%-20% performance loss
since commit 9ffe337,
On Tue, Dec 19, 2017 at 11:33:21AM +, Dr. David Alan Gilbert wrote:
> * Peter Xu (pet...@redhat.com) wrote:
> > On Tue, Dec 19, 2017 at 10:14:08AM +, Dr. David Alan Gilbert wrote:
> > > * Peter Xu (pet...@redhat.com) wrote:
> > > > On Fri, Dec 15, 2017 at 05:16:53PM +, Dr. David Alan Gi
On Fri, Nov 24, 2017 at 03:34:14PM +0800, Peter Xu wrote:
> v2:
> - drop patch 1 since merged
> - add last patch as suggested by Paolo
>
> Please review, thanks.
Ping for 2.12 dev window.
>
> Peter Xu (3):
> cpu: refactor cpu_address_space_init()
> cpu: suffix cpu address spaces with cpu in
On Fri, Dec 08, 2017 at 12:26:52PM +0800, Peter Xu wrote:
> Please review. Thanks,
Ping for 2.12.
>
> Peter Xu (2):
> intel_iommu: remove X86_IOMMU_PCI_DEVFN_MAX
> intel_iommu: fix error param in string
>
> hw/i386/intel_iommu.c | 12 ++--
> include/hw/i386/x86-iommu.h | 1
On Wed, Dec 20, 2017 at 12:13:04PM +1100, Alexey Kardashevskiy wrote:
> On 20/12/17 04:26, Alex Williamson wrote:
> > On Tue, 19 Dec 2017 15:52:02 +1100
> > David Gibson wrote:
> >
> >> On Fri, Dec 15, 2017 at 05:29:14PM +1100, Alexey Kardashevskiy wrote:
> >>> This makes use of a new VFIO_REGION
On Sun, Nov 26, 2017 at 03:59:13PM -0600, Michael Davidsaver wrote:
> Signed-off-by: Michael Davidsaver
> ---
> default-configs/ppc-softmmu.mak | 1 +
> hw/ppc/Makefile.objs| 1 +
> hw/ppc/mvme3100.c | 740
>
> hw/ppc/mvme310
On Tue, Dec 19, 2017 at 05:05:59PM +, Stefan Hajnoczi wrote:
> On Tue, Dec 19, 2017 at 2:56 PM, Michael S. Tsirkin wrote:
> >> * Please handle short reads/writes and EAGAIN with the UNIX domain
> >> socket. Do
> >>not use read/write_all() functions because they hang QEMU until I/O
> >>
On Tue, Dec 19, 2017 at 04:13:18PM -0300, Philippe Mathieu-Daudé wrote:
> Hi Marcel, Yuval,
>
> On Sun, Dec 17, 2017 at 9:54 AM, Marcel Apfelbaum wrote:
> > From: Yuval Shaia
> >
> > PVRDMA is the QEMU implementation of VMware's paravirtualized RDMA device.
> > It works with its Linux Kernel dri
On Mon, Dec 18, 2017 at 07:35:48PM +, Felipe Franciosi wrote:
> >> CCed Felipe (Nutanix) and Jim (SPDK) in case they have comments.
> >
> > SPDK vhost-user targets only expect max 128 segments. They also
> > pre-allocate I/O task structures when QEMU connects to the vhost-user
> > device.
>
On Tue, Dec 19, 2017 at 03:45:52PM +0300, Denis V. Lunev wrote:
> On 12/15/2017 06:02 PM, Denis V. Lunev wrote:
> > v2->v3
> > - added 2.12 machine types
> > - added compat properties for 2.11 machine type
> >
> > v1->v2:
> > - added max_segments property for virtblock device
> >
> > Signed-off-by:
On Fri, Dec 15, 2017 at 06:02:48PM +0300, Denis V. Lunev wrote:
> v2->v3
> - added 2.12 machine types
> - added compat properties for 2.11 machine type
>
> v1->v2:
> - added max_segments property for virtblock device
I'm not applying this for now.
It seems too easy to create illegal configuratio
On Wed, Dec 13, 2017 at 12:26:44AM -0800, b...@skyportsystems.com wrote:
> From: Ben Warren
>
> Now that virtio-win guest drivers provided by non-Redhat vendors need to
> use a different Subsystem Vendor ID value, a way is needed to set this
> parameter on the host. This works with all of the PC
On 12/19/2017 07:50 PM, Max Reitz wrote:
On 2017-12-18 10:24, seeteena wrote:
On 12/15/2017 02:48 PM, Max Reitz wrote:
On 2017-12-13 05:50, seeteena wrote:
Hi David,
While creating snapshots when tag name '0' used in the very first and followed
by tag name '1' then snapshot created with t
Hi Michael,
> On Dec 19, 2017, at 8:27 PM, Michael S. Tsirkin wrote:
>
> On Wed, Dec 13, 2017 at 12:26:44AM -0800, b...@skyportsystems.com wrote:
>> From: Ben Warren
>>
>> Now that virtio-win guest drivers provided by non-Redhat vendors need to
>> use a different Subsystem Vendor ID value, a w
On Sat, Dec 09, 2017 at 09:43:21AM +0100, Cédric Le Goater wrote:
> With the POWER9 processor comes a new interrupt controller called
> XIVE. It is composed of three sub-engines :
>
> - Interrupt Virtualization Source Engine (IVSE). These are in PHBs,
> in the main controller for the IPIS an
On Tue, Dec 19, 2017 at 07:37:31AM +0100, Cédric Le Goater wrote:
> On 12/18/2017 01:59 AM, Benjamin Herrenschmidt wrote:
> > On Thu, 2017-12-14 at 16:24 +0100, Cédric Le Goater wrote:
> >> The API between the source and the IVRE is extremely simple :
> >>
> >> static void spapr_xive_irq(sPAPRXiv
On Sat, Dec 09, 2017 at 09:43:22AM +0100, Cédric Le Goater wrote:
> Each XIVE interrupt source is associated with a two bit state machine
> called an Event State Buffer (ESB) : the first bit "P" means that an
> interrupt is "pending" and waiting for an EOI and the bit "Q" (queued)
> means a new int
On Wed, Dec 20, 2017 at 4:06 AM, Michael S. Tsirkin wrote:
> On Tue, Dec 19, 2017 at 05:05:59PM +, Stefan Hajnoczi wrote:
>> On Tue, Dec 19, 2017 at 2:56 PM, Michael S. Tsirkin wrote:
>> >> * Please handle short reads/writes and EAGAIN with the UNIX domain
>> >> socket. Do
>> >>not use
On Tue, 12/19 15:29, Markus Armbruster wrote:
> Adding Eric for additonal QMP design expertise.
>
> Fam Zheng writes:
>
> > Previously we only print hint lines if we are in a command line context
> > or HMP. However QMP errors are also eventually consumed by human and the
> > hint could help.
>
On Tue, 12/19 16:21, Stefan Hajnoczi wrote:
> Hi,
> Vhost-user implementations assume the slave is already running before
> the master starts. The slave is required during virtio device
> initialization (e.g. feature bit negotiation) and so it is simplest to
> assume that the master is already ava
On 19.12.2017 18:34, Philippe Mathieu-Daudé wrote:
> Signed-off-by: Philippe Mathieu-Daudé
> ---
> tests/qemu-iotests/iotests.py | 7 +--
> 1 file changed, 5 insertions(+), 2 deletions(-)
>
> diff --git a/tests/qemu-iotests/iotests.py b/tests/qemu-iotests/iotests.py
> index 4c515d2e6c..0e1b8
On Mon, Dec 18, 2017 at 10:22:18PM +1100, David Gibson wrote:
> On Mon, Dec 18, 2017 at 05:17:35PM +0800, Liu, Yi L wrote:
> > On Mon, Dec 18, 2017 at 05:14:42PM +1100, David Gibson wrote:
> > > On Thu, Nov 16, 2017 at 04:57:09PM +0800, Liu, Yi L wrote:
> > > > Hi David,
> > > >
> > > > On Tue, No
On Mon, Dec 18, 2017 at 10:35:31PM +1100, David Gibson wrote:
> On Wed, Nov 15, 2017 at 03:16:32PM +0800, Peter Xu wrote:
> > On Tue, Nov 14, 2017 at 10:52:54PM +0100, Auger Eric wrote:
> >
> > [...]
> >
> > > I meant, in the current intel_iommu code, vtd_find_add_as() creates 1
> > > IOMMU MR an
On 12/20/2017 06:09 AM, David Gibson wrote:
> On Sat, Dec 09, 2017 at 09:43:21AM +0100, Cédric Le Goater wrote:
>> With the POWER9 processor comes a new interrupt controller called
>> XIVE. It is composed of three sub-engines :
>>
>> - Interrupt Virtualization Source Engine (IVSE). These are in P
On 12/20/2017 06:22 AM, David Gibson wrote:
> On Sat, Dec 09, 2017 at 09:43:22AM +0100, Cédric Le Goater wrote:
>> Each XIVE interrupt source is associated with a two bit state machine
>> called an Event State Buffer (ESB) : the first bit "P" means that an
>> interrupt is "pending" and waiting for
HPET saves its state by calculating the current time and recovers timer
offset using this calculated value. But these calculations include
divisions and multiplications. Therefore the timer state cannot be recovered
precise enough.
This patch introduces saving of the original value of the offset to
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