On Sun, Oct 29, 2017 at 12:47:07PM +1100, Alexey Kardashevskiy wrote:
> On 29/10/17 07:45, Daniel P. Berrange wrote:
> > On Sat, Oct 28, 2017 at 12:53:50PM +1100, Alexey Kardashevskiy wrote:
> >> On 28/10/17 00:14, Daniel P. Berrange wrote:
> >>> Some users can't run a bare 'git' command, due to ne
"Dr. David Alan Gilbert" wrote:
> * Juan Quintela (quint...@redhat.com) wrote:
>> As we have two guests running, just pass always who we want to send a
>> message to. Once there, refactor return_or_event() into wait_command.
>>
>> Signed-off-by: Juan Quintela
>
> Hmm was there anything else any
"Dr. David Alan Gilbert" wrote:
> * Juan Quintela (quint...@redhat.com) wrote:
>> Signed-off-by: Juan Quintela
>> ---
>> tests/migration-test.c | 27 ---
>> 1 file changed, 24 insertions(+), 3 deletions(-)
>>
>> diff --git a/tests/migration-test.c b/tests/migration-test.
Am 27.10.2017 um 12:18 hat Jeff Cody geschrieben:
> On Fri, Oct 27, 2017 at 11:09:19AM +0200, Kevin Wolf wrote:
> > Am 27.10.2017 um 10:57 hat Jeff Cody geschrieben:
> > > The on disk image format 'inuse' header field is updated blindly if the
> > > image is opened RDWR. This can cause problems if
The main problem is that HAX currently doesn't work properly at all on my both
Windows 8.1 and Mac OS X 10.12.6 machines.
I can give other examples if it is necessary
--
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
https://bugs.lau
Hi Alin,
Unfortunately it is not possible today. It would be very helpful for optimising
RSS on Windows guest as well.
Best regards,
Yan.
> On 27 Oct 2017, at 19:12, Alin Rauta wrote:
>
> Hi,
> I have a question regarding receive pkts classification in QEMU.
> The virtIO spec states that the
Add support for Micron (Numonyx) n25q512a11 and n25q512a13 flashes.
Signed-off-by: Francisco Iglesias
Acked-by: Marcin Krzemiński
Reviewed-by: Alistair Francis
---
hw/block/m25p80.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/hw/block/m25p80.c b/hw/block/m25p80.c
index cf39e36..054dc
Add support for continuous read out of the RDSR and READ_FSR status
registers until the chip select is deasserted. This feature is supported
by amongst others 1 or more flashtypes manufactured by Numonyx (Micron),
Windbond, SST, Gigadevice, Eon and Macronix.
Signed-off-by: Francisco Iglesias
Acke
Hi,
This patch series is an attempt to add support for the ZynqMP QSPI (consisting
of the Generic QSPI and the legacy QSPI) to the xlnx-zcu102 board and connect
Numonyx n25q512a11 flashes to the QSPI. Also some functionality is added to
m25p80.
The series starts by adding support in m25p80 for c
Add support for zero pumping according to the transfer size register.
Signed-off-by: Francisco Iglesias
---
hw/ssi/xilinx_spips.c | 47 ---
include/hw/ssi/xilinx_spips.h | 2 ++
2 files changed, 42 insertions(+), 7 deletions(-)
diff --git a/hw/ss
Add support for SST READ ID 0x90/0xAB commands for reading out the flash
manufacuter ID and device ID.
Signed-off-by: Francisco Iglesias
Acked-by: Alistair Francis
---
hw/block/m25p80.c | 23 +++
1 file changed, 23 insertions(+)
diff --git a/hw/block/m25p80.c b/hw/block/m25
Move the FlashCMD enum, XilinxQSPIPS and XilinxSPIPSClass structures to the
header for consistency. Also move out a define and remove two dubbel included
headers (while touching the code). Finally, add 4 byte address commands to the
FlashCMD enum.
Signed-off-by: Francisco Iglesias
---
hw/ssi/xil
Add support for the bank address register access commands (BRRD/BRWR) and
the BULK_ERASE (0x60) command.
Signed-off-by: Francisco Iglesias
---
hw/block/m25p80.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/hw/block/m25p80.c b/hw/block/m25p80.c
index 7a5c137..cf39e36 100644
--- a/hw
Add support for the ZynqMP QSPI (consisting of the Generic QSPI and Legacy
QSPI) and connect Numonyx n25q512a11 flashes to it.
Signed-off-by: Francisco Iglesias
Reviewed-by: Alistair Francis
---
hw/arm/xlnx-zcu102.c | 23 +++
hw/arm/xlnx-zynqmp.c | 26 +++
Add support for the RX discard and RX drain functionality. Also transmit
one byte per dummy cycle (to the flash memories) with commands that require
these.
Signed-off-by: Francisco Iglesias
---
hw/ssi/xilinx_spips.c | 167 +-
include/hw/ssi/xilinx_
Update striping functionality to be big-endian bit order and output even
bits into flash memory connected to the lower QSPI bus and odd bits into
the flash memory connected to the upper QSPI bus.
Signed-off-by: Francisco Iglesias
---
hw/ssi/xilinx_spips.c | 19 ++-
1 file changed
Make tx/rx_data_bytes more generic so they can be reused (when adding
support for the Zynqmp Generic QSPI).
Signed-off-by: Francisco Iglesias
---
hw/ssi/xilinx_spips.c | 64 +--
1 file changed, 37 insertions(+), 27 deletions(-)
diff --git a/hw/ssi
Add support for 4 byte addresses in the LQSPI and correct LQSPI_CFG_SEP_BUS.
Signed-off-by: Francisco Iglesias
---
hw/ssi/xilinx_spips.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/hw/ssi/xilinx_spips.c b/hw/ssi/xilinx_spips.c
index 3a98799..7f0f317 100644
--- a/hw/s
* Eric Blake (ebl...@redhat.com) wrote:
> On 10/28/2017 06:44 AM, Programmingkid wrote:
> > I'm trying to use an image file that has spaces in its file name (and
> > sometimes in the path) to be used as a USB flash drive. When I try adding
> > the image file using the drive_add command I see this
Don't set TX FIFO UNDERFLOW interrupt after done transmiting the commands.
Also update interrupts after reading out the interrupt status.
Signed-off-by: Francisco Iglesias
---
hw/ssi/xilinx_spips.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/hw/ssi/xilinx_spips.c b/hw/
Add support for the Zynq Ultrascale MPSoc Generic QSPI.
Signed-off-by: Francisco Iglesias
---
default-configs/arm-softmmu.mak | 1 +
hw/ssi/xilinx_spips.c | 449 +++-
include/hw/ssi/xilinx_spips.h | 29 ++-
3 files changed, 429 insertions(+), 50
I believe I am onto the cause of this issue, because the input events
are coming from a multi threaded source (in my instance spice) keyboard
and mouse input share common code paths without any thread interlocking.
Since keyboard input takes priority over mouse, when more mouse events
are being ha
I've just tried to launch QNX 4.25 ISO bootdisk on qemu-system-x86_64 built
from current git.
QEMU screen is skewed (see on screenshot). I tried all different options in
-vga key - all the same.
** Attachment added: "qemu-qnx4.png"
https://bugs.launchpad.net/qemu/+bug/1191326/+attachment/499
This avoids that random UI frontend error messages end up in the output.
In particular, we were seeing this line in CI error logs:
+Unable to init server: Could not connect: Connection refused
Signed-off-by: Kevin Wolf
---
tests/qemu-iotests/182 | 2 +-
1 file changed, 1 insertion(+), 1 deletio
So we can use them in future tests
Signed-off-by: Juan Quintela
Reviewed-by: Dr. David Alan Gilbert
---
tests/migration-test.c | 101 +++--
1 file changed, 64 insertions(+), 37 deletions(-)
diff --git a/tests/migration-test.c b/tests/migration-test.c
After the previous commits, we make sure that the value passed is
right, or we just drop an error. So now we return if there is one
error or we have setup correctly the value passed.
Signed-off-by: Juan Quintela
Reviewed-by: Dr. David Alan Gilbert
--
Improve error messasge
Return 0 always for
6-tag' into
staging (2017-10-27 14:43:02 +0100)
are available in the git repository at:
git://github.com/juanquintela/qemu.git tags/migration/20171029
for you to fetch changes up to 56b4a42a2e0ae74cee629abcb82993e79deeb356:
tests: check that migration parameters are really assigned (2017
We fix global_test users left and right
Signed-off-by: Juan Quintela
Reviewed-by: Dr. David Alan Gilbert
---
tests/migration-test.c | 86 --
1 file changed, 48 insertions(+), 38 deletions(-)
diff --git a/tests/migration-test.c b/tests/migration-t
Now that we check that the value passed is a power of 2, we don't need
to play games when comparing what is the size that is going to take
the cache.
Signed-off-by: Juan Quintela
Reviewed-by: Dr. David Alan Gilbert
---
migration/ram.c | 11 ++-
1 file changed, 6 insertions(+), 5 deletio
Instead of passing silently round down the number of pages, make it an
error that the cache size is not a power of 2.
Signed-off-by: Juan Quintela
Reviewed-by: Dr. David Alan Gilbert
---
migration/page_cache.c | 12 +++-
1 file changed, 7 insertions(+), 5 deletions(-)
diff --git a/migr
Instead of repeating the code, we are going to bo more tests on this file
Signed-off-by: Juan Quintela
Reviewed-by: Dr. David Alan Gilbert
---
MAINTAINERS | 1 +
tests/Makefile.include | 6 +++---
tests/{postcopy-test.c => migration-test.c} |
Right now it is a variable in MigrationState instead of a
MigrationParameter. The change allows to set it as the rest of the
Migration parameters, from the command line, with
query_migration_paramters, set_migrate_parameters, etc.
Signed-off-by: Juan Quintela
Reviewed-by: Dr. David Alan Gilbert
Signed-off-by: Juan Quintela
Reviewed-by: Dr. David Alan Gilbert
---
tests/migration-test.c | 27 ---
1 file changed, 24 insertions(+), 3 deletions(-)
diff --git a/tests/migration-test.c b/tests/migration-test.c
index c429a13403..be598d3257 100644
--- a/tests/migration-t
As we have two guests running, just pass always who we want to send a
message to. Once there, refactor return_or_event() into wait_command.
Signed-off-by: Juan Quintela
Reviewed-by: Dr. David Alan Gilbert
---
tests/migration-test.c | 55 +-
1 fil
Alistair Francis wrote:
> Replace all occurs of __FUNCTION__ except for the check in checkpatch
> with the non GCC specific __func__.
>
> One line in hcd-musb.c was manually tweaked to pass checkpatch.
>
> Signed-off-by: Alistair Francis
> Cc: Gerd Hoffmann
> Cc: Andrzej Zaborowski
> Cc: Stefan
On Thu, Oct 26, 2017 at 09:52:17AM +0200, Juan Quintela wrote:
> Signed-off-by: Juan Quintela
> ---
> tests/migration-test.c | 27 ---
> 1 file changed, 24 insertions(+), 3 deletions(-)
>
> diff --git a/tests/migration-test.c b/tests/migration-test.c
> index c429a13403..b
On Thu, Oct 26, 2017 at 09:52:20AM +0200, Juan Quintela wrote:
> Once there, make postcopy test to use the new commands now that we
> have other test for deprecated ones
>
> Signed-off-by: Juan Quintela
> ---
> tests/migration-test.c | 48 ++--
> 1 fil
On Thu, Oct 26, 2017 at 09:52:18AM +0200, Juan Quintela wrote:
> Signed-off-by: Juan Quintela
I am not sure whether some numbers below are the best, but I believe
it should pass your smoke test at least, and I really want to have
some migration unit tests there in master sonner or later (even, I
On 29/10/17 18:57, Daniel P. Berrange wrote:
> On Sun, Oct 29, 2017 at 12:47:07PM +1100, Alexey Kardashevskiy wrote:
>> On 29/10/17 07:45, Daniel P. Berrange wrote:
>>> On Sat, Oct 28, 2017 at 12:53:50PM +1100, Alexey Kardashevskiy wrote:
On 28/10/17 00:14, Daniel P. Berrange wrote:
> Some
W dniu 29.10.2017 o 11:13, Francisco Iglesias pisze:
Add support for continuous read out of the RDSR and READ_FSR status
registers until the chip select is deasserted. This feature is supported
by amongst others 1 or more flashtypes manufactured by Numonyx (Micron),
Windbond, SST, Gigadevice, E
W dniu 29.10.2017 o 11:13, Francisco Iglesias pisze:
Add support for SST READ ID 0x90/0xAB commands for reading out the flash
manufacuter ID and device ID.
Signed-off-by: Francisco Iglesias
Acked-by: Alistair Francis
---
hw/block/m25p80.c | 23 +++
1 file changed, 23 i
On Mon, Oct 30, 2017 at 01:08:56AM +1100, Alexey Kardashevskiy wrote:
>
> I run ./scripts/git-submodule.sh on a server (where source directory is
> writeable), them "rm .git-submodule-status", then run "Makefile" on a build
> machine (which has the source directory mounted as read-only). I basical
Older pseries machines, before 2.11, do not have a bitmap acting as a
IRQ number allocator but use the ICSIRQState array for this purpose.
This difference between machine versions needs to be taken into
account when loading the state.
To keep in sync the bitmap with the ICSIRQState array flags, we
Currently, the ICSState 'ics' object of the sPAPR machine acts as the
global interrupt source handler and also as the IRQ number allocator
for the machine. Some IRQ numbers are allocated very early in the
machine initialization sequence to populate the device tree, and this
is a problem to introduc
Hello,
Currently, the ICSState 'ics' object of the sPAPR machine acts as the
global interrupt source handler and also as the IRQ number allocator
for the machine. Some IRQ numbers are allocated very early in the
machine initialization sequence to populate the device tree, and this
is a problem to
So we can now use bitmap_clear() which is slightly more efficent but
more important, it removes the usage of ics_valid_irq() which has a
reference to the 'ics' object of the machine.
Signed-off-by: Cédric Le Goater
---
hw/intc/trace-events | 2 --
hw/intc/xics_spapr.c | 19 ++-
On PowerNV, there is no need for a bitmap for the moment. The only
interrupts handled are the ones from the PSI controller.
Signed-off-by: Cédric Le Goater
---
hw/ppc/pnv.c | 18 ++
1 file changed, 18 insertions(+)
diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c
index c35c439d816b..828
The nature of an interrupt, MSI or LSI, is stored under the flag
attribute of the ICSIRQState array. To reduce the use of this array
and consequently of the ICSState object (needed to introduce for the
new XIVE model), we choose to split the IRQ number space of the
machine in two: first the LSIs an
Setting the XICS_FLAGS_IRQ_LSI (or XICS_FLAGS_IRQ_MSI) for pre-2.11
pseries machines can now be done directly under the irq_alloc_block()
operation. let's remove ics_set_irq_type() which becomes useless.
The PowerNV machine is a bit special because it does not manage its
own IRQ number allocator y
Now that we can distinguish an LSI interrupt from an MSI using the IRQ
number, let's introduce a new XICSFabric operation for this purpose
and remove the use of XICS_FLAGS_IRQ_LSI flag.
The 'irq' parameter continues to refer to the global IRQ number space.
For compatibility with older machines, w
The routines manipulating the IRQ numbers for the sPAPR machine do not
have any relation with the ICSState anymore. So use a sPAPRMachineState
parameter in their prototype and prefix them with spapr_irq_.
Signed-off-by: Cédric Le Goater
---
hw/intc/xics_spapr.c | 23 ---
hw/
Public bug reported:
I try to run an emulation with qemu-system-arm under a cpu cortex-m3 but
any execution under the processor result by a segmentation fault.
My command is : qemu-system-arm -m 256 -M versatilepb -cpu cortex-m3
-kernel ~/qemu/wheezy/vmlinuz-3.2.0-4-versatile -initrd
~/qemu/wheez
On 29 October 2017 at 19:24, Kevin <1728...@bugs.launchpad.net> wrote:
> I try to run an emulation with qemu-system-arm under a cpu cortex-m3 but
> any execution under the processor result by a segmentation fault.
>
> My command is : qemu-system-arm -m 256 -M versatilepb -cpu cortex-m3
> -kernel ~/
On 29 October 2017 at 16:21, mar.krzeminski
wrote:
>
>
> W dniu 29.10.2017 o 11:13, Francisco Iglesias pisze:
>
> Add support for SST READ ID 0x90/0xAB commands for reading out the flash
>> manufacuter ID and device ID.
>>
>> Signed-off-by: Francisco Iglesias
>> Acked-by: Alistair Francis
>> --
Add CPUID 0x801E for describing AMD Processor Topology Information
Disables warning about smt for 17h family of AMD CPUs
Signed-off-by: Stanislav Lanci
---
target/i386/cpu.c | 18 +-
1 file changed, 17 insertions(+), 1 deletion(-)
diff --git a/target/i386/cpu.c b/target/i386
Hello Fred,
thanks much for review and remarks.
On Friday 27 of October 2017 16:18:31 KONRAD Frederic wrote:
> Hi Pavel,
>
> On 10/25/2017 01:12 AM, p...@cmp.felk.cvut.cz wrote:
> > From: Pavel Pisa
> >
> > The work is based on Jin Yang GSoC 2013 work funded
> > by Google and mentored in frame o
On 30/10/17 03:29, Daniel P. Berrange wrote:
> On Mon, Oct 30, 2017 at 01:08:56AM +1100, Alexey Kardashevskiy wrote:
>>
>> I run ./scripts/git-submodule.sh on a server (where source directory is
>> writeable), them "rm .git-submodule-status", then run "Makefile" on a build
>> machine (which has the
> On Oct 29, 2017, at 6:21 AM, Dr. David Alan Gilbert
> wrote:
>
> * Eric Blake (ebl...@redhat.com) wrote:
>> On 10/28/2017 06:44 AM, Programmingkid wrote:
>>> I'm trying to use an image file that has spaces in its file name (and
>>> sometimes in the path) to be used as a USB flash drive. When
missing since 44eff67341:
LINKx86_64-softmmu/qemu-system-x86_64
exec.o: In function `tlb_reset_dirty_range_all':
exec.c:1070: undefined reference to `tlb_reset_dirty'
exec.o: In function `tcg_commit':
exec.c:2704: undefined reference to `cpu_reloading_memory_map'
cpus.o: In funct
missing since 55c3ceef61:
LINKs390x-softmmu/qemu-system-s390x
target/s390x/cpu.o: In function `s390_cpu_class_init':
target/s390x/cpu.c:500: undefined reference to `s390x_translate_init'
Suggested-by: Eduardo Habkost
Signed-off-by: Philippe Mathieu-Daudé
---
target/s390x/tcg-stub.c
Hi,
This series add missing stubs (as suggested by Eduardo in [1]) to build
the i386/s390x targets with --disable-tcg (the only targets building without
TCG so far).
For git workflow ease, I split by offending commit (so one can branch from
this particular commit and cherry-pick the corresponding
missing since e8feb96fcc:
LINKx86_64-softmmu/qemu-system-x86_64
cpus.o: In function `qemu_tcg_init_vcpu':
cpus.c:1677: undefined reference to `tcg_region_init'
Suggested-by: Eduardo Habkost
Signed-off-by: Philippe Mathieu-Daudé
---
accel/stubs/tcg-stub.c | 4
1 file changed, 4
missing since 55c3ceef61:
LINKx86_64-softmmu/qemu-system-x86_64
target/i386/cpu.o: In function `x86_cpu_common_class_init':
target/i386/cpu.c:4215: undefined reference to `tcg_x86_init'
Suggested-by: Eduardo Habkost
Signed-off-by: Philippe Mathieu-Daudé
---
target/i386/tcg-stub.c
missing since 3468b59e18:
LINKx86_64-softmmu/qemu-system-x86_64
cpus.o: In function `qemu_tcg_rr_cpu_thread_fn':
cpus.c:1310: undefined reference to `tcg_register_thread'
cpus.o: In function `qemu_tcg_cpu_thread_fn':
cpus.c:1458: undefined reference to `tcg_register_thread'
Sugges
Hi Peter,
On 10/27/2017 04:03 AM, Peter Maydell wrote:
> On 26 October 2017 at 14:58, Richard Henderson
> wrote:
>> Fix the build for --disable-tcg.
>>
>> Fixes: 55c3ceef61fcf06fc98ddc752b7cce788ce7680b
>> Signed-off-by: Richard Henderson
>> ---
>
> Applied to master as a buildfix, thanks.
I c
From: Alistair Francis
Specify the number of CPUs that can run on ZynqMP.
Signed-off-by: Alistair Francis
Reviewed-by: Philippe Mathieu-Daudé
Tested-by: Philippe Mathieu-Daudé
---
V3:
- Fix my ASCII noncompliant last name in Reviewed-by tag :(
- added Tested-by for what it's worth
V2:
-
examples configuring with '--enable-kvm --disable-tcg'
- before
$ qemu-system-x86_64 -accel help
Possible accelerators: kvm, xen, hax, tcg
$ qemu-system-x86_64 -accel tcg
qemu-system-x86_64: -machine accel=tcg: No accelerator found
# qemu-system-x86_64 -accel hax
qemu-system-x86_64:
>>> Fix the build for --disable-tcg.
>>>
>>> Fixes: 55c3ceef61fcf06fc98ddc752b7cce788ce7680b
>>> Signed-off-by: Richard Henderson
>>> ---
>>
>> Applied to master as a buildfix, thanks.
>
> I couldn't see this buildfix merged in /master so I provided another
> version using stubs and details about
Hi,
This series seems to have some coding style problems. See output below for
more information:
Subject: [Qemu-devel] [PATCH] AMD Processor Topology Information
Type: series
Message-id: 20171029212224.2777-1-p...@polepetko.eu
=== TEST SCRIPT BEGIN ===
#!/bin/bash
BASE=base
n=1
total=$(git log
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