On 04.09.2017 08:53, Laurent Vivier wrote:
> On 29/08/2017 20:13, Thomas Huth wrote:
>> Broken with commit b4ba67d9a7025 ("libqos: Change PCI accessors to take
>> opaque BAR handle") a while ago, but nobody noticed since the tests are
>> only run in SPEED=slow mode: The msix_pba_bar is not correctl
** Changed in: qemu
Importance: Undecided => Wishlist
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https://bugs.launchpad.net/bugs/1714538
Title:
Support for Raspberry Pi 3 Model B
Status in QEMU:
New
Bug description:
T
On Fri, 1 Sep 2017 13:11:18 -0300
Eduardo Habkost wrote:
> On Fri, Sep 01, 2017 at 12:45:42PM -0300, Thadeu Lima de Souza Cascardo wrote:
> > Linux uses SRAT to determine the maximum memory in a system, which is
> > used to determine whether to use the swiotlb for IOMMU or not for a
> > device th
On Sun, 09/03 18:37, Kamil Rytarowski wrote:
> SunOS defines SEC in as 1 (commonly used time symbols).
>
> This fixes build on SmartOS (Joyent).
>
> Patch cherry-picked from pkgsrc by jperkin (Joyent).
>
> Signed-off-by: Kamil Rytarowski
Cc Jason Wang (net maintainer).
Fam
Since fchmodat(2) on Linux doesn't support AT_SYMLINK_NOFOLLOW, we have to
implement it using workarounds. There are two different ways, depending on
whether the system supports O_PATH or not.
In the case O_PATH is supported, we rely on the behavhior of openat(2)
when passing O_NOFOLLOW | O_PATH a
Reviewed-by: Dmitry Fleytman
> On 4 Sep 2017, at 10:23 AM, Fam Zheng wrote:
>
> On Sun, 09/03 18:37, Kamil Rytarowski wrote:
>> SunOS defines SEC in as 1 (commonly used time symbols).
>>
>> This fixes build on SmartOS (Joyent).
>>
>> Patch cherry-picked from pkgsrc by jperkin (Joyent).
>>
>
On Fri, 1 Sep 2017 14:00:37 -0700
Alistair Francis wrote:
> Connect the MicroBlaze CPU and the ROM and RAM memory regions.
>
> Signed-off-by: Alistair Francis
> ---
>
> hw/microblaze/xlnx-zynqmp-pmu.c | 65
> +++--
> 1 file changed, 63 insertions(+), 2 del
---Steps to Reproduce---
When passed a negative number to 'maxcpus' parameter, Qemu aborts
with a core dump.
Run the following command with maxcpus argument as negative number
ppc64-softmmu/qemu-system-ppc64 --nographic -vga none -machine
pseries,accel=kvm,kvm-type=HV -m size=200g -device virtio
On 08/30/2017 10:40 PM, Philippe Mathieu-Daudé wrote:
Hi Seeteena,
On 08/29/2017 02:45 AM, Seeteena Thoufeek wrote:
---Steps to Reproduce---
When passed a negative number to 'maxcpus' parameter, Qemu aborts
with a core dump.
Run the following command with maxcpus argument as negative number
We internally convert -virtfs to -fsdev/-device. If the user doesn't
provide the path or security_model suboptions, and the fsdev backend
requires them, we hit an assertion when populating the internal -fsdev
option:
util/qemu-option.c:547: opt_set: Assertion `opt->str' failed.
Aborted (core dumpe
Hi,
This series failed build test on FreeBSD host. Please find the details below.
Type: series
Message-id: 20170903163130.14288-1-...@gmx.com
Subject: [Qemu-devel] [PATCH] target/m68k: Change fpu_rom from const static
array to switch
=== TEST SCRIPT BEGIN ===
#!/bin/sh
# Testing script will be
Hi,
This series failed build test on FreeBSD host. Please find the details below.
Type: series
Message-id: 20170903163615.15562-1-...@gmx.com
Subject: [Qemu-devel] [PATCH] scsi/esp: Rename the ESP symbol to QESP (QEMU ESP)
=== TEST SCRIPT BEGIN ===
#!/bin/sh
# Testing script will be invoked unde
Hi,
This series failed build test on FreeBSD host. Please find the details below.
Type: series
Message-id: 20170903163304.17919-1-...@gmx.com
Subject: [Qemu-devel] [PATCH] memory: Rename queue to mrqueue (memory region
queue)
=== TEST SCRIPT BEGIN ===
#!/bin/sh
# Testing script will be invoked
Hi
- Original Message -
> Marc-André Lureau writes:
>
> > Signed-off-by: Marc-André Lureau
> > ---
> > scripts/qapi2texi.py | 7 +++
> > 1 file changed, 3 insertions(+), 4 deletions(-)
> >
> > diff --git a/scripts/qapi2texi.py b/scripts/qapi2texi.py
> > index a317526e51..8b542f9fff
On Mon, 09/04 01:04, no-re...@patchew.org wrote:
> strip
> "/var/tmp/patchew-tester-tmp-mnp7uu7s/src/install/bin/qemu-system-x86_64"
> strip: elf_update() failed: I/O error: No space left on device
Small swapfs (/tmp), fixing /etc/fstab in the VM.
Fam
On Mon, 28 Aug 2017 09:35:45 +0200
"Michael Fritscher" wrote:
> Good day,
>
Hi!
> only a short announcement: Sorry for the very long delay :-( But I'm
> working on this again. The biggest issue seems to be the *at stuff. I'll
> try to workaround this via getting the directories' path from the
On 1 September 2017 at 16:02, Eduardo Habkost wrote:
> The following changes since commit 223cd0e13f2e46078d7b573f0b8402bfbee339be:
>
> Merge remote-tracking branch 'remotes/elmarco/tags/tidy-pull-request' into
> staging (2017-08-31 15:52:43 +0100)
>
> are available in the git repository at:
>
On 4 September 2017 at 01:27, Ramy Sameh wrote:
> *My 2 questions are:*
>
> *First:*
> Are interrupts activated in the emulated pl011 ?
> I mean, if I enabled the interrupt bits for UARTTXINTR, will this trigger
> an interrupt when the FIFO reaches a certain level?
Yes, we implement interrupts.
tests/.gitignore is often out of date. Let's generate it based on the
files and directories to clean.
Note: I didn't succeed yet at generalizing this approach for the rest
of qemu .gitignore files, but I hope it may eventually happen.
Signed-off-by: Marc-André Lureau
---
Makefile
On Mon, Aug 28, 2017 at 3:57 PM, Manos Pitsidianakis
wrote:
The following links contain an email address which may be mangled to
"address@hidden" by mailing list web archives (to prevent spam).
Manos' "Work Product" link for GSoC leads to a page where these links
are broken. Here are alternative
>>> On 01.09.17 at 20:20, wrote:
> On Fri, Sep 01, 2017 at 10:25:42AM -0600, Jan Beulich wrote:
>> Xen and qemu having identical #define-s (with different names) is a
>> strong hint that these should have been part of the public interface
>> from the very start. Use them if they're available, fall
On Fri, Sep 01, 2017 at 11:54:34AM +0100, Daniel P. Berrange wrote:
> The 194 test has alot of code that assumes a simple image file. Rewriting
> this to work with luks is possible, but non-trivial, so blacklist the
> luks format for now.
>
> Signed-off-by: Daniel P. Berrange
> ---
> tests/qemu-
On Fri, Sep 01, 2017 at 03:52:03PM +, Derrick McKee wrote:
> I am having trouble using the simpleparser.py script in QEMU. Hopefully, I
> am doing something incorrect and you can quickly set me back on course.
>
> I have generated a trace file as per the instructions in
> docs/devel/tracing.t
On Mon, Sep 04, 2017 at 03:04:41AM -0600, Jan Beulich wrote:
> >>> On 01.09.17 at 20:20, wrote:
> > On Fri, Sep 01, 2017 at 10:25:42AM -0600, Jan Beulich wrote:
> >> Xen and qemu having identical #define-s (with different names) is a
> >> strong hint that these should have been part of the public
On 3 September 2017 at 17:49, Kamil Rytarowski wrote:
> This fixes build on SmartOS (Joyent).
>
> Patch cherry-picked from pkgsrc by jperkin (Joyent).
>
> Signed-off-by: Kamil Rytarowski
> ---
> tests/Makefile.include | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/tests/Makefile.incl
On Mon, Sep 04, 2017 at 02:17:39PM +0800, Sam wrote:
> Hi all,
>
> I'm using python socket to connect VM's monitor socket like this:
>
> [root@yf-mos-test-net09 tests]# python
> > Python 2.7.5 (default, Jun 24 2015, 00:41:19)
> > [GCC 4.8.3 20140911 (Red Hat 4.8.3-9)] on linux2
> > Type "help", "
On Thu, 31 Aug 2017 20:04:26 +0800
Dou Liyang wrote:
> From: Eduardo Habkost
>
> Currently, Using the fisrt node without memory on the machine makes
> QEMU unhappy. With this example command line:
> ... \
> -m 1024M,slots=4,maxmem=32G \
> -numa node,nodeid=0 \
> -numa node,mem=1024M,nod
>>> On 04.09.17 at 11:23, wrote:
> On Mon, Sep 04, 2017 at 03:04:41AM -0600, Jan Beulich wrote:
>> >>> On 01.09.17 at 20:20, wrote:
>> > On Fri, Sep 01, 2017 at 10:25:42AM -0600, Jan Beulich wrote:
>> >> Xen and qemu having identical #define-s (with different names) is a
>> >> strong hint that th
On 31/08/2017 9:54, Mark Cave-Ayland wrote:
On 16/07/17 21:27, Mark Cave-Ayland wrote:
For some machines it is impossible to plug devices into a particular PCI bus
slot, e.g. for a real Ultra 5 there are 2 PCI bridges attached to the root
bus behind which all devices must be plugged. Ignoring t
On Thu, Aug 31, 2017 at 11:47:59AM -0400, Jeff Cody wrote:
> On Thu, Aug 31, 2017 at 04:39:49PM +0100, Stefan Hajnoczi wrote:
> > On Wed, Aug 30, 2017 at 06:40:29PM -0400, John Snow wrote:
> > >
> > >
> > > On 08/30/2017 06:35 PM, Eric Blake wrote:
> > > > On 08/30/2017 05:28 PM, John Snow wrote:
On 31/08/2017 0:55, Philippe Mathieu-Daudé wrote:
Signed-off-by: Philippe Mathieu-Daudé
---
MAINTAINERS | 2 ++
1 file changed, 2 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index dd5e2c2b6b..bbe1191883 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -928,6 +928,8 @@ F: include/hw/pci
在 2017/7/17 上午4:27, Mark Cave-Ayland 写道:
Also touch up the logic in do_pci_register_device() accordingly.
Signed-off-by: Mark Cave-Ayland
---
hw/pci/pci.c | 10 --
1 file changed, 8 insertions(+), 2 deletions(-)
diff --git a/hw/pci/pci.c b/hw/pci/pci.c
index 0c6f74a..efc9c86 100
On 1 September 2017 at 16:37, Markus Armbruster wrote:
> The following changes since commit 223cd0e13f2e46078d7b573f0b8402bfbee339be:
>
> Merge remote-tracking branch 'remotes/elmarco/tags/tidy-pull-request' into
> staging (2017-08-31 15:52:43 +0100)
>
> are available in the git repository at:
Actually I use qga socket first(send json format command like {'execute':
'chardev-add', 'arguments': {'id': id, 'type': type}, 'params': params} by
qga socket, which is
/opt/cloud/workspace/servers/1925a92d-f003-4d77-871c-bce8f85229aa/qga.sock,
using the same script as first mail), but it response
On Mon, Sep 04, 2017 at 06:11:44PM +0800, Sam wrote:
> Actually I use qga socket first(send json format command like {'execute':
> 'chardev-add', 'arguments': {'id': id, 'type': type}, 'params': params} by
> qga socket, which is
> /opt/cloud/workspace/servers/1925a92d-f003-4d77-871c-bce8f85229aa/qg
At 09/04/2017 05:39 PM, Igor Mammedov wrote:
On Thu, 31 Aug 2017 20:04:26 +0800
Dou Liyang wrote:
From: Eduardo Habkost
Currently, Using the fisrt node without memory on the machine makes
QEMU unhappy. With this example command line:
... \
-m 1024M,slots=4,maxmem=32G \
-numa node,nod
After calling qcow2_inactivate(), all qcow2 caches must be flushed, but this
may not happen, because the last call qcow2_store_persistent_dirty_bitmaps()
can lead to marking l2/refcont cache as dirty.
Let's move qcow2_store_persistent_dirty_bitmaps() before the caсhe flushing
to fix it.
Signed-of
On Thu, 31 Aug 2017 16:38:46 +1000
Sam Bobroff wrote:
> Move the calculation of a CPU's VCPU ID out of the generic PPC code
> (ppc_cpu_realizefn()) and into sPAPR specific code
> (spapr_cpu_core_realize()) where it belongs.
>
> Unfortunately, due to the way things are ordered, we still need to
>
On 04.09.2017 11:03, Marc-André Lureau wrote:
> tests/.gitignore is often out of date. Let's generate it based on the
> files and directories to clean.
>
> Note: I didn't succeed yet at generalizing this approach for the rest
> of qemu .gitignore files, but I hope it may eventually happen.
>
> Si
On 25 August 2017 at 23:48, Richard Henderson
wrote:
> For "ldp x0, x1, [x0]", if the second load is on a second page and
> the second page is unmapped, the exception would be raised with x0
> already modified. This means the instruction couldn't be restarted.
>
> Cc: qemu-...@nongnu.org
> Cc: qe
On 31 August 2017 at 17:56, Pranith Kumar wrote:
> CC'ing stable for 2.10.
Thanks; applied to target-arm.next (with a tweaked commit message).
-- PMM
On Mon, 4 Sep 2017 18:16:31 +0800
Dou Liyang wrote:
> At 09/04/2017 05:39 PM, Igor Mammedov wrote:
> > On Thu, 31 Aug 2017 20:04:26 +0800
> > Dou Liyang wrote:
> >
> >> From: Eduardo Habkost
> >>
> >> Currently, Using the fisrt node without memory on the machine makes
> >> QEMU unhappy. With
The test 192 ("Test NBD export with '-incoming' (non-shared
storage migration use case from libvirt")) is currently using HMP.
Replace the HMP usage with QMP, as the upstream preference seems to be:
"Use QMP where possible, unless you're explicitly testing something
related to HMP".
While at it, c
A command is a query if it has no side effect and yields a result.
Such commands are typically named query-FOO, but there are exceptions.
The basic idea is to find candidates with query-qmp-schema, filter out
the ones that aren't queries with an explicit blacklist, and test the
remaining ones agai
Note: omitting actual patches except for PATCH 02/47, because only
that one changed since v2.
The following changes since commit 223cd0e13f2e46078d7b573f0b8402bfbee339be:
Merge remote-tracking branch 'remotes/elmarco/tags/tidy-pull-request' into
staging (2017-08-31 15:52:43 +0100)
are availab
On 8/30/2017 11:38 AM, Alberto Garcia wrote:
On Tue 29 Aug 2017 04:23:06 PM CEST, Pradeep Jagadeesh wrote:
+static void print_fsdev_throttle_config(Monitor *mon, IOThrottle *fscfg,
+ Error *err)
+{
+monitor_printf(mon, "%s", fscfg->id);
+monitor_pri
I don't think it would be wise to downgrade u-boot. You can always just
skip unpacking the u-boot sources -- we don't actually build them, we
just ship them for license compliance reasons.
--
You received this bug notification because you are a member of qemu-
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emote-tracking branch
'remotes/ehabkost/tags/x86-and-machine-pull-request' into staging (2017-09-01
17:28:54 +0100)
are available in the git repository at:
git://git.linaro.org/people/pmaydell/qemu-arm.git
tags/pull-target-arm-20170904
for you to fetc
When we switched our handling of exception exit to detect
the magic addresses at translate time rather than via
a do_unassigned_access hook, we forgot to update a
comment; correct the omission.
Signed-off-by: Peter Maydell
Reviewed-by: Edgar E. Iglesias
Reviewed-by: Richard Henderson
Message-id
Remove an out of date comment which says there's only one
item in the NVIC container region -- we put systick into its
own device object a while back and so now there are two
things in the container.
Signed-off-by: Peter Maydell
Reviewed-by: Edgar E. Iglesias
Reviewed-by: Richard Henderson
Mess
Tighten up the T32 decoder in the places where new v8M instructions
will be:
* TT/TTT/TTA/TTAT are in what was nominally LDREX/STREX r15, ...
which is UNPREDICTABLE:
make the UNPREDICTABLE behaviour be to UNDEF
* BXNS/BLXNS are distinguished from BX/BLX via the low 3 bits,
which in previ
Make the arm_cpu_dump_state() debug logging handle the M-profile XPSR
rather than assuming it's an A-profile CPSR. On M profile the PSR
line of a register dump will now look like this:
XPSR=4100 -Z-- T priv-thread
Signed-off-by: Peter Maydell
Reviewed-by: Edgar E. Iglesias
Reviewed-by: Ric
The M profile XPSR is almost the same format as the A profile CPSR,
but not quite. Define some XPSR_* macros and use them where we
definitely dealing with an XPSR rather than reusing the CPSR ones.
Signed-off-by: Peter Maydell
Reviewed-by: Edgar E. Iglesias
Reviewed-by: Richard Henderson
Messag
Currently get_phys_addr() has PMSAv7 handling before the
"is translation disabled?" check, and then PMSAv5 after it.
Tidy this up by making the PMSAv5 code handle the "MPU disabled"
case itself, so that we have all the PMSA code in one place.
This will make adding the PMSAv8 code slightly cleaner,
Remove the comment that claims that some MPU_CTRL bits are stored
in sctlr_el[1]. This has never been true since MPU_CTRL was added
in commit 29c483a50607 -- the comment is a leftover from
Michael Davidsaver's original implementation, which I modified
not to use sctlr_el[1]; I forgot to delete the
We currently store the M profile CPU register state PRIMASK and
FAULTMASK in the daif field of the CPU state in its I and F
bits. This is a legacy from the original implementation, which
tried to share the cpu_exec_interrupt code between A profile
and M profile. We've since separated out the two ca
Move the code in arm_v7m_cpu_do_interrupt() that calculates the
magic LR value down to when we're actually going to use it.
Having the calculation and use so far apart makes the code
a little harder to understand than it needs to be.
Signed-off-by: Peter Maydell
Reviewed-by: Philippe Mathieu-Daud
M profile cores can never trap on WFI or WFE instructions. Check for
M profile in check_wfx_trap() to ensure this.
The existing code will do the right thing for v7M cores because
the hcr_el2 and scr_el3 registers will be all-zeroes and so we
won't attempt to trap, but when we start setting ARM_FEA
In the ARM get_phys_addr() code, switch to using the MMUAccessType
enum and its MMU_* values rather than int and literal 0/1/2.
Signed-off-by: Peter Maydell
Reviewed-by: Edgar E. Iglesias
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
Message-id: 1501692241-23310-2-git-send
Add a utility function for testing whether the CPU is in Handler
mode; this is just a check whether v7m.exception is non-zero, but
we do it in several places and it makes the code a bit easier
to read to not have to mentally figure out what the test is testing.
Signed-off-by: Peter Maydell
Review
The armv7m_nvic.h header file was accidentally placed in
include/hw/arm; move it to include/hw/intc to match where
its corresponding .c file lives.
Signed-off-by: Peter Maydell
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Edgar E. Iglesias
Reviewed-by: Richard Henderson
Message-id: 1501692
The ARMv7M architecture specifies that most of the addresses in the
PPB region (which includes the NVIC, systick and system registers)
are not accessible to unprivileged accesses, which should
BusFault with a few exceptions:
* the STIR is configurably user-accessible
* the ITM (which we don't imp
For M profile the XPSR is a similar but not identical format to the
A profile CPSR/SPSR. (For instance the Thumb bit is in a different
place.) For guest accesses we make the M profile code go through
xpsr_read() and xpsr_write() which handle the different layout.
However for migration we use cpsr_r
For embedded systems, notably ARM, one common use of ELF
file segments is that the 'physical addresses' represent load addresses
and the 'virtual addresses' execution addresses, such that
the load addresses are packed into ROM or flash, and the
relocation and zero-initialization of data is done at
From: Philippe Mathieu-Daudé
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Peter Maydell
Signed-off-by: Peter Maydell
---
hw/arm/armv7m.c | 4 ++--
hw/arm/exynos4210.c | 4 ++--
hw/arm/highbank.c| 11 +++
hw/arm/realview.c| 6 --
hw/arm/vexpress.c| 6 +++
From: Andrew Jones
If a KVM PMU init or set-irq attr call fails we just silently stop
the PMU DT node generation. The only way they could fail, though,
is if the attr's respective KVM has-attr call fails. But that should
never happen if KVM advertises the PMU capability, because both
attrs have b
Some ELF files have program headers that specify segments that
are of zero size. Ignore them, rather than trying to create
zero-length ROM blobs for them, because the zero-length blob
can falsely trigger the overlapping-ROM-blobs check.
Signed-off-by: Peter Maydell
Reviewed-by: Philippe Mathieu-D
From: Andrew Jones
Mimicking gicv3-maintenance-interrupt, add the PMU's interrupt to
CPU state.
Signed-off-by: Andrew Jones
Reviewed-by: Peter Maydell
Message-id: 1500471597-2517-2-git-send-email-drjo...@redhat.com
Signed-off-by: Peter Maydell
---
target/arm/cpu.h | 2 ++
hw/arm/virt.c|
From: Andrew Jones
Move the in-kernel-irqchip test to only guard the set-irq
stage, not the init stage of the PMU. Also add the PMU to
the KVM device irq line synchronization to enable its use.
Signed-off-by: Andrew Jones
Reviewed-by: Christoffer Dall
Message-id: 1500471597-2517-4-git-send-em
From: Andrew Jeffery
The reset width register controls how the pulse on the SoC's WDTRST{1,2}
pins behaves. A pulse is emitted if the external reset bit is set in
WDT_CTRL. On the AST2500 WDT_RESET_WIDTH can consume magic bit patterns
to configure push-pull/open-drain and active-high/active-low
b
Call the new cpu_transaction_failed() hook at the places where
CPU generated code interacts with the memory system:
io_readx()
io_writex()
get_page_addr_code()
Any access from C code (eg via cpu_physical_memory_rw(),
address_space_rw(), ld/st_*_phys()) will *not* trigger CPU exceptions
via cpu_
From: Andrew Jones
When adding a PMU with a userspace irqchip we skip the set-irq
stage of device creation. Split the 'create' function into two
functions 'init' and 'set-irq' so they may be called separately.
Signed-off-by: Andrew Jones
Reviewed-by: Christoffer Dall
Message-id: 1500471597-251
From: Andrew Jeffery
This is required to configure differences in behaviour between the
AST2400 and AST2500 watchdog IPs.
Signed-off-by: Andrew Jeffery
Reviewed-by: Cédric Le Goater
Reviewed-by: Peter Maydell
Signed-off-by: Peter Maydell
---
hw/arm/aspeed_soc.c | 2 ++
1 file changed, 2 ins
Move the MemTxResult type to memattrs.h. We're going to want to
use it in cpu/qom.h, which doesn't want to include all of
memory.h. In practice MemTxResult and MemTxAttrs are pretty
closely linked since both are used for the new-style
read_with_attrs and write_with_attrs callbacks, so memattrs.h
is
Implement the new do_transaction_failed hook for ARM, which should
cause the CPU to take a prefetch abort or data abort.
Signed-off-by: Peter Maydell
Reviewed-by: Richard Henderson
Reviewed-by: Edgar E. Iglesias
---
target/arm/internals.h | 10 ++
target/arm/cpu.c | 1 +
target/
We currently have some similar code in tlb_fill() and in
arm_cpu_do_unaligned_access() for delivering a data abort or prefetch
abort. We're also going to want to do the same thing to handle
external aborts. Factor out the common code into a new function
deliver_fault().
Signed-off-by: Peter Mayd
Currently we have a rather half-baked setup for allowing CPUs to
generate exceptions on accesses to invalid memory: the CPU has a
cpu_unassigned_access() hook which the memory system calls in
unassigned_mem_write() and unassigned_mem_read() if the current_cpu
pointer is non-NULL. This was original
Define a new MachineClass field ignore_memory_transaction_failures.
If this is flag is true then the CPU will ignore memory transaction
failures which should cause the CPU to take an exception due to an
access to an unassigned physical address; the transaction will
instead return zero (for a read)
From: Pranith Kumar
Fix the following warning:
/home/pranith/qemu/hw/intc/arm_gicv3_kvm.c:296:17: warning: logical not is only
applied to the left hand side of this bitwise operator
[-Wlogical-not-parentheses]
if (!c->gicr_ctlr & GICR_CTLR_ENABLE_LPIS) {
^
Set the MachineClass flag ignore_memory_transaction_failures
for almost all ARM boards. This means they retain the legacy
behaviour that accesses to unimplemented addresses will RAZ/WI
rather than aborting, when a subsequent commit adds support
for external aborts.
The exceptions are:
* virt -- w
From: Thomas Huth
QEMU currently shows some unexpected behavior when the user trys to
do a "device_add digic" on an unrelated ARM machine like integratorcp
in "-nographic" mode (the device_add command does not immediately
return to the monitor prompt), and trying to "device_del" the device
later
For external aborts, we will want to be able to specify the EA
(external abort type) bit in the syndrome field. Allow callers of
deliver_fault() to do that by adding a field to ARMMMUFaultInfo which
we use when constructing the syndrome values.
Signed-off-by: Peter Maydell
Reviewed-by: Richard H
Hmm I'll try some magic tar invocations.
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https://bugs.launchpad.net/bugs/1714750
Title:
2.10.0 cannot be installed on case-insensitive file system
Status in QEMU:
New
Bug descript
From: Thomas Huth
QEMU currently aborts if the user is accidentially trying to
do something like this:
$ aarch64-softmmu/qemu-system-aarch64 -S -M integratorcp -nographic
QEMU 2.9.93 monitor - type 'help' for more information
(qemu) device_add ast2400
Unexpected error in error_set_from_qdev_prop
Thank you, but I have to ask last question. My qemu is 2.6.0, and there is
no -qmp option :
[root@yf-mos-test-net09 ~]# ps aux | grep qemu
> root 5714 0.0 0.0 1669388 77736 ? Sl Sep01 0:09
> /usr/local/bin/qemu-system-x86_64_2.6.0 -enable-kvm -cpu
> qemu64,+vmx,+ssse3,+sse4.1,+sse
On Wed, Aug 30, 2017 at 04:26:10PM +0200, Igor Mammedov wrote:
> only TODO escaped defines were meant to be removed,
> but not TODO_USER_ONLY which are compiled in case of
> *-user targets.
>
> So retirn back "440" model removed by mistake
>
> Spotted-by: Thomas Huth
> Signed-off-by: Igor Mammed
From: Richard Henderson
For "ldp x0, x1, [x0]", if the second load is on a second page and
the second page is unmapped, the exception would be raised with x0
already modified. This means the instruction couldn't be restarted.
Cc: qemu-...@nongnu.org
Cc: qemu-sta...@nongnu.org
Reported-by: Andre
There are two docs:
https://wiki.qemu.org/index.php/Documentation/QMP
https://en.wikibooks.org/wiki/QEMU/Monitor
I don't know which one is right...?
2017-09-04 20:31 GMT+08:00 Sam :
> Thank you, but I have to ask last question. My qemu is 2.6.0, and there is
> no -qmp option :
>
> [root@yf-mos
>we don't actually build them, we just ship them for license compliance
reasons.
Would you be in compliance with the license if the u-boot sources were
themselves in a tarball inside your qemu tarball?
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Hi Kashyap,
On Mon, 09/04 13:16, Kashyap Chamarthy wrote:
> The test 192 ("Test NBD export with '-incoming' (non-shared
> storage migration use case from libvirt")) is currently using HMP.
> Replace the HMP usage with QMP, as the upstream preference seems to be:
> "Use QMP where possible, unless y
On Mon, Sep 04, 2017 at 12:18:57PM +0200, Greg Kurz wrote:
> On Thu, 31 Aug 2017 16:38:46 +1000
> Sam Bobroff wrote:
>
> > Move the calculation of a CPU's VCPU ID out of the generic PPC code
> > (ppc_cpu_realizefn()) and into sPAPR specific code
> > (spapr_cpu_core_realize()) where it belongs.
>
On Mon, 4 Sep 2017 21:10:54 +1000
David Gibson wrote:
> On Wed, Aug 30, 2017 at 04:26:10PM +0200, Igor Mammedov wrote:
> > only TODO escaped defines were meant to be removed,
> > but not TODO_USER_ONLY which are compiled in case of
> > *-user targets.
> >
> > So retirn back "440" model removed b
On 29. 8. 2017 12:08, Stefan Hajnoczi wrote:
On Fri, Aug 25, 2017 at 01:42:55PM +0200, Ján Poctavek wrote:
Hi guys,
Maybe it is just my lack of understanding, this seems like a bug to me:
To get list of dirty pages, qemu calls kvm_vm_ioctl() with
KVM_GET_DIRTY_LOG:
https://github.com/qemu/qem
On Mon, Sep 04, 2017 at 09:38:47AM +0800, Dou Liyang wrote:
> Hi Eduardo, Thadeu,
>
> At 09/02/2017 12:11 AM, Eduardo Habkost wrote:
> > On Fri, Sep 01, 2017 at 12:45:42PM -0300, Thadeu Lima de Souza Cascardo
> > wrote:
> > > Linux uses SRAT to determine the maximum memory in a system, which is
>
On Mon, Sep 04, 2017 at 08:31:29PM +0800, Sam wrote:
> Thank you, but I have to ask last question. My qemu is 2.6.0, and there is
> no -qmp option :
QEMU 2.6.0 supports it, but whatever person/application has run
the QEMU process shown here has not used the -qmp arg. You'll
need to get that change
On Mon, Sep 04, 2017 at 08:32:38PM +0800, Sam wrote:
> There are two docs:
>
> https://wiki.qemu.org/index.php/Documentation/QMP
This one is right
> https://en.wikibooks.org/wiki/QEMU/Monitor
This refers to the older Human Monitor Protocol (HMP)
Regards,
Daniel
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On 31/8/2017 9:55 AM, Liu Qing wrote:
On Wed, Aug 30, 2017 at 01:15:33PM +0300, Anton Nefedov wrote:
On 29/08/2017 05:56, Liu Qing wrote:
On Mon, Aug 28, 2017 at 10:46:34AM -0500, Eric Blake wrote:
[adding qemu-block]
On 08/28/2017 12:56 AM, Liu Qing wrote:
Dear list,
Recently I used
Yes, but that's not how we ship them today. (We're actually considering
having the ROM blob sources be in an entirely separate tarball from the
QEMU sources, for unrelated reasons).
We should fix this bug by:
(1) getting u-boot to fix it upstream
(2) moving to a fixed u-boot
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Marc-André Lureau writes:
> Accept 'if' key in top-level elements, accepted as string or list of
> string type. The following patches will modify the test visitor to
> check the value is correctly saved, and generate #if/#endif code (as a
> single #if/endif line or a series for a list).
>
> Examp
On Mon, Sep 04, 2017 at 08:55:23PM +0800, Fam Zheng wrote:
> Hi Kashyap,
>
> On Mon, 09/04 13:16, Kashyap Chamarthy wrote:
[...]
> > +dest_vm = (iotests.VM('dest').add_drive(test_img_path)
> > + .add_incoming('defer'))
>
> Superfluous parenthesis?
Yes, the paranth
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