On 07.04.2017 17:41, Daniel P. Berrange wrote:
On Fri, Apr 07, 2017 at 05:30:31PM +0300, Amarnath Valluri wrote:
This change introduces a new TPM backend driver that can communicate with
swtpm(software TPM emulator) using unix domain socket interface.
Swtpm uses two unix sockets, one for plai
On Mon, Apr 10, 2017 at 02:39:22PM +1000, David Gibson wrote:
> On Fri, Apr 07, 2017 at 06:59:07PM +0800, Peter Xu wrote:
> > In this patch, IOMMUNotifier.{start|end} are introduced to store section
> > information for a specific notifier. When notification occurs, we not
> > only check the notific
Nikunj A Dadhania writes:
> Alex Bennée writes:
>
>> luigi burdo writes:
>>
>>> Hi David and Nikuji,
>>>
>>> can i suggest to remove the message:
>>>
>>>
>>> Guest not yet converted to MTTCG - you may get unexpected results
>>> where the mttcg is enabled?
>>
>> Have you declared the memory ord
On 2017/4/8 1:39, Dr. David Alan Gilbert wrote:
* zhanghailiang (zhang.zhanghaili...@huawei.com) wrote:
Don't need to flush all VM's ram from cache, only
flush the dirty pages since last checkpoint
Cc: Juan Quintela
Signed-off-by: Li Zhijian
Signed-off-by: Zhang Chen
Signed-off-by: zhanghail
Hi Lidong Chen:
I forgot to use this option.I think the way you said is effective.I
will try it.Thank you very much for your help
--
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
https://bugs.launchpad.net/bugs/1662050
Title:
q
On 2017/4/7 23:46, Dr. David Alan Gilbert wrote:
* zhanghailiang (zhang.zhanghaili...@huawei.com) wrote:
We will use this notifier to help COLO to notify filter object
to do something, like do checkpoint, or process failover event.
Cc: Jason Wang
Signed-off-by: zhanghailiang
---
net/colo.c
On 2017/4/8 1:06, Dr. David Alan Gilbert wrote:
* zhanghailiang (zhang.zhanghaili...@huawei.com) wrote:
We should not load PVM's state directly into SVM, because there maybe some
errors happen when SVM is receving data, which will break SVM.
We need to ensure receving all data before load the s
On 07.04.2017 18:11, Marc-André Lureau wrote:
Hi
On Fri, Apr 7, 2017 at 4:41 PM Daniel P. Berrange
> +.name = "data-path",
> +.type = QEMU_OPT_STRING,
> +.help = "Socket path to use for data exhange",
> +},
> +{
> +.name = "ctrl-
Alex Bennée writes:
> Nikunj A Dadhania writes:
>
>> Alex Bennée writes:
>>
>>> luigi burdo writes:
>>>
Hi David and Nikuji,
can i suggest to remove the message:
Guest not yet converted to MTTCG - you may get unexpected results
where the mttcg is enabled?
>>>
Since d5895fcb (iscsi: Split URL into individual options), creating
qcow2 image on an iscsi LUN fails:
qemu-img create -f qcow2 iscsi://$SERVER/$IQN/0 1G
qemu-img: iscsi://$SERVER/$IQN/0: Could not create image: Invalid
argument
The problem is iscsi_open now expects that transport
Nikunj A Dadhania writes:
> While the configure script generates TARGET_SUPPORTS_MTTCG define, one
> of the define is cpus.c is checking wrong name: TARGET_SUPPORT_MTTCG
>
> Signed-off-by: Nikunj A Dadhania
> ---
> cpus.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a
Am 08.04.2017 um 05:43 hat Fam Zheng geschrieben:
> On Fri, 04/07 13:50, Stefan Hajnoczi wrote:
> > On Fri, Apr 07, 2017 at 02:54:12PM +0800, Fam Zheng wrote:
> > > @@ -4413,6 +4416,10 @@ void bdrv_set_aio_context(BlockDriverState *bs,
> > > AioContext *new_context)
> > > aio_context_acquire(
This enables the multi-threaded system emulation by default for PPC64
guests using the x86_64 TCG back-end.
Signed-off-by: Nikunj A Dadhania
---
Depends on following patch which fixes the define name:
https://patchwork.ozlabs.org/patch/748840/
---
configure| 2 ++
target/ppc/cpu.h | 2
On 2017/4/6 21:13, Juan Quintela wrote:
Hi
This updates patches with all the comments received.
I move qdev_unplug() to make linux-user compile.
Please, review.
[RFC - v1]
This series disable hotplug/unplug during migration. Thank to Markus
for explaining where I had to put the checks. Why?
On 2017/4/8 1:18, Dr. David Alan Gilbert wrote:
* zhanghailiang (zhang.zhanghaili...@huawei.com) wrote:
There are several stages during loadvm/savevm process. In different stage,
migration incoming processes different types of sections.
We want to control these stages more accuracy, it will bene
On Mon, Apr 10, 2017 at 10:08:21AM +0300, Amarnath Valluri wrote:
>
>
> On 07.04.2017 17:41, Daniel P. Berrange wrote:
> > On Fri, Apr 07, 2017 at 05:30:31PM +0300, Amarnath Valluri wrote:
> > > This change introduces a new TPM backend driver that can communicate with
> > > swtpm(software TPM emu
On 8 April 2017 at 15:36, Suramya Shah wrote:
> The lance device needs pointer to ISA DMA device to operate. But according to
> qdev-properties.h, properties of pointer type should be avoided.
> A link type property is a good substitution.
>
> Changes since v1
> -changed the code in hw/sparc/sun4
On 8 April 2017 at 16:05, Suramya Shah wrote:
> Reproducer:
> $i386-softmmu/qemu-system-i386 -S -machine isapc,accel=tcg -device amd-iommu
> Segmentation fault (core dumped)
>
> Partial bt:
> #0 bus_add_child (child=0x56d4e520, bus=0x0) at hw/core/qdev.c:88
> #1 qdev_set_parent_bus (dev=0x5
Am 07.04.2017 um 19:10 hat Max Reitz geschrieben:
> One case I'd be especially interested in are of course 4 kB subclusters
> for 64 kB clusters (because 4 kB is a usual page size and can be
> configured to be the block size of a guest device; and because 64 kB
> simply is the standard cluster size
On Thu, Apr 06, 2017 at 02:42:32PM +0100, Peter Maydell wrote:
> In tlb_fill() we construct a syndrome register value from a
> fault status register value which is filled in by arm_tlb_fill().
> arm_tlb_fill() returns FSR values which might be in the format
> used with short-format page descriptors
On Thu, Apr 06, 2017 at 02:42:32PM +0100, Peter Maydell wrote:
> In tlb_fill() we construct a syndrome register value from a
> fault status register value which is filled in by arm_tlb_fill().
> arm_tlb_fill() returns FSR values which might be in the format
> used with short-format page descriptors
On Thu, Apr 06, 2017 at 02:45:40PM +0100, Peter Maydell wrote:
> Recent changes have added new EXCP_ values to ARM but forgot
> to update the excnames[] array which is used to provide
> human-readable strings when printing information about the
> exception for debug logging. Add the missing entries
On Mon, 04/10 10:06, Kevin Wolf wrote:
> Am 08.04.2017 um 05:43 hat Fam Zheng geschrieben:
> > On Fri, 04/07 13:50, Stefan Hajnoczi wrote:
> > > On Fri, Apr 07, 2017 at 02:54:12PM +0800, Fam Zheng wrote:
> > > > @@ -4413,6 +4416,10 @@ void bdrv_set_aio_context(BlockDriverState *bs,
> > > > AioCont
Hi Alex,
>Have you declared the memory ordering for the guest?
Nope didnt know was necessary i just add the standard -m 2047
>See ca759f9e387db87e1719911f019bc60c74be9ed8 for an example.
watching it about
Thanks
Luigi
On Tue, Mar 21, 2017 at 11:16:23AM +0800, Fam Zheng wrote:
> @@ -1713,21 +1714,22 @@ void bdrv_format_default_perms(BlockDriverState *bs,
> BdrvChild *c,
> perm |= BLK_PERM_CONSISTENT_READ;
> shared &= ~(BLK_PERM_WRITE | BLK_PERM_RESIZE);
> } else {
> -/* We want con
On 10 April 2017 at 09:44, Edgar E. Iglesias wrote:
> Have you seen something suspicous when running code or was
> this a theoretical issue?
No, I was looking at the code for a different reason and
was surprised that the syndrome-generation code wasn't doing
anything to handle short-format FSRs.
Extracts qcrypto_cipher_ctx_new() from qcrypto_cipher_new() for
nettle-backend impls.
Signed-off-by: Longpeng(Mike)
---
crypto/cipher-nettle.c | 41 +
1 file changed, 29 insertions(+), 12 deletions(-)
diff --git a/crypto/cipher-nettle.c b/crypto/cipher-ne
Refactors the qcrypto_cipher_free(), splits it into two parts. One
is gcrypt/nettle__cipher_free_ctx() to free the special context.
This makes code more clear, what's more, it would be used by the
later patch.
Signed-off-by: Longpeng(Mike)
---
crypto/cipher-gcrypt.c | 31 ++-
Extracts qcrypto_cipher_ctx_new() from qcrypto_cipher_new() for
gcrypt-backend impls.
Signed-off-by: Longpeng(Mike)
---
crypto/cipher-gcrypt.c | 50 +-
1 file changed, 33 insertions(+), 17 deletions(-)
diff --git a/crypto/cipher-gcrypt.c b/crypto/
1) makes the public APIs in hash-nettle/gcrypt/glib static,
and rename them with "nettle/gcrypt/glib" prefix.
2) introduces hash framework, including QCryptoHashDriver
and new public APIs.
Signed-off-by: Longpeng(Mike)
---
crypto/hash-gcrypt.c | 17 +++--
crypto/hash-glib.c
Extracts qcrypto_cipher_ctx_new() from qcrypto_cipher_new() for
glib-backend impls.
Signed-off-by: Longpeng(Mike)
---
crypto/cipher-builtin.c | 101 ++--
1 file changed, 55 insertions(+), 46 deletions(-)
diff --git a/crypto/cipher-builtin.c b/crypto/c
1) makes the public APIs in cipher-nettle/gcrypt/builtin static,
and rename them with "nettle/gcrypt/builtin" prefix.
2) introduces cipher framework, including QCryptoCipherDriver
and new public APIs.
Signed-off-by: Longpeng(Mike)
---
crypto/cipher-builtin.c | 59 +
The AF_ALG socket family is the userspace interface for linux
crypto API, users can use it to access hardware accelerators.
This patchset adds a afalg-backend for qemu crypto subsystem. Currently
when performs encrypt/decrypt, we'll try afalg-backend first and will
back to libiary-backend if it fa
Adds afalg-backend cipher support: introduces some private APIs
firstly, and then intergrates them into qcrypto_cipher_afalg_driver.
Signed-off-by: Longpeng(Mike)
---
crypto/Makefile.objs| 1 +
crypto/cipher-afalg.c | 229
crypto/ciphe
1) Fix a handle-leak problem in qcrypto_hmac_new(), doesn't free
ctx->handle if gcry_mac_setkey fails.
2) Extracts qcrypto_hmac_ctx_new() from qcrypto_hmac_new() for
gcrypt-backend impls.
Signed-off-by: Longpeng(Mike)
---
crypto/hmac-gcrypt.c | 35 +--
1 fi
Moves crypto/hmac.h into include/crypto/, likes cipher.h and hash.h
Signed-off-by: Longpeng(Mike)
---
crypto/hmac.h | 166 --
include/crypto/hmac.h | 166 ++
2 files changed, 166 insertions(+)
Adds afalg-backend hash support: introduces some private APIs
firstly, and then intergrates them into qcrypto_hash_afalg_driver.
Signed-off-by: Longpeng(Mike)
---
crypto/Makefile.objs| 1 +
crypto/hash-afalg.c | 150
crypto/hash.c
1) makes the public APIs in hmac-nettle/gcrypt/glib static,
and rename them with "nettle/gcrypt/glib" prefix.
2) introduces hmac framework, including QCryptoHmacDriver
and new public APIs.
Signed-off-by: Longpeng(Mike)
---
crypto/hmac-gcrypt.c | 48 +++
cr
Extracts qcrypto_hmac_ctx_new() from qcrypto_hmac_new() for
nettle-backend impls.
Signed-off-by: Longpeng(Mike)
---
crypto/hmac-nettle.c | 34 --
1 file changed, 24 insertions(+), 10 deletions(-)
diff --git a/crypto/hmac-nettle.c b/crypto/hmac-nettle.c
index 4a9e
On Tue, Mar 21, 2017 at 11:16:19AM +0800, Fam Zheng wrote:
> Eject / change of scsi-cd on a virtio-scsi dataplane bus causes abort()
> because
> the new BDS doesn't get proper bdrv_set_aio_context().
>
> Store the AioContext in BB and do it in blk_insert_bs. That is done by
> Vladimir's patch.
>
Extracts qcrypto_hmac_ctx_new() from qcrypto_hmac_new() for
glib-backend impls.
Signed-off-by: Longpeng(Mike)
---
crypto/hmac-glib.c | 34 --
1 file changed, 24 insertions(+), 10 deletions(-)
diff --git a/crypto/hmac-glib.c b/crypto/hmac-glib.c
index 08a1fdd..d9f
The AF_ALG socket family is the userspace interface for linux
crypto API, this patch adds af_alg family support. It'll be used
by afalg-backend crypto later.
Signed-off-by: Longpeng(Mike)
---
configure | 21
include/qemu/sockets.h | 6
qapi-schema.json | 21
Am 10.04.2017 um 10:45 hat Fam Zheng geschrieben:
> On Mon, 04/10 10:06, Kevin Wolf wrote:
> > Am 08.04.2017 um 05:43 hat Fam Zheng geschrieben:
> > > On Fri, 04/07 13:50, Stefan Hajnoczi wrote:
> > > > On Fri, Apr 07, 2017 at 02:54:12PM +0800, Fam Zheng wrote:
> > > > > @@ -4413,6 +4416,10 @@ void
Now we have afalg-backend and libiary-backend, it's necessary
to add the speed test in test-crypto-cipher.
We can use "./tests/test-crypto-cipher speed" to do the speed
test.
Signed-off-by: Longpeng(Mike)
---
tests/test-crypto-cipher.c | 82 +-
1 file
This patch introduces some common functions for af_alg backend,
they would be used in af_alg-backend cipher/hash/hmac latter.
Signed-off-by: Longpeng(Mike)
---
crypto/Makefile.objs| 1 +
crypto/afalg-comm.c | 71 +
include/crypto/afalg
Now we have afalg-backend and libiary-backend, it's necessary
to add the speed test in test-crypto-hash.
We can use "./tests/test-crypto-hash speed" to do the speed test.
Signed-off-by: Longpeng(Mike)
---
tests/test-crypto-hash.c | 56 +++-
1 file cha
Adds afalg-backend hmac support: introduces some private APIs
firstly, and then intergrates them into qcrypto_hmac_afalg_driver.
Signed-off-by: Longpeng(Mike)
---
crypto/hash-afalg.c | 108 ++--
crypto/hmac.c | 28 +++-
inclu
On Fri, 7 Apr 2017 03:48:52 -0700
Li Qiang wrote:
> Free 'orig_value' in error path.
>
> Signed-off-by: Li Qiang
> ---
Good catch. I'll send a pull req later today.
Cheers.
--
Greg
> hw/9pfs/9p-xattr.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/hw/9pfs/9p-xattr.c b/hw/9pfs/
Now we have afalg-backend and libiary-backend, it's necessary
to add the speed test in test-crypto-hmac.
We can use "./tests/test-crypto-hmac speed" to do the speed
test.
Signed-off-by: Longpeng(Mike)
---
tests/test-crypto-hmac.c | 66 +---
1 file cha
On 04/10/2017 07:17 AM, David Gibson wrote:
> On Wed, Apr 05, 2017 at 02:41:36PM +0200, Cédric Le Goater wrote:
>> This is an empty shell that we will use to include nodes in the device
>> tree for ISA devices. We expect RTC, UART and IPMI BT devices.
>>
>> Signed-off-by: Cédric Le Goater
>
> Thi
On Thu, Mar 23, 2017 at 06:39:21PM +0100, Paolo Bonzini wrote:
> Outside blockjob.c, block_job_unref is only used when a block job fails
> to start, and block_job_ref is not used at all. The reference counting
> thus is pretty well hidden. Introduce a separate function to be used
> by block jobs;
Hi
On Mon, Apr 10, 2017 at 8:58 AM Gerd Hoffmann wrote:
> Cc: 1635...@bugs.launchpad.net
> Signed-off-by: Gerd Hoffmann
> ---
> hw/display/qxl.h | 1 +
> hw/display/qxl.c | 22 ++
> 2 files changed, 23 insertions(+)
>
> diff --git a/hw/display/qxl.h b/hw/display/qxl.h
> in
On 04/10/2017 07:31 AM, David Gibson wrote:
> On Wed, Apr 05, 2017 at 02:41:40PM +0200, Cédric Le Goater wrote:
>> Skiboot, the firmware for the PowerNV platform, expects the BMC to
>> provide some specific IPMI sensors. These sensors are exposed in the
>> device tree and their values are updated b
On Thu, Mar 23, 2017 at 06:39:22PM +0100, Paolo Bonzini wrote:
> Remove use of block_job_pause/resume from outside blockjob.c, thus
> making them static. Again, one reason to do this is that
> block_job_pause/resume will have different locking rules compared
> to everything else that block.c and b
On Thu, Mar 23, 2017 at 06:39:19PM +0100, Paolo Bonzini wrote:
> !job is always checked prior to the call, drop it from here.
>
> Signed-off-by: Paolo Bonzini
> ---
> blockjob.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
Reviewed-by: Stefan Hajnoczi
signature.asc
Description: PG
On Thu, Mar 23, 2017 at 06:39:20PM +0100, Paolo Bonzini wrote:
> This is unused since commit 66a0fae ("blockjob: Don't touch BDS iostatus",
> 2016-05-19).
>
> Signed-off-by: Paolo Bonzini
> ---
> blockjob.c | 3 ---
> include/block/blockjob_int.h | 3 ---
> 2 files changed, 6 d
> -Original Message-
> From: longpeng
> Sent: Monday, April 10, 2017 5:03 PM
> To: berra...@redhat.com; kra...@redhat.com; pbonz...@redhat.com;
> ebl...@redhat.com; arm...@redhat.com
> Cc: Xuquan (Quan Xu); Gonglei (Arei); qemu-devel@nongnu.org; longpeng
> Subject: [PATCH for-2.10 00/19] c
On Thu, Mar 23, 2017 at 06:39:23PM +0100, Paolo Bonzini wrote:
> We already have different locking policies for APIs called by the monitor
> and the block job. Monitor APIs need consistency across block_job_get
> and the actual operation (e.g. block_job_set_speed), so currently there
> are explici
On Thu, Mar 23, 2017 at 06:39:24PM +0100, Paolo Bonzini wrote:
> Outside blockjob.c, the block_job_iostatus_reset function is used once
> in the monitor and once in BlockBackend. When we introduce the block
> job mutex, block_job_iostatus_reset's client is going to be the block
> layer (for which
On Thu, Mar 23, 2017 at 06:39:25PM +0100, Paolo Bonzini wrote:
> Unlike test-blockjob-txn, QMP releases the reference to the transaction
> before the jobs finish. Thus, while working on the next patch,
> qemu-iotest 124 showed a failure that the unit tests did not have.
> Make the unit test just a
On Thu, Mar 23, 2017 at 06:39:26PM +0100, Paolo Bonzini wrote:
> Signed-off-by: Paolo Bonzini
> ---
> blockjob.c | 11 ---
> 1 file changed, 8 insertions(+), 3 deletions(-)
Reviewed-by: Stefan Hajnoczi
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Description: PGP signature
On 2017/4/10 17:28, Gonglei (Arei) wrote:
>
>> -Original Message-
>> From: longpeng
>> Sent: Monday, April 10, 2017 5:03 PM
>> To: berra...@redhat.com; kra...@redhat.com; pbonz...@redhat.com;
>> ebl...@redhat.com; arm...@redhat.com
>> Cc: Xuquan (Quan Xu); Gonglei (Arei); qemu-devel@nongn
On Thu, Mar 23, 2017 at 06:39:27PM +0100, Paolo Bonzini wrote:
> This splits the part that touches job states from the part that invokes
> callbacks. It will be a bit simpler to understand once job states will
> be protected by a different mutex than the AioContext lock.
>
> Signed-off-by: Paolo
On Thu, Mar 23, 2017 at 06:39:28PM +0100, Paolo Bonzini wrote:
> All block jobs are using block_job_defer_to_main_loop as the final
> step just before the coroutine terminates. At this point,
> block_job_enter should do nothing, but currently it restarts
> the freed coroutine.
>
> Now, the job->c
On Mon, Apr 10, 2017 at 05:00:58PM +0800, Longpeng(Mike) wrote:
> Now we have afalg-backend and libiary-backend, it's necessary
> to add the speed test in test-crypto-cipher.
>
> We can use "./tests/test-crypto-cipher speed" to do the speed
> test.
This is not using any of the existing code for t
Reminder to maintainers -- I will be cutting the (hopefully) final
rc for 2.9 tomorrow. Please get pull requests on the list by Tuesday
12:00 UTC at latest, preferably earlier, or let me know if there's
something late-breaking that would make it worth delaying the rc a
day or so.
thanks
-- PMM
Nikunj A Dadhania writes:
> This enables the multi-threaded system emulation by default for PPC64
> guests using the x86_64 TCG back-end.
Technically this enables it for all backends that can meet the guests
default memory model requirements. So far only the x86 backend defines
one as:
#defi
Hi
On Mon, Apr 10, 2017 at 9:33 AM Amarnath Valluri
wrote:
>
>
> On 07.04.2017 18:11, Marc-André Lureau wrote:
>
> Hi
>
> On Fri, Apr 7, 2017 at 4:41 PM Daniel P. Berrange
>
> > +.name = "data-path",
> > +.type = QEMU_OPT_STRING,
> > +.help = "Socket path to use for data
On Fri, Apr 07, 2017 at 05:42:16PM +0200, Max Reitz wrote:
> On 06.04.2017 15:04, Stefan Hajnoczi wrote:
> > On Mon, Apr 03, 2017 at 06:09:33PM +0200, Max Reitz wrote:
> >> -/* total size of refcount tables */
> >> -nreftablee = nrefblocke / refblock_size;
> >> -nreftablee = align_offse
On Sat, Apr 08, 2017 at 06:09:16PM +0800, Paolo Bonzini wrote:
> On 07/04/2017 19:33, Stefan Hajnoczi wrote:
> > The migration thread is holding the QEMU global mutex, the AioContext,
> > and the qcow2 s->lock while the L2 table is read from disk.
> >
> > The QEMU global mutex is needed for block
On Mon, Apr 10, 2017 at 04:59:46PM +0800, Longpeng(Mike) wrote:
> 1) makes the public APIs in cipher-nettle/gcrypt/builtin static,
>and rename them with "nettle/gcrypt/builtin" prefix.
>
> 2) introduces cipher framework, including QCryptoCipherDriver
>and new public APIs.
>
> Signed-off-b
On Mon, Apr 10, 2017 at 04:59:53PM +0800, Longpeng(Mike) wrote:
> 1) makes the public APIs in hash-nettle/gcrypt/glib static,
>and rename them with "nettle/gcrypt/glib" prefix.
>
> 2) introduces hash framework, including QCryptoHashDriver
>and new public APIs.
>
> Signed-off-by: Longpeng(
On Mon, Apr 10, 2017 at 05:00:33PM +0800, Longpeng(Mike) wrote:
> 1) makes the public APIs in hmac-nettle/gcrypt/glib static,
>and rename them with "nettle/gcrypt/glib" prefix.
>
> 2) introduces hmac framework, including QCryptoHmacDriver
>and new public APIs.
>
> Signed-off-by: Longpeng(
On Mon, 2017-04-10 at 09:54 +, Marc-André Lureau wrote:
> By "public protocol", I mean qemu communication with a foreign
> project, swtpm or other.
>
> If qemu grows new needs, or if the protocol is found limited or buggy,
> it may change. Subtle interactions may break between various
> imple
On Mon, Apr 10, 2017 at 05:00:40PM +0800, Longpeng(Mike) wrote:
> The AF_ALG socket family is the userspace interface for linux
> crypto API, this patch adds af_alg family support. It'll be used
> by afalg-backend crypto later.
>
> Signed-off-by: Longpeng(Mike)
> ---
> configure | 2
On Mon, Apr 10, 2017 at 05:00:47PM +0800, Longpeng(Mike) wrote:
> This patch introduces some common functions for af_alg backend,
> they would be used in af_alg-backend cipher/hash/hmac latter.
>
> Signed-off-by: Longpeng(Mike)
> ---
> crypto/Makefile.objs| 1 +
> crypto/afalg-comm.c
On Mon, Apr 10, 2017 at 05:00:52PM +0800, Longpeng(Mike) wrote:
> Adds afalg-backend cipher support: introduces some private APIs
> firstly, and then intergrates them into qcrypto_cipher_afalg_driver.
>
> Signed-off-by: Longpeng(Mike)
> ---
> crypto/Makefile.objs| 1 +
> crypto/cipher-
On Mon, Apr 10, 2017 at 05:01:05PM +0800, Longpeng(Mike) wrote:
> Adds afalg-backend hash support: introduces some private APIs
> firstly, and then intergrates them into qcrypto_hash_afalg_driver.
>
> Signed-off-by: Longpeng(Mike)
> ---
> crypto/Makefile.objs| 1 +
> crypto/hash-afalg.
On Sat, Apr 08, 2017 at 11:09:47AM +0530, Ishani Chugh wrote:
> Signed-off-by: Ishani Chugh
> ---
> target/arm/kvm64.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
Thanks for the patch!
I have CCed Peter Maydell who maintains this source file. I also added
the trivial patches ma
Hi Daniel,
Ok, I'll take all your suggestions, and fix them in next version.
Thanks.
On 2017/4/10 17:51, Daniel P. Berrange wrote:
> On Mon, Apr 10, 2017 at 05:00:58PM +0800, Longpeng(Mike) wrote:
>> Now we have afalg-backend and libiary-backend, it's necessary
>> to add the speed test in test-
Cc: 1635...@bugs.launchpad.net
Signed-off-by: Gerd Hoffmann
---
hw/display/qxl.h | 1 +
hw/display/qxl.c | 28
2 files changed, 29 insertions(+)
diff --git a/hw/display/qxl.h b/hw/display/qxl.h
index d2d49dd..77e5a36 100644
--- a/hw/display/qxl.h
+++ b/hw/display/qx
Hi
On Mon, Apr 10, 2017 at 12:27 PM Gerd Hoffmann wrote:
> Cc: 1635...@bugs.launchpad.net
> Signed-off-by: Gerd Hoffmann
>
---
> hw/display/qxl.h | 1 +
> hw/display/qxl.c | 28
> 2 files changed, 29 insertions(+)
>
> diff --git a/hw/display/qxl.h b/hw/display/qxl
Public bug reported:
Reproducer:
$i386-softmmu/qemu-system-i386 -S -machine isapc,accel=tcg -device amd-iommu
Segmentation fault (core dumped)
Partial bt:
#0 bus_add_child (child=0x56d4e520, bus=0x0) at hw/core/qdev.c:88
#1 qdev_set_parent_bus (dev=0x56d4e520, bus=bus@entry=0x0)
at hw/
Now that we've rewritten M-profile exception return so that the magic
PC values are not visible to other parts of QEMU, we can delete the
special casing of them elsewhere.
Signed-off-by: Peter Maydell
---
target/arm/cpu.c | 43 ++-
target/arm/transla
In Thumb mode, the only instructions which can cause an interworking
branch by writing the PC are BLX, BX, BXJ, LDR, POP and LDM. Unlike
ARM mode, data processing instructions which target the PC do not
cause interworking branches.
When we added support for doing interworking branches on writes to
The excnames[] array is defined in internals.h because we used
to use it from two different source files for handling logging
of AArch32 and AArch64 exception entry. Refactoring means that
it's now used only in arm_log_exception() in helper.c, so move
the array into that function.
Suggested-by: Ph
We currently have two places that do:
if (dc->ss_active) {
gen_step_complete_exception(dc);
} else {
gen_exception_internal(EXCP_DEBUG);
}
Factor this out into its own function, as we're about to add
a third place that needs the s
Move the utility routines gen_set_condexec() and gen_set_pc_im()
up in the file, as we will want to use them from a function
placed earlier in the file than their current location.
Signed-off-by: Peter Maydell
---
target/arm/translate.c | 31 +++
1 file changed, 15 in
For M-profile CPUs, the BXJ instruction does not exist at all, and
the encoding should always UNDEF. We were accidentally implementing
it to behave like A-profile BXJ; correct the error.
Signed-off-by: Peter Maydell
---
target/arm/translate.c | 7 ++-
1 file changed, 6 insertions(+), 1 delet
Move the code to generate the "condition failed" instruction
codepath out of the if (singlestepping) {} else {}. This
will allow adding support for handling a new is_jmp type
which can't be neatly split into "singlestepping case"
versus "not singlestepping case".
Signed-off-by: Peter Maydell
---
On M profile, return from exceptions happen when privileged code
executes one of the following function call return instructions:
* POP or LDM which loads the PC
* LDR to PC
* BX register
and the new PC value is 0xFFxx.
QEMU tries to implement this by not treating the instru
Hi,
> > +if (!qxl->migration_blocker) {
> > +Error *local_err = NULL;
> > +error_setg(&qxl->migration_blocker,
> > + "qxl: guest bug: command not in ram bar");
> > +migrate_add_blocker(qxl->
On 2017/4/10 18:18, Daniel P. Berrange wrote:
> On Mon, Apr 10, 2017 at 05:00:52PM +0800, Longpeng(Mike) wrote:
>> Adds afalg-backend cipher support: introduces some private APIs
>> firstly, and then intergrates them into qcrypto_cipher_afalg_driver.
>>
>> Signed-off-by: Longpeng(Mike)
>> ---
>>
On Mon, Apr 10, 2017 at 06:52:29PM +0800, Longpeng (Mike) wrote:
>
> On 2017/4/10 18:18, Daniel P. Berrange wrote:
>
> > On Mon, Apr 10, 2017 at 05:00:52PM +0800, Longpeng(Mike) wrote:
> >> Adds afalg-backend cipher support: introduces some private APIs
> >> firstly, and then intergrates them int
On Mon, 04/10 10:04, Stefan Hajnoczi wrote:
> On Tue, Mar 21, 2017 at 11:16:19AM +0800, Fam Zheng wrote:
> > Eject / change of scsi-cd on a virtio-scsi dataplane bus causes abort()
> > because
> > the new BDS doesn't get proper bdrv_set_aio_context().
> >
> > Store the AioContext in BB and do it
Hi
On Mon, Apr 10, 2017 at 12:51 PM Gerd Hoffmann wrote:
> Hi,
>
> > > +if (!qxl->migration_blocker) {
> > > +Error *local_err = NULL;
> > > +error_setg(&qxl->migration_blocker,
> > > + "qxl: guest bug: comma
On 2017/4/10 18:56, Daniel P. Berrange wrote:
> On Mon, Apr 10, 2017 at 06:52:29PM +0800, Longpeng (Mike) wrote:
>>
>> On 2017/4/10 18:18, Daniel P. Berrange wrote:
>>
>>> On Mon, Apr 10, 2017 at 05:00:52PM +0800, Longpeng(Mike) wrote:
Adds afalg-backend cipher support: introduces some priv
Public bug reported:
Reproducable:
$ ./ppc64-softmmu/qemu-system-ppc64 -S -machine ppce500,accel=tcg -device
spapr-pci-host-bridge
qemu/hw/ppc/spapr_pci.c:1567:spapr_phb_realize: Object 0x55bda99744a0 is not an
instance of type spapr-machine
Aborted (core dumped)
** Affects: qemu
Importa
On M profile, return from exceptions happen when privileged code
executes one of the following function call return instructions:
* POP or LDM which loads the PC
* LDR to PC
* BX register
and the new PC value is 0xFFxx.
QEMU tries to implement this by not treating the instruction
specially
Cc: 1635...@bugs.launchpad.net
Signed-off-by: Gerd Hoffmann
---
hw/display/qxl.h | 1 +
hw/display/qxl.c | 31 +++
2 files changed, 32 insertions(+)
diff --git a/hw/display/qxl.h b/hw/display/qxl.h
index d2d49dd..77e5a36 100644
--- a/hw/display/qxl.h
+++ b/hw/display
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