S390PCIBusDevice is typedef'ed earlier in the file, before the hunks
that this patch modifies. The double typedef causes old versions of
GCC to complain.
Signed-off-by: Paolo Bonzini
---
hw/s390x/s390-pci-bus.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/hw/s390x/s39
On Thu, Jan 05, 2017 at 12:54:02PM +0530, Jitendra Kolhe wrote:
> Using "-mem-prealloc" option for a very large guest leads to huge guest
> start-up and migration time. This is because with "-mem-prealloc" option
> qemu tries to map every guest page (create address translations), and
> make sure th
On 27 January 2017 at 10:34, Alex Bennée wrote:
> While the vargs approach was flexible the original MTTCG ended up
> having munge the bits to a bitmap so the data could be used in
> deferred work helpers. Instead of hiding that in cputlb we push the
> change to the API to make it take a bitmap of
On 26 January 2017 at 10:19, Stefan Hajnoczi wrote:
> The following changes since commit c7f1cf01b8245762ca5864e835d84f6677ae8b1f:
>
> Merge remote-tracking branch 'remotes/gkurz/tags/for-upstream' into staging
> (2017-01-25 17:54:14 +)
>
> are available in the git repository at:
>
> git:
On 01/27/2017 02:20 PM, Paolo Bonzini wrote:
> S390PCIBusDevice is typedef'ed earlier in the file, before the hunks
> that this patch modifies. The double typedef causes old versions of
> GCC to complain.
>
> Signed-off-by: Paolo Bonzini
> ---
> hw/s390x/s390-pci-bus.h | 4 ++--
> 1 file change
Peter Maydell writes:
> From: Michael Davidsaver
>
> Implement the v7M system registers CCR, CFSR, HFSR, DFSR, BFAR and
> MMFAR. For the moment these simply read as written (with some basic
> handling of RAZ/WI bits and W1C semantics).
>
> Signed-off-by: Michael Davidsaver
> [PMM: drop warnin
Peter Maydell writes:
> From: Michael Davidsaver
>
> When we take an exception for an undefined instruction, set the
> appropriate CFSR bit.
>
> Signed-off-by: Michael Davidsaver
> [PMM: tweaked commit message, comment]
> Signed-off-by: Peter Maydell
Reviewed-by: Alex Bennée
> ---
> targe
From: Pavel Dovgalyuk
This patch improves interrupt handling in record/replay mode.
Now "interrupt" event is saved only when cc->cpu_exec_interrupt returns true.
This patch also adds missing return to cpu_exec_interrupt function.
Signed-off-by: Pavel Dovgalyuk
Message-Id: <20170124071708.4572.6
From: Pavel Dovgalyuk
This patch fixes replaying the exception when TB cache is full.
It breaks cpu loop execution through setting exception_index
to process such queued work as TB flush.
v8: moved setting of exeption_index to tb_gen_code
Signed-off-by: Pavel Dovgalyuk
Message-Id: <20170126123
From: Pavel Dovgalyuk
This patch disables the update of the periodic timer of mc146818rtc
in record/replay mode. State of this timer is saved and therefore does
not need to be updated in record/replay mode.
Read of RTC breaks the replay because all rtc reads have to be the same
as in record mode.
From: Pavel Dovgalyuk
kvmvapic patches the code when some instructions are executed.
E.g. mov 0xff, 0xfffe0080 is interpreted as push 0xff/call ...
This patching is also followed by some side effects (changing apic
and guest memory state). Therefore deterministic execution should take
this operat
From: Phil Dennis-Jordan
Signed-off-by: Phil Dennis-Jordan
Message-Id: <1484921496-11257-4-git-send-email-p...@philjordan.eu>
Signed-off-by: Paolo Bonzini
---
include/hw/i386/pc.h | 6 +-
target/i386/cpu.c| 2 +-
2 files changed, 6 insertions(+), 2 deletions(-)
diff --git a/include/hw
The following changes since commit 3879284d6517dc22529395bdb259f4183b589127:
Merge remote-tracking branch 'remotes/berrange/tags/pull-qio-2017-01-23-2'
into staging (2017-01-23 15:59:09 +)
are available in the git repository at:
git://github.com/bonzini/qemu.git tags/for-upstream
for
From: Laszlo Ersek
Introduce the following fw_cfg files:
- "etc/smi/supported-features": a little endian uint64_t feature bitmap,
presenting the features known by the host to the guest. Read-only for
the guest.
The content of this file will be determined via bit-granularity ICH9-LPC
dev
From: Pavel Dovgalyuk
This patch introduces save_vmstate function to allow saving and loading
vmstates from the replay module.
Signed-off-by: Pavel Dovgalyuk
Message-Id: <20170124071741.4572.13714.stgit@PASHA-ISP>
Signed-off-by: Paolo Bonzini
---
include/sysemu/sysemu.h | 1 +
migration/save
From: Pavel Dovgalyuk
This patch implements saving/restoring of static apic_delivered variable.
v8: saving static variable only for one of the APICs
Signed-off-by: Pavel Dovgalyuk
Message-Id: <20170126123429.5412.94368.stgit@PASHA-ISP>
Signed-off-by: Paolo Bonzini
---
hw/intc/apic_common.c
From: Eric Farman
When running with debug enabled, the scsi-generic cdb that is
dumped skips byte 0 of the command, which is the opcode. This
makes identifying which command is being issued/completed a
little difficult. Example:
0x00 0x00 0x01 0x00 0x00
scsi-generic: scsi_read_data 0x0
s
From: Marc-André Lureau
Available since commit db418a0a7ef5887ea0f3d167584e6f500bb0c4c5
(October 2011, qemu 1.0)
Signed-off-by: Marc-André Lureau
Reviewed-by: Eric Blake
Signed-off-by: Paolo Bonzini
---
qemu-options.hx | 2 --
1 file changed, 2 deletions(-)
diff --git a/qemu-options.hx b/qe
From: Pavel Dovgalyuk
This patch implements initial vmstate creation or loading at the start
of record/replay. It is needed for rewinding the execution in the replay mode.
v4 changes:
- snapshots are not created by default anymore
v3 changes:
- added rrsnapshot option
Signed-off-by: Pavel Do
From: Peter Xu
We were dumping RW bits for each memory region, that might be confusing.
It'll make more sense to dump the memory region type directly rather
than the RW bits since that's how the bits are derived.
Meanwhile, with some slight cleanup in the function.
Signed-off-by: Peter Xu
Mess
From: Eric Farman
Commit 6f6071745bd0 ("raw-posix: Fetch max sectors for host block device")
introduced a routine to call the kernel BLKSECTGET ioctl, which stores the
result back to user space. However, the size of the data returned depends
on the routine handling the ioctl. The (compat_)blkde
From: Marc-André Lureau
This allows to remove the "is_mux" field from CharDriverState.
Signed-off-by: Marc-André Lureau
Reviewed-by: Eric Blake
Signed-off-by: Paolo Bonzini
---
include/sysemu/char.h | 15 +--
monitor.c | 2 +-
qemu-char.c | 21 ++---
From: Peter Xu
Adding one more option "-f" for "info mtree" to dump the flat views of
all the address spaces.
This will be useful to debug the memory rendering logic, also it'll be
much easier with it to know what memory region is handling what address
range.
Reviewed-by: Dr. David Alan Gilbert
From: Peter Lieven
nb_cls_shrunk in iscsi_allocmap_update can become -1 if the
request starts and ends within the same cluster. This results
in passing -1 to bitmap_set and bitmap_clear and they don't
handle negative values properly. In the end this leads to data
corruption.
Fixes: e1123a3b40a1a
From: Peter Lieven
commit f57b4b5f moved qemu_iscsi_opts into vl.c. This
made them invisible for qemu-img, qemu-nbd etc.
Fixes: f57b4b5fb127b60e1aade2684a8b16bc4f630b29
Cc: qemu-sta...@nongnu.org
Signed-off-by: Peter Lieven
Message-Id: <1485262161-18543-1-git-send-email...@kamp.de>
[Drop useles
From: Marc-André Lureau
Use common allocator for CharDriverState.
Rename the now untouched parent field.
The casts added are temporary, they are replaced with QOM type-safe
macros in a later patch in this series.
Signed-off-by: Marc-André Lureau
Reviewed-by: Eric Blake
Signed-off-by: Paolo B
From: Laszlo Ersek
Cc: "Michael S. Tsirkin"
Cc: Eduardo Habkost
Cc: Gerd Hoffmann
Cc: Igor Mammedov
Cc: Paolo Bonzini
Signed-off-by: Laszlo Ersek
Reviewed-by: Eduardo Habkost
Reviewed-by: Michael S. Tsirkin
Reviewed-by: Igor Mammedov
Message-Id: <20170126014416.11211-4-ler...@redhat.com>
From: Marc-André Lureau
Prefer error_report() over fprintf(stderr..)
Signed-off-by: Marc-André Lureau
Reviewed-by: Eric Blake
Signed-off-by: Paolo Bonzini
---
qemu-char.c | 25 ++---
1 file changed, 14 insertions(+), 11 deletions(-)
diff --git a/qemu-char.c b/qemu-char.c
From: Marc-André Lureau
Use a feature flag rather than a structure field for "replay".
Signed-off-by: Marc-André Lureau
Reviewed-by: Eric Blake
Signed-off-by: Paolo Bonzini
---
include/sysemu/char.h | 3 ++-
qemu-char.c | 33 -
2 files changed, 22 i
From: Phil Dennis-Jordan
This fixes timekeeping of x86-64 Darwin/OS X/macOS guests when using KVM.
Darwin/OS X/macOS for x86-64 uses the TSC for timekeeping; it normally
calibrates this by querying various clock frequency scaling MSRs. Details
depend on the exact CPU model detected. The local
From: Laszlo Ersek
The generic edk2 SMM infrastructure prefers
EFI_SMM_CONTROL2_PROTOCOL.Trigger() to inject an SMI on each processor. If
Trigger() only brings the current processor into SMM, then edk2 handles it
in the following ways:
(1) If Trigger() is executed by the BSP (which is guaranteed
From: Marc-André Lureau
This makes the code more declarative, and avoids duplicating the
information on all instances.
Signed-off-by: Marc-André Lureau
Reviewed-by: Eric Blake
Signed-off-by: Paolo Bonzini
---
backends/baum.c | 11 +-
backends/msmouse.c| 11 +-
backends/testdev.c
From: Ladi Prosek
ldl_p has a signed return type so assigning it to uint64_t implicitly
sign-extends the value. This results in devices with min_access_size = 8
seeing unexpected values passed to their write handlers.
Example: guest performs a 32-bit write of 0x8000 to an mmio region
and the
From: Thomas Huth
Now that CPUs show up in the help text of "-device ?",
we should group them into an appropriate category.
Signed-off-by: Thomas Huth
Reviewed-by: Eduardo Habkost
Message-Id: <1484917276-7107-1-git-send-email-th...@redhat.com>
Signed-off-by: Paolo Bonzini
---
hw/cpu/core.c
From: Marc-André Lureau
Set errp to report errors up to the right monitor.
Use error_append_hint() to give hints about parameters on !qmp monitors,
instead of a direct fprintf() call.
Signed-off-by: Marc-André Lureau
Reviewed-by: Eric Blake
Signed-off-by: Paolo Bonzini
---
spice-qemu-char.c
Peter Maydell writes:
> For v7M attempts to access a nonexistent coprocessor are reported
> differently from plain undefined instructions (as UsageFaults of type
> NOCP rather than type UNDEFINSTR). Split them out into a new
> EXCP_NOCP so we can report the FSR value correctly.
>
> Signed-off-b
From: Marc-André Lureau
No need to allocate & copy fields, let's use static const struct instead.
Add an alias field to the CharDriver structure to cover the cases where
we previously registered a driver twice under two names.
Signed-off-by: Marc-André Lureau
Reviewed-by: Eric Blake
Signed-of
From: Eric Farman
We can get the maximum number of bytes for a single I/O transfer
from the BLKSECTGET ioctl, but we only perform this for block
devices. scsi-generic devices are represented as character devices,
and so do not issue this today. Update this, so that virtio-scsi
devices using the
From: Marc-André Lureau
Instead of registering a vc handler to allocate the Gtk VC Chardev,
overwrite the console.c char driver.
A later patch, when switching to QOM, will register a default console vc
QOM class if none has been registered before.
Signed-off-by: Marc-André Lureau
Reviewed-by:
From: Marc-André Lureau
Number and kinds of backends is known at compile-time, use a fixed-sized
static array to simplify iterations & lookups.
Signed-off-by: Marc-André Lureau
Signed-off-by: Paolo Bonzini
---
qemu-char.c | 68 ++---
1 f
Peter Maydell writes:
> From: Michael Davidsaver
>
> The CCR.USERSETMPEND bit has to be set to permit unprivileged code to
> write to the Software Triggered Interrupt register; honour this bit
> rather than letting any code write to the register.
>
> Signed-off-by: Michael Davidsaver
> [PMM: T
From: Marc-André Lureau
This shortens the code a bit.
Signed-off-by: Marc-André Lureau
Reviewed-by: Eric Blake
Signed-off-by: Paolo Bonzini
---
qemu-char.c | 95 +++--
1 file changed, 29 insertions(+), 66 deletions(-)
diff --git a/qemu
From: Marc-André Lureau
Signed-off-by: Marc-André Lureau
Reviewed-by: Eric Blake
Signed-off-by: Paolo Bonzini
---
include/sysemu/char.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/include/sysemu/char.h b/include/sysemu/char.h
index 0a14942..b6e3618 100644
--- a/include/sysemu/char.h
From: Marc-André Lureau
Signed-off-by: Marc-André Lureau
Reviewed-by: Eric Blake
Signed-off-by: Paolo Bonzini
---
backends/baum.c | 16
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/backends/baum.c b/backends/baum.c
index 23d3c4a..8842936 100644
--- a/backends
Artyom Tarasenko writes:
> On Thu, Jan 26, 2017 at 8:35 AM, Markus Armbruster wrote:
>> niagara_init() does something naughty, which conflicts with Max's
>> "[PATCH v6 0/9] block: Drop BDS.filename". Details inline.
>>
>> Artyom Tarasenko writes:
>>
>>> Remove the Niagara stub implementation f
From: Marc-André Lureau
Rename the types to follow the name of the chardev kind.
- socket: TCPChardev -> SocketChardev
- udp: NetChardev -> UdpChardev
Signed-off-by: Marc-André Lureau
Reviewed-by: Eric Blake
Signed-off-by: Paolo Bonzini
---
qemu-char.c | 74 ++
From: Marc-André Lureau
I am pretty sure that's the word Fabrice Bellard intended to write.
Signed-off-by: Marc-André Lureau
Reviewed-by: Eric Blake
Signed-off-by: Paolo Bonzini
---
qemu-options.hx | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/qemu-options.hx b/qemu-opt
From: Marc-André Lureau
Use a single allocation for CharDriverState, this avoids extra
allocations & pointers, and is a step towards more object-oriented
CharDriver.
Gtk console is a bit peculiar, gd_vc_chr_set_echo() used to have a
temporary VirtualConsole to save the echo bit. Instead now, we
On 27 January 2017 at 14:11, Alex Bennée wrote:
>
> Peter Maydell writes:
>
>> Add a comment documenting the memory map of the SoC devices and which
>> are not implemented.
>>
>> Signed-off-by: Peter Maydell
>> ---
>> hw/arm/stellaris.c | 31 +++
>> 1 file changed, 3
From: Marc-André Lureau
Turn Chardev into Object.
qemu_chr_alloc() is replaced by the qemu_chardev_new() constructor. It
will call qemu_char_open() to open/intialize the chardev with the
ChardevCommon *backend settings.
The CharDriver::create() callback is turned into a ChardevClass::open()
whi
From: Marc-André Lureau
test.char.exe fails to link:
qemu-char.o: In function `win_chr_free':
/home/elmarco/src/qemu/qemu-char.c:2149: undefined reference to
`qemu_del_polling_cb'
/home/elmarco/src/qemu/qemu-char.c:2151: undefined reference to
`qemu_del_polling_cb'
qemu-char.o: In function `win
From: Marc-André Lureau
vc_chr_write() is more appropriate than _puts() since no newline is
appended, even though it's not used only as a callback.
Keep "qemu_chr_parse" prefix, most chardev parse functions use this
prefix atm.
Signed-off-by: Marc-André Lureau
Reviewed-by: Eric Blake
Signed-o
On 27/01/2017 15:06, Markus Armbruster wrote:
>> Is rom_add_file_fixed supposed to mark the memory region read-only? Or
>> should it be created read-only before calling rom_add_file_fixed?
> I'm not familiar with the memory API, but the fact that you're getting
> RW suggests that you need to mark
On 12 January 2017 at 11:36, Andrew Jones wrote:
> On Thu, Jan 12, 2017 at 10:42:41AM +, Peter Maydell wrote:
>> Thanks for the patch. I haven't checked against the pflash spec yet,
>> but this looks like it's probably the right thing.
>>
>> The only two machines which use a setup with multipl
Peter Maydell writes:
> For M profile (unlike A profile) the reset value of R14 is specified
> as 0x. (The rationale is that this is an illegal exception
> return value, so if guest code tries to return to it it will result
> in a helpful exception.)
>
> Registers r0 to r12 and the flag
Peter Maydell writes:
> Use the 'unimplemented' dummy device to cover regions of the
> SoC device memory map which we don't have proper device
> implementations for yet.
>
> Signed-off-by: Peter Maydell
Looks good although I couldn't find any Stellaris images to test with so
I take the actual
On 26 January 2017 at 11:03, Cornelia Huck wrote:
> The following changes since commit c7f1cf01b8245762ca5864e835d84f6677ae8b1f:
>
> Merge remote-tracking branch 'remotes/gkurz/tags/for-upstream' into staging
> (2017-01-25 17:54:14 +)
>
> are available in the git repository at:
>
> git://
Peter Maydell writes:
> From: Michael Davidsaver
>
> For M profile CPUs, FAULTMASK should be 0 on reset, like PRIMASK.
> QEMU stores FAULTMASK in the PSTATE F bit, so (as with PRIMASK in the
> I bit) we have to clear these to undo the A profile default of 1.
>
> Update the comment accordingly a
On Thu, 26 Jan 2017 14:43:04 +0100
Phil Dennis-Jordan wrote:
> On 23 January 2017 at 12:12, Igor Mammedov wrote:
> >> For reference, my approach to filling out the Xdsdt/Xfacs fields in
> >> build_fadt() is essentially the same as for the 32-bit variants from
> >> rev1:
> >>
> >> unsigned xfacs_
On 26 January 2017 at 10:27, Daniel P. Berrange wrote:
> The following changes since commit c7f1cf01b8245762ca5864e835d84f6677ae8b1f:
>
> Merge remote-tracking branch 'remotes/gkurz/tags/for-upstream' into staging
> (2017-01-25 17:54:14 +)
>
> are available in the git repository at:
>
> g
On 01/27/2017 04:00 AM, Stefan Hajnoczi wrote:
> Code added in commit 6349c15410361d3fe52c9beee309954d606f8ccd ("block/gluster:
> memory usage: use one glfs instance per volume") does not follow conventions
> and violates QEMU coding style. Although any single issue in isolation is not
> worth pat
Kirill Batuzov writes:
> To be able to generate vector operations in a TCG backend we need to do
> several things.
>
> 1. We need to tell the register allocator about vector target's register.
>In case of x86 we'll use xmm0..xmm7. xmm7 is designated as a scratch
>register, others can be
Dou Liyang writes:
> At the Qemu initialization, we call the cpu_synchronize_all_post_init()
> to synchronize All CPU states to KVM in the ./vl.c::main().
>
> Currently, it is called before we initialize the CPUs, which created by
> "-device" command, So, these CPUs may be ignored to synchronize
On Fri, Jan 27, 2017 at 3:27 PM, Paolo Bonzini wrote:
>
>
> On 27/01/2017 15:06, Markus Armbruster wrote:
>>> Is rom_add_file_fixed supposed to mark the memory region read-only? Or
>>> should it be created read-only before calling rom_add_file_fixed?
>> I'm not familiar with the memory API, but th
On 27 January 2017 at 14:33, Alex Bennée wrote:
> Is there any millage at being able to define areas on the command line
> or would we expect every usage of this to be from a board file in the
> source?
Command line syntax is for life, not just for Christmas, so
I'd rather we didn't add any until
Peter Maydell writes:
> Add a comment documenting the memory map of the SoC devices and which
> are not implemented.
>
> Signed-off-by: Peter Maydell
> ---
> hw/arm/stellaris.c | 31 +++
> 1 file changed, 31 insertions(+)
>
> diff --git a/hw/arm/stellaris.c b/hw/arm
Kirill Batuzov writes:
> The goal of these patch series is to set up an infrastructure to emulate
> guest vector operations using host vector operations. Preliminary
> experiments show that simply translating loads and stores increases
> performance of x264 video codec by 10%. The performance of
On 27 January 2017 at 14:31, Peter Maydell wrote:
> On 12 January 2017 at 11:36, Andrew Jones wrote:
>> On Thu, Jan 12, 2017 at 10:42:41AM +, Peter Maydell wrote:
>>> Thanks for the patch. I haven't checked against the pflash spec yet,
>>> but this looks like it's probably the right thing.
>>
On Thu, Jan 26, 2017 at 08:59:04PM +0200, Michael S. Tsirkin wrote:
> On Thu, Jan 26, 2017 at 07:25:22PM +0100, Laszlo Ersek wrote:
> > On 01/26/17 19:15, Michael S. Tsirkin wrote:
> > > On Thu, Jan 26, 2017 at 06:43:22PM +0100, Laszlo Ersek wrote:
> > >> On 01/26/17 16:20, Michael S. Tsirkin wrote
The "or-irq" device is just used internally. It's strange to
see this device showing up in the "-device ?" help text. Let's mark it
with cannot_instantiate_with_device_add_yet to hide it from the users.
Signed-off-by: Thomas Huth
---
hw/core/or-irq.c | 3 +++
1 file changed, 3 insertions(+)
dif
On 01/27/2017 06:51 AM, Markus Armbruster wrote:
> John Snow writes:
>
>> On 01/26/2017 10:09 AM, Markus Armbruster wrote:
>>> We've traditionally rejected orphans here and there, but not
>>> systematically. For instance, the sun4m machines have an onboard SCSI
>>> HBA (bus=0), and have always
Peter Maydell writes:
> Create a new "unimplemented" sysbus device, which simply accepts
> all read and write accesses, and implements them as read-as-zero,
> write-ignored, with logging of the access as LOG_UNIMP.
>
> This is useful for stubbing out bits of an SoC or board model
> which haven't
On Fri, Jan 27, 2017 at 02:54:20PM +, Peter Maydell wrote:
> On 27 January 2017 at 14:31, Peter Maydell wrote:
> > On 12 January 2017 at 11:36, Andrew Jones wrote:
> >> On Thu, Jan 12, 2017 at 10:42:41AM +, Peter Maydell wrote:
> >>> Thanks for the patch. I haven't checked against the pfl
The "qemu,register" device is just used internally. It's strange to
see this device showing up in the "-device ?" help text. Let's mark it
with cannot_instantiate_with_device_add_yet to hide it from the users.
Signed-off-by: Thomas Huth
---
hw/core/register.c | 9 +
1 file changed, 9 ins
Yep, this works great for the SS-20 ROM (tested with SS-5 ROM also).
Boots all the way to OS (have to use -nographic but that's fine).
Thanks!
--
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
https://bugs.launchpad.net/bugs/1622547
Ti
On 27 January 2017 at 12:05, P J P wrote:
> From: Prasad J Pandit
>
> When setting dma channel 'data_type', if (value & 3) == 3,
> the set 'data_type' is said to be bad. This also leads to an
> OOB access in 'omap_dma_transfer_generic', while doing
> cpu_physical_memory_r/w operations. Add check
On 01/27/17 15:18, Kevin O'Connor wrote:
> On Thu, Jan 26, 2017 at 08:59:04PM +0200, Michael S. Tsirkin wrote:
>> On Thu, Jan 26, 2017 at 07:25:22PM +0100, Laszlo Ersek wrote:
>>> On 01/26/17 19:15, Michael S. Tsirkin wrote:
On Thu, Jan 26, 2017 at 06:43:22PM +0100, Laszlo Ersek wrote:
> O
Hi Artyom,
On 01/23/2017 03:10 PM, Artyom Tarasenko wrote:
> On Mon, Jan 23, 2017 at 1:40 PM, Peter Maydell
> wrote:
>> On 18 January 2017 at 22:38, Artyom Tarasenko wrote:
>>> Remove the Niagara stub implementation from sun4u.c and add a machine,
>>> compatible with Legion simulator from the O
On 26 January 2017 at 16:15, Michael S. Tsirkin wrote:
> The following changes since commit ae5045ae5b2bbd8ce1335d1b05f9ecacca83a6cf:
>
> Merge remote-tracking branch 'remotes/rth/tags/pull-nios-20170124' into
> staging (2017-01-25 13:30:23 +)
>
> are available in the git repository at:
>
>
Fix a broken expression in the calculation of ELRSR
register bits: instead of "(lr & ICH_LR_EL2_HW) == 1"
we want to check for != 0, because the HW bit is not
bit 0 so a test for == 1 is always false.
Fixes: https://bugs.launchpad.net/bugs/1658506
Signed-off-by: Peter Maydell
Reviewed-by: Thomas
From: Prasad J Pandit
When setting dma channel 'data_type', if (value & 3) == 3,
the set 'data_type' is said to be bad. This also leads to an
OOB access in 'omap_dma_transfer_generic', while doing
cpu_physical_memory_r/w operations. Add check to avoid it.
Reported-by: Jiang Xin
Signed-off-by: P
in the git repository at:
git://git.linaro.org/people/pmaydell/qemu-arm.git
tags/pull-target-arm-20170127
for you to fetch changes up to 146871c33eb70ca7090a0a55e69e5a8f9b5eb102:
dma: omap: check dma channel data_type (2017-01-27 15:2
The frame_size local variable in exynos4210_uart_update_parameters()
is calculated but never used (and has been this way since the
device was introduced in commit e5a4914efc7). The qemu_chr_fe_ioctl()
doesn't need this information (if it really wanted it it could
calculate it from the parity/data_b
From: Michael Davidsaver
When the guest attempts to start an MII register
access via the MCTL register, clear the START bit,
so that when the guest reads it back the register
transaction will be signalled as having completed.
This avoids the guest spinning as it polls the
START bit waiting for it
For M profile (unlike A profile) the reset value of R14 is specified
as 0x. (The rationale is that this is an illegal exception
return value, so if guest code tries to return to it it will result
in a helpful exception.)
Registers r0 to r12 and the flags are architecturally UNKNOWN on
res
From: Michael Davidsaver
The CCR.USERSETMPEND bit has to be set to permit unprivileged code to
write to the Software Triggered Interrupt register; honour this bit
rather than letting any code write to the register.
Signed-off-by: Michael Davidsaver
Reviewed-by: Alex Bennée
Message-id: 14852853
From: Michael Davidsaver
The CCR.STACKALIGN bit controls whether the CPU is supposed to force
8-alignment of the stack pointer on entry to the exception handler.
Signed-off-by: Michael Davidsaver
Message-id: 1485285380-10565-6-git-send-email-peter.mayd...@linaro.org
[PMM: commit message and com
From: Michael Davidsaver
Give an explicit error and abort when a load
from the vector table fails. Architecturally this
should HardFault (which will then immediately
fail to load the HardFault vector and go into Lockup).
Since we don't model Lockup, just report this guest
error via cpu_abort(). T
Add the structure fields, VMState fields, reset code and macros for
the v7M system control registers CCR, CFSR, HFSR, DFSR, MMFAR and
BFAR.
Signed-off-by: Peter Maydell
Reviewed-by: Alex Bennée
Message-id: 1485285380-10565-4-git-send-email-peter.mayd...@linaro.org
---
target/arm/cpu.h | 54
From: Michael Davidsaver
When we take an exception for an undefined instruction, set the
appropriate CFSR bit.
Signed-off-by: Michael Davidsaver
Reviewed-by: Alex Bennée
Message-id: 1485285380-10565-7-git-send-email-peter.mayd...@linaro.org
[PMM: tweaked commit message, comment]
Signed-off-by:
From: Michael Davidsaver
For M profile CPUs, FAULTMASK should be 0 on reset, like PRIMASK.
QEMU stores FAULTMASK in the PSTATE F bit, so (as with PRIMASK in the
I bit) we have to clear these to undo the A profile default of 1.
Update the comment accordingly and move it so that it's closer to the
From: Michael Davidsaver
Implement the v7M system registers CCR, CFSR, HFSR, DFSR, BFAR and
MMFAR. For the moment these simply read as written (with some basic
handling of RAZ/WI bits and W1C semantics).
Signed-off-by: Michael Davidsaver
Reviewed-by: Alex Bennée
Message-id: 1485285380-10565-5
For configurations of the pflash_cfi01 device which set it up with a
device-width not equal to the width (ie where we are emulating
multiple narrow flash devices wired up in parallel), we were giving
incorrect values in the CFI data table:
(1) the sector length entry should specify the sector leng
From: Cédric Le Goater
When doing fast read, a certain amount of dummy bytes should be sent
before the read. This number is configurable in the controler CE0
Control Register and needs to be modeled using fake transfers to the
flash module.
This only supports command mode. User mode requires mor
hw/register.h provides macros like FIELD which make it easy to define
shift, mask and length constants for the fields within a register.
Unfortunately register.h also includes a lot of other things, some
of which will only compile in the softmmu build.
Pull the FIELD macro and friends out into a s
From: Michael Davidsaver
For v7m we need to catch attempts to execute from special
addresses at 0xfff0 and above. Previously we did this
with the aid of a hacky special purpose lump of memory
in the address space and a check in translate.c for whether
we were translating code at those address
We only use the IS_M() macro in two places, and it's a bit of a
namespace grab to put in cpu.h. Drop it in favour of just explicitly
calling arm_feature() in the places where it was used.
Signed-off-by: Peter Maydell
Reviewed-by: Alex Bennée
Message-id: 1485285380-10565-2-git-send-email-peter.m
From: Michael Davidsaver
Many NVIC operations access the CPU state, so store a pointer in
struct nvic_state rather than fetching it via qemu_get_cpu() every
time we need it.
As with the arm_gicv3_common code, we currently just call
qemu_get_cpu() in the NVIC's realize method, but in future we mi
Make it easy to unregister a MemoryListener without tracking whether it
had been registered before.
Signed-off-by: Paolo Bonzini
---
v3: new
memory.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/memory.c b/memory.c
index 2bfc37f..8fafd4c 100644
--- a/memory.c
+++ b/memory.c
This makes little difference, but it makes the code change smaller
for the next patch that introduces MemoryRegionCache. This is
because map/unmap are similar to MemoryRegionCache init/destroy.
Reviewed-by: Stefan Hajnoczi
Signed-off-by: Paolo Bonzini
---
v3: "goto done" when a descript
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