On 27/12/2016 21:13, James J. Nutaro wrote:
> +(1) Create two pairs of pipes with the Linux pipe function.
> +The code segment that does this might look like
> +
> + int pipefd1[2];
> + int pipefd2[2];
> + pipe(pipefd1);
> + pipe(pipefd2);
> +
> +(2) Fork QEMU with the
** Changed in: qemu
Status: New => Confirmed
** Changed in: qemu
Importance: Undecided => Wishlist
** Summary changed:
- Cannot TRIM with VirtIO
+ VirtIO does not support TRIM
** Summary changed:
- VirtIO does not support TRIM
+ Virtio-blk does not support TRIM
--
You received this
Am 23.12.2016 um 03:50 schrieb Li, Liang Z:
While measuring live migration performance for qemu/kvm guest, it was
observed that the qemu doesn’t maintain any intelligence for the guest ram
pages released by the guest balloon driver and treat such pages as any other
normal guest ram pages. This ha
On 29/12/2016 13:19, Zhang Qian wrote:
> From c2f1631132821d61e1942a8723ba596f91d3e672 Mon Sep 17 00:00:00 2001
> From: Zhang Qian
> Date: Thu, 29 Dec 2016 20:00:01 +0800
> Subject: [PATCH] scsi-disk: fix crash on VERIFY command Commit 166dbda
> "scsi-disk: fix VERIFY for scsi-block" add a proc
On 21/12/2016 23:17, Felipe Franciosi wrote:
> To use it, one must configure Qemu with --enable-vhost-user-scsi and
> start Qemu with a command line equivalent to:
>
> qemu-system-x86_64 \
>-chardev socket,id=vus0,path=/tmp/vus.sock \
>-device vhost-user-scsi-pci,chardev=vus0,bus
On 12/12/2016 23:42, Marc-André Lureau wrote:
>
> Note: this series has been tested with Linux and cross-building with
> mingw. It mostly breaks on other platforms,
What breaks exactly?
Paolo
> help welcome for
> testing. I'd also like to write more chardev backend tests to ensure
> no regres
Le 27/12/2016 à 14:58, Thomas Huth a écrit :
> Am Tue, 27 Dec 2016 12:52:30 +0100
> schrieb Laurent Vivier :
>
>> Le 20/12/2016 à 15:32, Thomas Huth a écrit :
>>> You can get an empty machine with "-M none" nowadays, so the
>>> m68k dummy board (introduced in 2007) seems to be pretty
>>> redundant
hello.
I got problem using QEMU.
when i turn on virtual machine,
this message was shown,
virsh: error while loading shared libraries: libapparmor.so.1: cannot open
shared object file: No such file or directory
I have no idea about libapparmor.
What should I do?
Currently, the cmpxchg implementation tests whether the destination address
is readable:
- if it is, we read the value and continue with the comparison
- if isn't, i.e. access to addr would segfault, we assume that src != dest
rather than queuing a SIGSEGV.
The same problem exists in the c
Hello,
On Fri, 23 Dec 2016 17:29:28 +0100
Paolo Bonzini wrote:
> On 23/12/2016 16:12, Michal Suchanek wrote:
> > This copies the timer hack from ui/console.c kbd_send_chars to
> > ui/gtk.c gd_vc_in.
> >
> > There is no fd-like object to peek repatedly so the paste data is
> > saved in a free-fl
Hi
- Original Message -
> On 12/12/2016 04:42 PM, Marc-André Lureau wrote:
> > Number and kinds of backends is known at compile-time, use a fixed-sized
> > static array to simplify iterations & lookups.
> >
> > Signed-off-by: Marc-André Lureau
> > ---
> > qemu-char.c | 101
> >
- Original Message -
> On 12/12/2016 04:42 PM, Marc-André Lureau wrote:
> > This shorten a bit the code.
>
> Grammar:
> This shortens the code a bit.
>
> >
> > Signed-off-by: Marc-André Lureau
> > ---
> > qemu-char.c | 97
> > -
hi
- Original Message -
> On 12/12/2016 04:42 PM, Marc-André Lureau wrote:
> > This makes the code more declarative, and avoids to duplicate the
>
> s/to duplicate/duplicating/
ok
>
> > information on all instances.
> >
> > Signed-off-by: Marc-André Lureau
> > ---
> > backends/baum.
- Original Message -
> On 12/12/2016 04:42 PM, Marc-André Lureau wrote:
> > No need to allocate & copy fileds, let's use static const struct
>
> s/fileds/fields/
>
ok
> > instead.
> >
> > Signed-off-by: Marc-André Lureau
> > ---
> > backends/baum.c | 8 +++-
> > backends/ms
Do it by adding 'id' property to hostmem backends and fetch it
in query-memdev from object directly.
Signed-off-by: Igor Mammedov
---
include/qom/object_interfaces.h | 2 +-
include/sysemu/hostmem.h| 1 +
backends/hostmem.c | 26 ++
docs/qmp-command
Signed-off-by: Igor Mammedov
---
qom/object_interfaces.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/qom/object_interfaces.c b/qom/object_interfaces.c
index ded4d84..4b880d0 100644
--- a/qom/object_interfaces.c
+++ b/qom/object_interfaces.c
@@ -3,7 +3,6 @@
#include "qom/object_interfaces.
Series is a couple of preparratory cleanups which simplify fix
and a fix itself.
Before fix HMP 'info memdevs' for CLI:
qemu-system-x86_64 -object memory-backend-ram,id=mem0,size=1G
outputs:
memory backend: 0
size: 1073741824
merge: true
dump: true
prealloc: false
policy: d
Simplify code by dropping ~57LOC by merging user_creatable_add()
into user_creatable_add_opts() and using the later from monutor.
Along with it allocate opts_visitor_new() once in user_creatable_add_opts().
As result we have one less API func and a more readable/simple
user_creatable_add_opts() vs
Hello Marcin,
On 12/05/2016 04:33 PM, mar.krzeminski wrote:
>
>
> W dniu 05.12.2016 o 15:07, Cédric Le Goater pisze:
>> On 12/04/2016 05:31 PM, mar.krzeminski wrote:
>>> Hi Cedric,
>>>
>>> Since there is no public datasheet user guide for SMC I would ask some
>>> question
>>> regarding HW itsel
On 30/12/2016 15:33, Igor Mammedov wrote:
> 'hotplugged' propperty is meant to be used on migration side when migrating
> source with hotplugged devices.
> However though it not exacly correct usage of 'hotplugged' property
> it's possible to set generic hotplugged property for CPU using
> -cpu
On 01/01/2017 11:34, Peter Xu wrote:
> run_tests.sh is getting slower. Maybe it's time to let it run faster.
> An obvious issue is that, we were running the tests sequentially in
> the past.
>
> This series provides another new "-j" parameter. "-j 8" means we run
> the tests on 8 task queues. Th
Hello Cedric,
W dniu 02.01.2017 o 16:56, Cédric Le Goater pisze:
Hello Marcin,
On 12/05/2016 04:33 PM, mar.krzeminski wrote:
W dniu 05.12.2016 o 15:07, Cédric Le Goater pisze:
On 12/04/2016 05:31 PM, mar.krzeminski wrote:
Hi Cedric,
Since there is no public datasheet user guide for SMC I w
On 01/02/2017 06:33 PM, mar.krzeminski wrote:
> Hello Cedric,
>
> W dniu 02.01.2017 o 16:56, Cédric Le Goater pisze:
>> Hello Marcin,
>>
>> On 12/05/2016 04:33 PM, mar.krzeminski wrote:
>>>
>>> W dniu 05.12.2016 o 15:07, Cédric Le Goater pisze:
On 12/04/2016 05:31 PM, mar.krzeminski wrote:
>>
W dniu 02.01.2017 o 19:02, Cédric Le Goater pisze:
On 01/02/2017 06:33 PM, mar.krzeminski wrote:
Hello Cedric,
W dniu 02.01.2017 o 16:56, Cédric Le Goater pisze:
Hello Marcin,
On 12/05/2016 04:33 PM, mar.krzeminski wrote:
W dniu 05.12.2016 o 15:07, Cédric Le Goater pisze:
On 12/04/2016 05
> On 2 Jan 2017, at 10:25, Paolo Bonzini wrote:
>
>
>
> On 21/12/2016 23:17, Felipe Franciosi wrote:
>> To use it, one must configure Qemu with --enable-vhost-user-scsi and
>> start Qemu with a command line equivalent to:
>>
>> qemu-system-x86_64 \
>> -chardev socket,id=vus0,path=/tmp/v
The recent patch enabling lock assertions uncovered the missing lock
acquisition in cpu_exec_step(). This patch adds them.
CC: Richard Henderson
CC: Alex Bennée
Signed-off-by: Pranith Kumar
---
cpu-exec.c | 4
1 file changed, 4 insertions(+)
diff --git a/cpu-exec.c b/cpu-exec.c
index aa8
On 01/01/2017 17:55, Rui Carmo wrote:
Hey there. Will git tip from September do? At that time I built QEMU on
Ubuntu 16.04.1, pointed my Mac (10.10) at it again and had the same
experience (had to use a third-party client)
Considering I opened this four years ago, I'm kind of surprised it's
stil
Well, I understand that since they do their own encoding (hence the need
for a different protocol number for their stuff to talk to each other),
but I don't think that's the whole thing, since I don't get any updates
from the server, and the VNC spec (IIRC) allowed for negotiating a
common version
v2:
- all Igor's suggestions
- added four mach-virt acpi cleanup patches
- added the remaining two acpi patches needed to bring equivalence
to Peter's DT changes
This series is based on Peter's qemu-arm gicv3-virt branch. It's
main goal (patches 07-13), which was suggested by Eduardo, is to
Some simple cleanups made possible by "hw/arm/virt: Merge
VirtBoardInfo and VirtMachineState"
Signed-off-by: Andrew Jones
Reviewed-by: Igor Mammedov
Acked-by: Michael S. Tsirkin
---
hw/arm/virt.c | 19 +--
1 file changed, 9 insertions(+), 10 deletions(-)
diff --git a/hw/arm/vi
Also remove all unused flags.
Signed-off-by: Andrew Jones
---
hw/arm/virt-acpi-build.c| 10 +-
include/hw/acpi/acpi-defs.h | 17 ++---
2 files changed, 7 insertions(+), 20 deletions(-)
diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c
index 0ed406cdd89c..b
Signed-off-by: Andrew Jones
---
hw/arm/virt-acpi-build.c | 27 ++-
1 file changed, 14 insertions(+), 13 deletions(-)
diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c
index d4160dfa7d34..f4b43562287a 100644
--- a/hw/arm/virt-acpi-build.c
+++ b/hw/arm/virt-a
Signed-off-by: Andrew Jones
---
hw/arm/virt-acpi-build.c| 4 ++--
include/hw/acpi/acpi-defs.h | 6 ++
2 files changed, 4 insertions(+), 6 deletions(-)
diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c
index b6b64296f119..a6c6180f4bce 100644
--- a/hw/arm/virt-acpi-build.c
+
machvirt_init may need to probe for the gic version. If so, then
make sure the result is written to VirtMachineState. With the
state up to date, use it instead of a local variable. This is a
cleanup that prepares for VirtMachineState to be passed to functions
even outside hw/arm/virt.c
Signed-off-
Also move the enabled flag definition from mach-virt code to
acpi common.
Signed-off-by: Andrew Jones
---
hw/arm/virt-acpi-build.c | 8
include/hw/acpi/acpi-defs.h | 9 ++---
include/hw/arm/virt-acpi-build.h | 2 --
3 files changed, 10 insertions(+), 9 deletions(-)
dif
Signed-off-by: Andrew Jones
---
hw/arm/virt-acpi-build.c | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c
index b5e17a680d51..7c00ee683f44 100644
--- a/hw/arm/virt-acpi-build.c
+++ b/hw/arm/virt-acpi-build.c
@@ -6
Instead of allocating a new struct just for VirtGuestInfo and the
machine_done Notifier, place them inside VirtMachineState. This
is the mach-virt equivalent of "pc: Eliminate struct
PcGuestInfoState"
Suggested-by: Eduardo Habkost
Signed-off-by: Andrew Jones
Reviewed-by: Igor Mammedov
Acked-by:
When virtualization is enabled and we have a v3 gic, then we add
the vgic maintenance interrupt to the DT. This patch is the ACPI
equivalent.
Signed-off-by: Andrew Jones
---
hw/arm/virt-acpi-build.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acp
In preparation to share more Virt machine state than just guest-info
with other mach-virt source files, move the State and Class structures
to virt.h
Signed-off-by: Andrew Jones
Reviewed-by: Igor Mammedov
Acked-by: Michael S. Tsirkin
---
hw/arm/virt.c | 52 +++--
Only two functions take VirtGuestInfo parameters. Now that guest-info
is part of VirtMachineState, and VirtMachineState is defined in the
virt header, pass that instead.
Signed-off-by: Andrew Jones
Reviewed-by: Igor Mammedov
Acked-by: Michael S. Tsirkin
---
hw/arm/virt-acpi-build.c | 3 ++-
hw
include/hw/arm/virt-acpi-build.h is only used for VirtGuestInfo,
which doesn't even necessarily have to be ACPI specific. Move
VirtGuestInfo to include/hw/arm/virt.h, allowing us to remove
include/hw/arm/virt-acpi-build.h, and to prepare for even more
code motion.
Signed-off-by: Andrew Jones
Revi
2017-01-01 18:34+0800, Peter Xu:
> run_task.sh is getting slow. This patch is trying to make it faster by
> running the tests concurrently.
>
> First of all, we provide a new parameter "-j" for the run_tests.sh,
> which can be used to specify how many run queues we want for the tests.
> When "-j"
Now that we pass VirtMachineState, and guest-info is just part of
that state, we can remove all the redundant members and access
the VirtMachineState directly.
Signed-off-by: Andrew Jones
Reviewed-by: Igor Mammedov
Acked-by: Michael S. Tsirkin
---
hw/arm/virt-acpi-build.c | 72
We can get to VirtMachineState without the need for saving a pointer
on AcpiBuildState. This is the mach-virt equivalent to "acpi: Don't save
PcGuestInfo on AcpiBuildState"
Signed-off-by: Andrew Jones
Acked-by: Michael S. Tsirkin
---
hw/arm/virt-acpi-build.c | 5 +
1 file changed, 1 inserti
by moving VirtGuestInfo.fw_cfg to VirtMachineState. This is the
mach-virt equivalent of "pc: Move PcGuestInfo.fw_cfg to
PCMachineState" and "pc: Eliminate PcGuestInfo struct" combined.
Signed-off-by: Andrew Jones
Acked-by: Michael S. Tsirkin
---
hw/arm/virt-acpi-build.c | 7 +++
hw/arm/vir
2017-01-02 18:07+0100, Paolo Bonzini:
> On 01/01/2017 11:34, Peter Xu wrote:
>> run_tests.sh is getting slower. Maybe it's time to let it run faster.
>> An obvious issue is that, we were running the tests sequentially in
>> the past.
>>
>> This series provides another new "-j" parameter. "-j 8" me
This is the ACPI equivalent to "hw/arm/virt: Don't incorrectly claim
architectural timer to be edge-triggered" which fixes the DT for
machine types 2.9 and later.
Signed-off-by: Andrew Jones
Acked-by: Michael S. Tsirkin
---
hw/arm/virt-acpi-build.c| 20 ++--
include/hw/acpi/
The i.MX SPI device was not de-asserting the CS line at the end of
memory access.
This triggered a SIGSEGV in Qemu when the sabrelite emulator was acessing
a SPI flash memory.
Whit this path the CS signal is correctly asserted and deasserted arround
memory access.
This was tested by:
* booting l
>From the documentation it is not clear what this SPI register is about.
Moreover, neither linux driver nor xvisor driver are using this SPI register.
For now we just remove it and issue a log on register write access.
Signed-off-by: Jean-Christophe Dubois
---
hw/ssi/imx_spi.c | 11 ---
Hi,
Your series seems to have some coding style problems. See output below for
more information:
Subject: [Qemu-devel] [PATCH] [i.MX] Remove MSGDATA register support.
Message-id: 20170102205536.4151-1-...@tribudubois.net
Type: series
=== TEST SCRIPT BEGIN ===
#!/bin/bash
BASE=base
n=1
total=$(g
Hi,
Your series seems to have some coding style problems. See output below for
more information:
Subject: [Qemu-devel] [PATCH] [i.MX] fix CS handling during SPI access.
Message-id: 20170102205521.4101-1-...@tribudubois.net
Type: series
=== TEST SCRIPT BEGIN ===
#!/bin/bash
BASE=base
n=1
total=$
The i.MX SPI device was not de-asserting the CS line at the end of
memory access.
This triggered a SIGSEGV in Qemu when the sabrelite emulator was acessing
a SPI flash memory.
Whit this path the CS signal is correctly asserted and deasserted arround
memory access.
This was tested by:
* booting l
>From the documentation it is not clear what this SPI register is about.
Moreover, neither linux driver nor xvisor driver are using this SPI register.
For now we just remove it and issue a log on register write access.
Signed-off-by: Jean-Christophe Dubois
---
Changes since v1:
* Fix coding st
Le 30/12/2016 à 19:09, mar.krzeminski a écrit :
Can you check spi controller model code?
I'll double check.
But why is the SPI memory/device even responding if CS is not set ?
Looking at ssi code it should not.
Flash (so the m25p80) is responding when CS line is low and it seem
that this is
Hi
I am trying to understand how QEMU threads respond to set a vCPU online or
offline.
Specifically, what happens to QEMU thread if in the guest, we execute:
echo 0 > /sys/devices/system/cpu/cpu1/online
Is the corresponding QEMU thread paused?
Thank you
Ozgur Ozan Kilic
There is no need to change the protocol version itself to use new
encoding, there are provisions for that in the existing one.
IIRC the problem was also that each party was waiting for the other one
to send data after the protocol version exchange, but that was 5y ago.
Yes it should be possible
On Thu, Dec 22, 2016 at 04:22:11PM +1100, Alexey Kardashevskiy wrote:
> getrampagesize() returns the largest supported page size and mainly
> used to know if huge pages are enabled.
>
> However is implemented in target-ppc/kvm.c and not available
> in TCG or other architectures.
>
> This renames
On Sat, Dec 31, 2016 at 09:18:31AM +0800, xiaoqiang zhao wrote:
> Drop the old and empty SysBus init
>
> Signed-off-by: xiaoqiang zhao
This should also actually remove the empty function.
> ---
> hw/ppc/spapr_vio.c | 2 --
> 1 file changed, 2 deletions(-)
>
> diff --git a/hw/ppc/spapr_vio.c b
On Thu, Dec 29, 2016 at 11:12:14PM +0100, Hervé Poussineau wrote:
> Part of the functionality is copied from hw/ppc/prep.c.
> Also add support for board identification/equipment registers.
Needs more detail in the commit message. What is system I/O? what is
it for?
The 1-line summary is also mi
On Thu, Dec 29, 2016 at 11:12:12PM +0100, Hervé Poussineau wrote:
> VGA device registers vram as BAR 0. If this BAR is activated as a very low
> address which
> crosses 0xa-0xb, low memory region is not accessible anymore.
>
> This fixes display on PReP machine if we enable PCI mapping at
On Thu, Dec 29, 2016 at 11:12:11PM +0100, Hervé Poussineau wrote:
> This is in fact a split of pci_vga_init() function in two parts.
>
> Signed-off-by: Hervé Poussineau
Reviewed-by: David Gibson
I think it needs Michael or someone to merge it though.
> ---
> hw/pci/pci.c | 22 +++
On Thu, Dec 22, 2016 at 04:22:12PM +1100, Alexey Kardashevskiy wrote:
> On sPAPR, IOMMU page size varies and if QEMU is running with RAM
> backed with hugepages, we can advertise this to the guest so does
> this patch.
>
> Signed-off-by: Alexey Kardashevskiy
> ---
> hw/ppc/spapr_pci.c | 3 +++
>
On Sat, Dec 31, 2016 at 09:18:27AM +0800, xiaoqiang zhao wrote:
> This is some QOM'ify work relate with ppc.
> See each commit message for details.
>
> xiaoqiang zhao (4):
> hw/gpio: QOM'ify mpc8xxx.c
> hw/ppc: QOM'ify e500.c
> hw/ppc: QOM'ify ppce500_spin.c
> hw/ppc: QOM'ify spapr_vio.c
>
On Mon, Dec 19, 2016 at 02:47:39PM -0200, Jose Ricardo Ziviani wrote:
> This commit implements functions to right and left shifts and the
> unittest for them. Such functions is needed due to instructions
> that requires them.
>
> Today, there is already a right shift implementation in int128.h
> b
On Mon, Dec 19, 2016 at 02:47:40PM -0200, Jose Ricardo Ziviani wrote:
> bcds.: Decimal shift. Given two registers vra and vrb, this instruction
> shift the vrb value by vra bits into the result register.
>
> Signed-off-by: Jose Ricardo Ziviani
> ---
> target-ppc/helper.h | 1 +
>
If currently gcrypt/nettle doesn't support AEAD alg, then
we should implement some no-op funcs.
Signed-off-by: Longpeng(Mike)
---
crypto/aead.c | 44 ++--
1 file changed, 42 insertions(+), 2 deletions(-)
diff --git a/crypto/aead.c b/crypto/aead.c
index 47
This patch add gcrypt-backed AEAD algorithms support
Signed-off-by: Longpeng(Mike)
---
crypto/aead-gcrypt.c | 173 +--
1 file changed, 167 insertions(+), 6 deletions(-)
diff --git a/crypto/aead-gcrypt.c b/crypto/aead-gcrypt.c
index 9465518..9892e3
Since QEMU has been supported cryptodev, so it is necessary to support
more crypto algorithms(i.e. hmac,aead) in QEMU backend.
We have already added HMAC support, and this patchset adds AEAD algos
support.
Longpeng(Mike) (6):
configure: add CONFIG_GCRYPT/NETTLE_AEAD item
crypto: add AEAD algo
This patch introduce AEAD algorithms framework.
We currently plan to support six basic AEAD algorithms,
ccm(aes128/192/256) and gcm(aes128/192/256), so we need
to add ccm/gcm mode in qapi/crypto.json simultaneously.
Signed-off-by: Longpeng(Mike)
---
crypto/Makefile.objs | 3 +
crypto/aead-gcr
This patch add some AEAD algorithms testcases
Signed-off-by: Longpeng(Mike)
---
tests/Makefile.include | 2 +
tests/test-crypto-aead.c | 357 +++
2 files changed, 359 insertions(+)
create mode 100644 tests/test-crypto-aead.c
diff --git a/tests/Ma
This item will be used for gcrypt/nettle backed AEAD algorithms.
It's hardly to decide which version of gcrypt/nettle started
supporting AEAD algorithms, but it's easily for us to making
a test in configure to know whether current gcrypt/nettle
support AEAD.
Signed-off-by: Longpeng(Mike)
---
co
This patch add nettle-backed AEAD algorithms
Signed-off-by: Longpeng(Mike)
---
crypto/aead-nettle.c | 174 ---
1 file changed, 167 insertions(+), 7 deletions(-)
diff --git a/crypto/aead-nettle.c b/crypto/aead-nettle.c
index cfb9d33..7a2296d 100644
On Thu, Dec 22, 2016 at 12:13:12PM +1100, Alexey Kardashevskiy wrote:
> KVM_CAP_SPAPR_TCE capability allows creating TCE tables in KVM which
> allows having in-kernel acceleration for H_PUT_TCE_xxx hypercalls.
> However it only supports 32bit DMA windows at zero bus offset.
>
> There is a new KVM_
On Mon, Jan 02, 2017 at 09:18:24PM +0100, Radim Krčmář wrote:
> 2017-01-01 18:34+0800, Peter Xu:
> > run_task.sh is getting slow. This patch is trying to make it faster by
> > running the tests concurrently.
> >
> > First of all, we provide a new parameter "-j" for the run_tests.sh,
> > which can
On Mon, Jan 02, 2017 at 09:25:56PM +0100, Radim Krčmář wrote:
> 2017-01-02 18:07+0100, Paolo Bonzini:
> > On 01/01/2017 11:34, Peter Xu wrote:
> >> run_tests.sh is getting slower. Maybe it's time to let it run faster.
> >> An obvious issue is that, we were running the tests sequentially in
> >> the
On Mon, Jan 02, 2017 at 06:07:56PM +0100, Paolo Bonzini wrote:
>
>
> On 01/01/2017 11:34, Peter Xu wrote:
> > run_tests.sh is getting slower. Maybe it's time to let it run faster.
> > An obvious issue is that, we were running the tests sequentially in
> > the past.
> >
> > This series provides a
On 2016年12月30日 20:41, Flavio Leitner wrote:
Hi,
While I was testing vhost-user using OVS 2.5 and DPDK 2.2.0 in the
host and testpmd dpdk 2.2.0 in the guest, I found that the commit
below breaks the environment and no packets gets into the guest.
dpdk port --> OVS --> vhost-user --> guest -->
Public bug reported:
We should be able to specify the umask for 9pfs so that files created by
the guest can be accessed by other users on the host. Currently they're
only accessible by the user running qemu (and of course, root).
** Affects: qemu
Importance: Undecided
Status: New
-
On Fri, Dec 30, 2016 at 06:09:14PM +0800, Jason Wang wrote:
> This patch enables device IOTLB support for intel iommu. The major
> work is to implement QI device IOTLB descriptor processing and notify
> the device through iommu notifier.
>
> Cc: Paolo Bonzini
> Cc: Richard Henderson
> Cc: Eduard
On 2017年01月02日 07:00, Laurent Vivier wrote:
address_space_rw() access size must be multiplied by width.
dp8393x_receive() must return the number of bytes read, not the length
of the last memory access.
Signed-off-by: Laurent Vivier
---
hw/net/dp8393x.c | 5 +++--
1 file changed, 3 insertio
On Fri, Dec 30, 2016 at 06:09:17PM +0800, Jason Wang wrote:
> Cc: Paolo Bonzini
> Acked-by: Paolo Bonzini
> Signed-off-by: Jason Wang
Reviewed-by: Peter Xu
> ---
> memory.c | 9 +
> 1 file changed, 9 insertions(+)
>
> diff --git a/memory.c b/memory.c
> index 33110e9..2bfc37f 100644
On Fri, Dec 30, 2016 at 06:09:18PM +0800, Jason Wang wrote:
> Cc: Paolo Bonzini
> Acked-by: Paolo Bonzini
> Signed-off-by: Jason Wang
Reviewed-by: Peter Xu
> ---
> include/exec/memory.h | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/include/exec/memory.h b/include/exec/memory.h
On Thu, Dec 29, 2016 at 11:12:13PM +0100, Hervé Poussineau wrote:
> Signed-off-by: Hervé Poussineau
This makes sense on its own, so I've applied it to ppc-for-2.9.
> ---
> hw/ppc/prep.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/hw/ppc/prep.c b/hw/ppc/prep.c
>
On Thu, Dec 29, 2016 at 11:12:14PM +0100, Hervé Poussineau wrote:
> Part of the functionality is copied from hw/ppc/prep.c.
> Also add support for board identification/equipment registers.
>
> Signed-off-by: Hervé Poussineau
> ---
> hw/ppc/Makefile.objs | 1 +
> hw/ppc/prep_systemio.c | 302
On Thu, Dec 29, 2016 at 11:12:16PM +0100, Hervé Poussineau wrote:
> Machine supports both Open Hack'Ware and OpenBIOS.
> Open Hack'Ware is the default because OpenBIOS is currently unable to boot
> PReP boot partitions or PReP kernels.
>
> Signed-off-by: Hervé Poussineau
> ---
> default-configs/
On Thu, Dec 29, 2016 at 11:12:15PM +0100, Hervé Poussineau wrote:
> Signed-off-by: Hervé Poussineau
> ---
> default-configs/ppc-softmmu.mak | 1 +
> hw/ppc/Makefile.objs| 1 +
> hw/ppc/rs6000_mc.c | 232
>
> hw/ppc/trace-event
On Sun, Jun 26, 2016 at 03:27:50PM +0200, Jan Kiszka wrote:
> On 2016-06-26 03:48, Peter Xu wrote:
> > On Sat, Jun 25, 2016 at 05:18:40PM +0200, Jan Kiszka wrote:
> >> On 2016-06-25 15:18, Peter Xu wrote:
> >>> On Sat, Jun 25, 2016 at 10:08:10AM +0200, Jan Kiszka wrote:
> >
> > [...]
> >
> >>> I
Because the 'size_t' type is 4 bytes in 32-bit platform, which
is the same with 'int'. It's easy to make 'max_len' to zero when
integer overflow and then cause heap overflow if 'max_len' is zero.
Using uint_64 instead of size_t to avoid the integer overflow.
Cc: qemu-sta...@nongnu.org
Reported-by
Le 03/01/2017 à 04:37, Jason Wang a écrit :
>
>
> On 2017年01月02日 07:00, Laurent Vivier wrote:
>> address_space_rw() access size must be multiplied by width.
>> dp8393x_receive() must return the number of bytes read, not the length
>> of the last memory access.
>>
>> Signed-off-by: Laurent Vivier
From: Jason Wang
Cc: Paolo Bonzini
Acked-by: Paolo Bonzini
Signed-off-by: Jason Wang
Signed-off-by: Peter Xu
---
memory.c | 9 +
1 file changed, 9 insertions(+)
diff --git a/memory.c b/memory.c
index 33110e9..2bfc37f 100644
--- a/memory.c
+++ b/memory.c
@@ -1603,6 +1603,11 @@ static
(I renamed the title for this RFC v2, since starting from this version
the series will be based on master, also I picked up some more fixes
for vt-d into this series)
v2:
- change comment for "end" parameter in vtd_page_walk() [Tianyu]
- change comment for "a iova" to "an iova" [Yi]
- fix fault
From: Aviv Ben-David
This capability asks the guest to invalidate cache before each map operation.
We can use this invalidation to trap map operations in the hypervisor.
Signed-off-by: Aviv Ben-David
Signed-off-by: Peter Xu
---
hw/i386/intel_iommu.c | 5 +
hw/i386/intel_iommu_int
Before we have int-remap, we need to bypass interrupt write requests.
That's not necessary now - we have supported int-remap, and all the irq
region requests should be redirected there. Cleaning up the block with
an assertion instead.
Signed-off-by: Peter Xu
---
hw/i386/intel_iommu.c | 28 ++
VT-d codes are still using static DEBUG_INTEL_IOMMU macro. That's not
good, and we should end the day when we need to recompile the code
before getting useful debugging information for vt-d. Time to switch to
the trace system.
This is the first patch to do it.
Generally, the rule of mine is:
- f
From: Jason Wang
Cc: Paolo Bonzini
Acked-by: Paolo Bonzini
Signed-off-by: Jason Wang
Signed-off-by: Peter Xu
---
include/exec/memory.h | 3 +++
1 file changed, 3 insertions(+)
diff --git a/include/exec/memory.h b/include/exec/memory.h
index 64560f6..958f4b2 100644
--- a/include/exec/memory.
From: Jason Wang
We use the pointer to stack for key for new address space, this will
break hash table searching, fixing by g_malloc() a new key instead.
Cc: Michael S. Tsirkin
Cc: Paolo Bonzini
Cc: Richard Henderson
Cc: Eduardo Habkost
Acked-by: Peter Xu
Signed-off-by: Jason Wang
Signed-o
There are lots of places in current intel_iommu.c codes that named
"iova" as "gpa". It is really confusing to use a name "gpa" in these
places (which is very easily to be understood as "Guest Physical
Address", while it's not). To make the codes (much) easier to be read, I
decided to do this once a
Another patch to convert the DPRINTF() stuffs. This patch focuses on the
address translation path and caching.
Signed-off-by: Peter Xu
---
hw/i386/intel_iommu.c | 87 ---
hw/i386/trace-events | 7 +
2 files changed, 48 insertions(+), 46 delet
Generalizing the notify logic in memory_region_notify_iommu() into a
single function. This can be further used in customized replay()
functions for IOMMUs.
Signed-off-by: Peter Xu
---
include/exec/memory.h | 15 +++
memory.c | 29 ++---
2 files ch
This helps in debugging incorrect level passed in.
Signed-off-by: Peter Xu
---
hw/i386/intel_iommu.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c
index f1118dd..abb9d2e 100644
--- a/hw/i386/intel_iommu.c
+++ b/hw/i386/intel_iommu.c
@@ -168,6 +
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