On 09.12.2016 03:23, David Gibson wrote:
> Signed-off-by: David Gibson
> ---
> hw/ppc/spapr.c | 23 +--
> include/hw/compat.h | 3 +++
> 2 files changed, 24 insertions(+), 2 deletions(-)
Reviewed-by: Thomas Huth
Hello,
>
> Hi everyone,
>
> I am testing the timeslice of vCPU thread in QEMU/KVM. In principle,
> the timeslice should be stable under following workload but it is
> unstable after I do experiments with following workload. I appreciate
> it if you can give me some suggestions. Thanks in advance
On 09.12.2016 03:23, David Gibson wrote:
> This introduces stub implementations of the H_RESIZE_HPT_PREPARE and
> H_RESIZE_HPT_COMMIT hypercalls which we hope to add in a PAPR
> extension to allow run time resizing of a guest's hash page table. It
> also adds a new machine property for controlling
Noted, I've created https://bugs.launchpad.net/qemu/+bug/1648726 to
track the issue with passing through physical UAS devices.
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https://bugs.launchpad.net/bugs/1579306
Title:
usb-uas d
Public bug reported:
Split off from https://bugs.launchpad.net/qemu/+bug/1579306 as this is a
distinct issue.
Physical USB storage devices that support the UAS protocol do not work
correctly when passed through to Windows guests (I've only tested this
with Windows 10 x64, build 1607).
Passing th
On 09.12.2016 03:23, David Gibson wrote:
> This patch implements hypercalls allowing a PAPR guest to resize its own
> hash page table. This will eventually allow for more flexible memory
> hotplug.
>
> The implementation is partially asynchronous, handled in a special thread
> running the hpt_pre
On Fri, Dec 09, 2016 at 09:18:51AM +0100, Thomas Huth wrote:
> On 09.12.2016 03:23, David Gibson wrote:
> > This introduces stub implementations of the H_RESIZE_HPT_PREPARE and
> > H_RESIZE_HPT_COMMIT hypercalls which we hope to add in a PAPR
> > extension to allow run time resizing of a guest's ha
* John Snow (js...@redhat.com) wrote:
>
>
> On 12/08/2016 02:59 PM, Dr. David Alan Gilbert wrote:
> > * Ashijeet Acharya (ashijeetacha...@gmail.com) wrote:
> >> Hi Dave,
> >>
> >> I have added the compatibility of this option for both command line
> >> and hotplug via qmp and hmp. Although, pleas
On 09.12.2016 10:09, David Gibson wrote:
> On Fri, Dec 09, 2016 at 09:18:51AM +0100, Thomas Huth wrote:
>> On 09.12.2016 03:23, David Gibson wrote:
>>> This introduces stub implementations of the H_RESIZE_HPT_PREPARE and
>>> H_RESIZE_HPT_COMMIT hypercalls which we hope to add in a PAPR
>>> extensio
On Fri, Dec 09, 2016 at 09:36:17AM +0100, Thomas Huth wrote:
> On 09.12.2016 03:23, David Gibson wrote:
> > This patch implements hypercalls allowing a PAPR guest to resize its own
> > hash page table. This will eventually allow for more flexible memory
> > hotplug.
> >
> > The implementation is
This series brings the ability to test 9P operations. It provides basic tests
of version, attach and walk, which are essential operations in a 9P session.
It also provide two security-oriented tests of the walk operation (for issues
that got fixed in QEMU 2.7).
I could run this on ppc64, ppc64le a
This moves the test_share static and the QOSState into the QVirtIO9P
structure, and put PCI related code in functions with a _pci_ name.
This will avoid code duplication in future tests, and allow to add
support for non-PCI platforms.
Signed-off-by: Greg Kurz
---
tests/virtio-9p-test.c | 101 +
The u16 and u32 types don't exist in QEMU common headers. It never broke
build because these two macros aren't use by the current code, but this
is about to change with the future addition of functional tests for 9P.
This patch convert the types to uintXX_t.
Signed-off-by: Greg Kurz
---
hw/9pfs
Signed-off-by: Greg Kurz
---
tests/virtio-9p-test.c |4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/tests/virtio-9p-test.c b/tests/virtio-9p-test.c
index 9c4f6cb40647..f458297f9ae1 100644
--- a/tests/virtio-9p-test.c
+++ b/tests/virtio-9p-test.c
@@ -92,7 +92,7 @@ static
The walk operation is expected to fail and to return ENOENT.
Signed-off-by: Greg Kurz
---
tests/virtio-9p-test.c | 24
1 file changed, 24 insertions(+)
diff --git a/tests/virtio-9p-test.c b/tests/virtio-9p-test.c
index 2deb7fbf92f1..83cb23b3afc7 100644
--- a/tests/vir
This patch lays the foundations to be able to test 9P operations and
provides a test for the version operation as a first example.
A 9P request is composed of a T-message sent by the client (guest) to the
server (QEMU), and a R-message sent by the server back to the client.
The following general
The attach operation is used to establish a connection between the
client and the server. After this, the client is able to access the
underlying filesystem and do I/O.
This test simply ensures the operation succeeds without error.
Reference:
http://man.cat-v.org/plan_9/5/attach
Signed-off-by:
The walk operation is used to traverse the directory tree and to associate
paths to fids. A single walk can be used to traverse up to P9_MAXWELEM path
elements at the same time.
The test creates a path with P9_MAXWELEM elements on the backend (à la
'mkdir -p') and issues a walk operation. The walk
According to the 9P spec at http://man.cat-v.org/plan_9/5/intro, the
parent directory of the root directory of a server's tree is itself.
This test hence checks that the qid of the root directory as returned by
attach is the same as the qid of ".." when walking from the root directory.
Signed-off-
Richard Henderson writes:
> The number of actual invocations does not warrent an opcode,
> and the backends generating it. But at least we can eliminate
> redundant helpers.
>
> Signed-off-by: Richard Henderson
Reviewed-by: Alex Bennée
> ---
> tcg-runtime.c | 10 ++
> tcg/tcg-o
Richard Henderson writes:
> Signed-off-by: Richard Henderson
Reviewed-by: Alex Bennée
> ---
> target-arm/helper-a64.c| 10 --
> target-arm/helper-a64.h| 2 --
> target-arm/translate-a64.c | 8
> 3 files changed, 4 insertions(+), 16 deletions(-)
>
> diff --git a/ta
Richard Henderson writes:
> The number of actual invocations of ctpop itself does not warrent
> an opcode, but it is very helpful for POWER7 to use in generating
> an expansion for ctz.
>
> Signed-off-by: Richard Henderson
Reviewed-by: Alex Bennée
> ---
> tcg-runtime.c| 10 +
* Jianjun Duan (du...@linux.vnet.ibm.com) wrote:
> Current migration code cannot handle some data structures such as
> QTAILQ in qemu/queue.h. Here we extend the signatures of put/get
> in VMStateInfo so that customized handling is supported. put now
> will return int type.
>
> Signed-off-by: Jian
* Jianjun Duan (du...@linux.vnet.ibm.com) wrote:
> Currently we cannot directly transfer a QTAILQ instance because of the
> limitation in the migration code. Here we introduce an approach to
> transfer such structures. We created VMStateInfo vmstate_info_qtailq
> for QTAILQ. Similar VMStateInfo can
* Jianjun Duan (du...@linux.vnet.ibm.com) wrote:
> Add a test for QTAILQ migration to tests/test-vmstate.c.
>
> Signed-off-by: Jianjun Duan
Thanks, that's better.
Reviewed-by: Dr. David Alan Gilbert
> ---
> tests/test-vmstate.c | 147
> +++
>
* Jianjun Duan (du...@linux.vnet.ibm.com) wrote:
> Added error_report where version_ids do not match in vmstate_load_state.
>
> Signed-off-by: Jianjun Duan
Thanks,
Reviewed-by: Dr. David Alan Gilbert
> ---
> migration/vmstate.c | 6 ++
> 1 file changed, 6 insertions(+)
>
> diff --git a/
Closing, as this is a libvirt issue, not a QEMU bug.
** Changed in: qemu
Status: New => Invalid
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https://bugs.launchpad.net/bugs/797905
Title:
virsh live migration
Status in Q
Hi,
On 08/12/16 17:50, Andrew Jones wrote:
> Allow a thread to wait some specified amount of time. Can
> specify in cycles, usecs, and msecs.
>
> Signed-off-by: Andrew Jones
>
> ---
> v8: rewrote basing on new sysreg framework. Also decided delay
> functions warrant their own files (delay.[
Sometimes you want absolute control over your test set-up to feed
explicit values into the test. This started as an experiment but might
be useful for further developing tests.
Signed-off-by: Alex Bennée
---
Makefile | 7 ++
aarch64_simd_handcoded.risu.S | 208
Hi,
I did a bunch of tweaking to see if I could abstract the hackage for
record/replay a bit more. With a little bit of light re-factoring of
the send and recv functions I can move all the specific send/recv
logic into the main risu.c file and avoid having copy and pasted
functions for each archit
This uses the magic of zlib's gzread/write interface to wrap the
tracefile in compression. The code changes are tiny. I spent more time
messing about with the configure/linker stuff to auto-detect bits.
Signed-off-by: Alex Bennée
---
Makefile | 3 ++-
configure | 55 +++
Before this is could seem a little quite when running as you had no
indication stuff was happening (or how fast). I only dump on the master
side as I want to minimise the amount of qemu logs to sift through.
Signed-off-by: Alex Bennée
--
v3
- use portable fmt string for image_start_address
-
This also fixes perl-modes confusion about escaped strings.
Signed-off-by: Alex Bennée
---
risugen | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/risugen b/risugen
index a604fe5..77a550b 100755
--- a/risugen
+++ b/risugen
@@ -288,7 +288,7 @@ Valid options:
This is a precursor to record/playback support. Instead of passing the
socket fd we now pass helper functions for reading/writing and
responding. This will allow us to do the rest of the record/playback
work without hacking up the arch specific stuff.
I've also added a header packet with pc/risu o
Signed-off-by: Alex Bennée
---
risu_aarch64.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/risu_aarch64.c b/risu_aarch64.c
index 7f9f612..8e3539e 100644
--- a/risu_aarch64.c
+++ b/risu_aarch64.c
@@ -97,7 +97,7 @@ int send_register_info(write_fn write_fn, void *uc)
* NB: c
A simple script to work through running all of a bunch of files with
record/playback traces. Dumps a summary and the number of failed tests
at the end.
Signed-off-by: Alex Bennée
---
v3
- tweak to allow specifying RISU binary
---
run_risu.sh | 53 ++
A simple script to cut up a full .risu file and generate binaries for
the whole set. Call with risu file and instruction count and directory:
./generate_all.sh aarch64.risu 4 2 testcases.aarch64
Signed-off-by: Alex Bennée
---
generate_all.sh | 55 ++
A simple script to run through a bunch of binaries and generate their
trace files.
Signed-off-by: Alex Bennée
---
v3
- allow overriding of RISU binary
---
record_traces.sh | 20
1 file changed, 20 insertions(+)
create mode 100755 record_traces.sh
diff --git a/record_tra
This adds a very dumb and easily breakable trace and replay support. In
--master mode the various risu ops trigger a write of register/memory
state into a binary file which can be played back to an apprentice.
Currently there is no validation of the image source so feeding the
wrong image will fail
On Fri, Dec 09, 2016 at 11:41:06AM +, Andre Przywara wrote:
> Hi,
>
> On 08/12/16 17:50, Andrew Jones wrote:
> > Allow a thread to wait some specified amount of time. Can
> > specify in cycles, usecs, and msecs.
> >
> > Signed-off-by: Andrew Jones
> >
> > ---
> > v8: rewrote basing on new s
This series contains 6 new instructions for POWER9 ISA3.0
VSX Vector Insert/Extract Word
VSX Load/Store with length
Although, lxvl/lxvll and stxvl/stxvll can be combined as single patch,
have left it for detailed commit log for instruction explanation.
Changelog:
v1:
* Combine helpers o
lxvl: Load VSX Vector with Length
Little/Big-endian Storage:
+---+---+---+---+---+---+---+---+---+---+---+---+---+---+--+--+
|“T”|“h”|“i”|“s”|“ ”|“i”|“s”|“ ”|“a”|“ ”|“T”|“E”|“S”|“T”|FF|FF|
+---+---+---+---+---+---+---+---+---+---+---+---+---+---+--+--+
Loading 14 bytes results in:
Vector (8-bit
lxvll: Load VSX Vector Left-justified with Length
Little/Big-endian Storage:
+---+---+---+---+---+---+---+---+---+---+---+---+---+---+--+--+
|“T”|“h”|“i”|“s”|“ ”|“i”|“s”|“ ”|“a”|“ ”|“T”|“E”|“S”|“T”|FF|FF|
+---+---+---+---+---+---+---+---+---+---+---+---+---+---+--+--+
Loading 14 bytes to vector (
Signed-off-by: Thomas Huth
---
MAINTAINERS | 2 +-
Makefile.objs | 2 +-
{target-sparc => target/sparc}/Makefile.objs | 0
{target-sparc => target/sparc}/TODO | 0
{target-sparc => target/sparc}/asi.h | 0
{targ
To be able to compile the CPU targets from within a subfolder
of the target/ folder, we've got to adapt the Makefile.target
a little bit first. After this change, target CPUs can either
reside in a target/xxx folder or continue to use the target-xxx
scheme. The latter will be disabled once all targ
stxvl: Store VSX Vector with Length
Vector (8-bit elements) in BE:
+---+---+---+---+---+---+---+---+---+---+---+---+---+---+--+--+
|“T”|“h”|“i”|“s”|“ ”|“i”|“s”|“ ”|“a”|“ ”|“T”|“E”|“S”|“T”|00|00|
+---+---+---+---+---+---+---+---+---+---+---+---+---+---+--+--+
Vector (8-bit elements) in LE:
+--+--+
After my RFC last week that did not move all folder yet, here's now
a patch series that moves all target-* folders into one subfolder:
We've currently got 18 architectures in QEMU, and thus 18 target-xxx
folders in the root folder of the QEMU source tree. More architectures
(e.g. RISC-V, AVR) are
Signed-off-by: Thomas Huth
---
MAINTAINERS | 2 +-
{target-moxie => target/moxie}/Makefile.objs | 0
{target-moxie => target/moxie}/cpu.c | 0
{target-moxie => target/moxie}/cpu.h | 0
{target-moxie => target/moxie}/helper.c | 0
{target-moxie
stxvll: Store VSX Vector Left-justified with Length
Vector (8-bit elements) in BE/LE:
+---+---+---+---+---+---+---+---+---+---+---+---+---+---+--+--+
|“T”|“h”|“i”|“s”|“ ”|“i”|“s”|“ ”|“a”|“ ”|“T”|“E”|“S”|“T”|00|00|
+---+---+---+---+---+---+---+---+---+---+---+---+---+---+--+--+
Storing 14 bytes wo
xxinsertw: VSX Vector Insert Word
Signed-off-by: Nikunj A Dadhania
---
target-ppc/helper.h | 1 +
target-ppc/int_helper.c | 21 +
target-ppc/translate/vsx-impl.inc.c | 5 +++--
target-ppc/translate/vsx-ops.inc.c | 1 +
4 files changed, 26 inser
Signed-off-by: Thomas Huth
---
MAINTAINERS | 2 +-
hw/alpha/alpha_sys.h | 2 +-
{target-alpha => target/alpha}/Makefile.objs | 0
{target-alpha => target/alpha}/STATUS| 0
{target-alpha => target/alpha}/cpu-qom.h | 0
{target-al
Signed-off-by: Thomas Huth
---
MAINTAINERS | 2 +-
{target-unicore32 => target/unicore32}/Makefile.objs | 0
{target-unicore32 => target/unicore32}/cpu-qom.h | 0
{target-unicore32 => target/unicore32}/cpu.c | 0
{target-unicore32 => target
Signed-off-by: Thomas Huth
---
MAINTAINERS | 2 +-
disas/cris.c | 4 +---
{target-cris => target/cris}/Makefile.objs| 0
{target-cris => target/cris}/cpu-qom.h| 0
{target-cris => target/cris}/cpu.c| 0
{ta
Signed-off-by: Thomas Huth
---
{target-tilegx => target/tilegx}/Makefile.objs | 0
{target-tilegx => target/tilegx}/cpu.c | 0
{target-tilegx => target/tilegx}/cpu.h | 0
{target-tilegx => target/tilegx}/helper.c| 0
{target-tilegx => target/tilegx}/helper.h|
Signed-off-by: Thomas Huth
---
MAINTAINERS | 4 ++--
Makefile.objs | 2 +-
hw/ppc/fdt.c| 2 +-
hw/ppc/pnv.c| 2 +-
hw/ppc/pnv_core.c
Le 09/12/2016 à 13:17, Thomas Huth a écrit :
> To be able to compile the CPU targets from within a subfolder
> of the target/ folder, we've got to adapt the Makefile.target
> a little bit first. After this change, target CPUs can either
> reside in a target/xxx folder or continue to use the target-
xxextractuw: VSX Vector Extract Unsigned Word
Signed-off-by: Nikunj A Dadhania
---
target-ppc/helper.h | 1 +
target-ppc/int_helper.c | 21 +
target-ppc/translate/vsx-impl.inc.c | 27 +++
target-ppc/translate/vsx-ops.inc.c
Signed-off-by: Thomas Huth
---
MAINTAINERS | 2 +-
hw/sh4/shix.c| 2 +-
include/hw/sh4/sh.h | 2 +-
{target-sh4 => target/sh4}/Makefile.objs | 0
{target-sh4 => target/sh4}/README.sh4| 2 +-
{target-sh4 => target/sh
Signed-off-by: Thomas Huth
---
MAINTAINERS | 4 ++--
Makefile.objs| 2 +-
hw/i386/acpi-build.c | 2 +-
hw/i386/kvm/apic.c | 2 +-
hw/intc/ioapic.c
Le 09/12/2016 à 13:17, Thomas Huth a écrit :
> Now that all target CPU folders have been moved to target/, we
> do not need to support the old naming scheme of target-xxx
> anymore.
>
> Signed-off-by: Thomas Huth
> ---
> Makefile.target | 4
> 1 file changed, 4 deletions(-)
>
> diff --git
Signed-off-by: Thomas Huth
---
MAINTAINERS| 2 +-
include/hw/m68k/mcf.h | 2 +-
{target-m68k => target/m68k}/Makefile.objs | 0
{target-m68k => target/m68k}/cpu-qom.h | 0
{target-m68k => target/m68k}/cpu.c | 0
{target-m68k => targ
Signed-off-by: Thomas Huth
---
MAINTAINERS | 2 +-
{target-tricore => target/tricore}/Makefile.objs | 0
{target-tricore => target/tricore}/cpu-qom.h | 0
{target-tricore => target/tricore}/cpu.c | 0
{target-tricore => target/trico
Signed-off-by: Thomas Huth
---
MAINTAINERS | 2 +-
{target-microblaze => target/microblaze}/Makefile.objs | 0
{target-microblaze => target/microblaze}/cpu-qom.h | 0
{target-microblaze => target/microblaze}/cpu.c | 0
On 12/09/2016 01:17 PM, Thomas Huth wrote:
> Signed-off-by: Thomas Huth
> ---
> MAINTAINERS | 2 +-
> {target-tricore => target/tricore}/Makefile.objs | 0
> {target-tricore => target/tricore}/cpu-qom.h | 0
> {target-tricore => target/tricore}
Signed-off-by: Thomas Huth
---
MAINTAINERS| 4 ++--
Makefile.objs | 2 +-
hw/arm/strongarm.h | 2 +-
hw/arm/virt-acpi-build.c | 2 +-
include/hw/arm/arm.h | 2 +-
include/h
Am 2016-12-09 13:17, schrieb Thomas Huth:
Signed-off-by: Thomas Huth
---
MAINTAINERS| 2 +-
{target-lm32 => target/lm32}/Makefile.objs | 0
{target-lm32 => target/lm32}/README| 0
{target-lm32 => target/lm32}/TODO | 0
{target-lm32 => target/lm32
Signed-off-by: Thomas Huth
---
MAINTAINERS | 4 ++--
include/hw/mips/cpudevs.h | 2 +-
{target-mips => target/mips}/Makefile.objs| 0
{target-mips => target/mips}/TODO | 0
{target-mips => target/mips}/cpu-qom.h| 0
{ta
On 12/09/2016 01:17 PM, Thomas Huth wrote:
> Signed-off-by: Thomas Huth
grep does not seem to find any other place.
Reviewed-by: Christian Borntraeger
> ---
> MAINTAINERS | 8
> Makefile.objs | 2 +-
> {target-
Signed-off-by: Thomas Huth
---
MAINTAINERS | 8
Makefile.objs | 2 +-
{target-s390x => target/s390x}/Makefile.objs | 2 +-
{target-s390x => target/s390x}/arch_dump.c| 0
{target-s390x => target/s390x}/
Signed-off-by: Thomas Huth
---
MAINTAINERS| 2 +-
{target-lm32 => target/lm32}/Makefile.objs | 0
{target-lm32 => target/lm32}/README| 0
{target-lm32 => target/lm32}/TODO | 0
{target-lm32 => target/lm32}/cpu-qom.h | 0
{target-lm32 => target/
On Fri, 9 Dec 2016 13:17:40 +0100
Thomas Huth wrote:
> Signed-off-by: Thomas Huth
> ---
> MAINTAINERS | 8
> Makefile.objs | 2 +-
> {target-s390x => target/s390x}/Makefile.objs | 2 +-
> {target-s390x => t
Signed-off-by: Thomas Huth
---
MAINTAINERS | 2 +-
{target-openrisc => target/openrisc}/Makefile.objs | 0
{target-openrisc => target/openrisc}/cpu.c | 0
{target-openrisc => target/openrisc}/cpu.h | 0
{target-openrisc =>
Now that all target CPU folders have been moved to target/, we
do not need to support the old naming scheme of target-xxx
anymore.
Signed-off-by: Thomas Huth
---
Makefile.target | 4
1 file changed, 4 deletions(-)
diff --git a/Makefile.target b/Makefile.target
index 90b25ae..1da789c 100644
Signed-off-by: Thomas Huth
---
MAINTAINERS | 2 +-
{target-xtensa => target/xtensa}/Makefile.objs| 0
{target-xtensa => target/xtensa}/core-dc232b.c| 0
{target-xtensa => target/xtensa}/core-dc232b/core-isa.h | 0
{target-xte
On Fri, Dec 09, 2016 at 01:17:37PM +0100, Thomas Huth wrote:
> Signed-off-by: Thomas Huth
Acked-by: Eduardo Habkost
> ---
> MAINTAINERS | 4 ++--
> Makefile.objs| 2 +-
> hw/i386/acpi-build.c
Le 09/12/2016 à 13:17, Thomas Huth a écrit :
> Signed-off-by: Thomas Huth
> ---
> MAINTAINERS| 2 +-
> include/hw/m68k/mcf.h | 2 +-
> {target-m68k => target/m68k}/Makefile.objs | 0
> {target-m68k => target/m68k}/cpu-qom.h | 0
> {target-m
Hi Pankaj Gupta,
Thanks for your reply. I have found the problem after debug Linux
Kernel. The problem is once there is I/O thread upon vCPU2 thread of
VM1, there will be some mutex (synchronization) produced so that it
will be preempted by vCPU2 thread of VM2. After I set
"/proc/sys/kernel/sched_
On 09/12/2016 03:23, David Gibson wrote:
> Signed-off-by: David Gibson
> ---
> hw/ppc/spapr.c | 23 +--
> include/hw/compat.h | 3 +++
> 2 files changed, 24 insertions(+), 2 deletions(-)
>
> diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
> index cfadc46..0f25e83 100644
On 09/12/2016 03:23, David Gibson wrote:
> We've now implemented a PAPR extensions which allows PAPR guests (i.e.
> "pseries" machine type) to resize their hash page table during runtime.
>
> However, that extension is only enabled if explicitly chosen on the
> command line. This patch enables
++Daniel for libvirt
On 11/24/2016 07:31 AM, Yuanhan Liu wrote:
As version here is an opaque string for libvirt and qemu,
> > > > > >>anything can be used - but I suggest either a list
> > > > > >>of values defining the interface, e.g.
> > > > > >>any_layout=on,max_ring=256
> > > > > >>or a vers
Hi all,
as we all know, one of the main things that can make the qcow2 format
slow is the need to load entries from the L2 table in order to map a
guest offset (on the virtual disk) to a host offset (on the qcow2
image).
We have an L2 cache to deal with this, and as long as the cache is big
enoug
In scenarios where we have a large qcow2 file stored in a slow storage
backend, we can save memory by storing its L2 cache in a faster drive
rather than keeping it in RAM.
Signed-off-by: Alberto Garcia
---
block/qcow2-cache.c | 56 +
block/qcow
On 09.12.2016 02:42, Gonglei (Arei) wrote:
> Hi,
>
>>
>> Subject: Re: [Qemu-devel] [PATCH for-2.9 v2] virtio-crypto: zeroize the key
>> material before free
>>
>> On 08.12.2016 16:23, Eric Blake wrote:
>>> On 12/07/2016 08:28 PM, Gonglei (Arei) wrote:
>>>
> As far as I'm aware, other projects
On Wed 30 Nov 2016 08:44:20 PM CET, Eric Blake wrote:
> Quite a few users of qdict_put() were manually wrapping a
> non-QObject. We can make such call-sites shorter, by providing
> common macros to do the tedious work. Also shorten nearby
> qdict_put_obj(,,QOBJECT()) sequences.
>
> Signed-off-by:
Am 09.12.2016 um 14:47 hat Alberto Garcia geschrieben:
> Hi all,
>
> as we all know, one of the main things that can make the qcow2 format
> slow is the need to load entries from the L2 table in order to map a
> guest offset (on the virtual disk) to a host offset (on the qcow2
> image).
>
> We ha
On 09.12.2016 14:47, Alberto Garcia wrote:
> Hi all,
>
> as we all know, one of the main things that can make the qcow2 format
> slow is the need to load entries from the L2 table in order to map a
> guest offset (on the virtual disk) to a host offset (on the qcow2
> image).
>
> We have an L2 cac
Acked-By: Artyom Tarasenko
(Forgot to hit "Reply to all" in the previous mail)
> On Fri, Dec 9, 2016 at 1:17 PM, Thomas Huth wrote:
>> Signed-off-by: Thomas Huth
>> ---
>> MAINTAINERS | 2 +-
>> Makefile.objs | 2 +-
>> {targe
Signed-off-by: Andrew Jones
---
hw/intc/arm_gicv3_common.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/hw/intc/arm_gicv3_common.c b/hw/intc/arm_gicv3_common.c
index 0f8c4b86e023..0aa9b9ca6655 100644
--- a/hw/intc/arm_gicv3_common.c
+++ b/hw/intc/arm_gicv3_common.c
@@ -20
On Fri, Dec 09, 2016 at 02:35:58PM +0100, Maxime Coquelin wrote:
> ++Daniel for libvirt
>
> On 11/24/2016 07:31 AM, Yuanhan Liu wrote:
> > > > > > > > > As version here is an opaque string for libvirt and qemu,
> > > > > > > > > > > > > > >>anything can be used - but I suggest either a list
> > >
Richard Henderson writes:
> Signed-off-by: Richard Henderson
Reviewed-by: Alex Bennée
As it looked like we were messing about with the Hackers Delight
algorithms I thought it might be worth defending any changes with some
unit tests. Feel free to include the unit test bellow:
--8<--
On Fri 09 Dec 2016 03:18:23 PM CET, Kevin Wolf wrote:
>> I have been making some tests with exactly that scenario and the
>> results look good: storing the cache in disk gives roughly the same
>> performance as storing it in memory.
>>
>> |-++--++---
Hi folks,
How is QEMU 2.8.0-rc3 holding up?
I'm not aware of release blockers. QEMU 2.8.0 will be released on
Tuesday, December 13th if nothing comes up. It will be the -rc3
source tree.
Stefan
Richard Henderson writes:
> On 12/06/2016 04:24 AM, Alex Bennée wrote:
>>> > +case INDEX_op_extract_i64:
>>> > +case INDEX_op_extract_i32:
>>> > +tcg_out_ubfm(s, ext, a0, a1, a2, a2 + args[3] - 1);
>>> > +break;
>>> > +
>>> > +case INDEX_op_sextract_i64:
>>> > +ca
Hi,
On 08/12/16 17:50, Andrew Jones wrote:
> Signed-off-by: Andrew Jones
>
> ---
> v8:
> - keep the gic_common_ops concept completely local to
>lib/arm/gic.c by instead exposing the more useful
>concept of gic-specific functions
> - sysreg rebase changes
> - ordered ICC registers in s
Richard Henderson writes:
> Particularly when andc is also available, this is two insns
> shorter than using clz to compute ctz.
>
> Signed-off-by: Richard Henderson
> ---
> tcg/tcg-op.c | 107
> ---
> 1 file changed, 65 insertions(+), 4
Richard Henderson writes:
> This is a combination of two patch sets that have had previous
> revisions, as well as some new patches. I wanted to post this
> all together since Alex was having trouble with prerequisites.
>
> The full tree is at
>
> git://github.com/rth7680/qemu.git tcg-2.9
OK
Quoting Markus Armbruster (2016-12-07 04:36:20)
> Michael Roth writes:
>
> > Currently objects specified on the command-line are only partially
> > cleaned up when 'object_del' is issued in either HMP or QMP: the
> > object itself is fully finalized, but the QemuOpts are not removed.
> > This res
Quoting Markus Armbruster (2016-12-07 05:10:47)
> "Daniel P. Berrange" writes:
>
> > On Tue, Dec 06, 2016 at 02:15:00PM -0600, Michael Roth wrote:
> >> check-qom-proplist originally added tests for verifying that
> >> object-creation helpers object_new_with_{props,propv} behaved in
> >> similar f
This patchset fixes an error in how we were reporting the
architectural timers in the device tree for the virt board.
Old KVM host kernels (before 4.4) implemented these timers
as edge-triggered, which led us to decide to report them in
the DT as edge triggered. However in newer kernels this
was fi
Signed-off-by: Peter Maydell
---
include/hw/compat.h | 3 +++
hw/arm/virt.c | 19 +--
2 files changed, 20 insertions(+), 2 deletions(-)
diff --git a/include/hw/compat.h b/include/hw/compat.h
index 0f06e11..f8b8354 100644
--- a/include/hw/compat.h
+++ b/include/hw/compat.h
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