On Thu, Nov 24, 2016 at 05:48:20PM +0100, Cornelia Huck wrote:
> On Mon, 21 Nov 2016 23:12:04 -0200
> Eduardo Habkost wrote:
>
>
>
> > diff --git a/hw/pci/pci.c b/hw/pci/pci.c
> > index 24fae16..74b8fef 100644
> > --- a/hw/pci/pci.c
> > +++ b/hw/pci/pci.c
> > @@ -152,6 +152,7 @@ static void pci
On Thu, Nov 24, 2016 at 05:30:19PM +0100, Cornelia Huck wrote:
> On Thu, 24 Nov 2016 12:51:19 +1100
> David Gibson wrote:
>
> > On Wed, Nov 23, 2016 at 03:10:47PM -0200, Eduardo Habkost wrote:
> > > (CCing the maintainers of the machines that crash when using
> > > -nodefaults)
> > >
> > > On Tu
On Thu, 24 Nov 2016 12:05:55 -0500 (EST)
Paolo Bonzini wrote:
>
> > > Okay, this does plug the hole I sketched out above. This logic (the
> > > QEMU-specific unparking) can be done in another platform API in OVMF I
> > > guess (like those in SmmCpuFeaturesLib), but I wonder if we have to
> > > p
On 24.11.2016 00:25, Kevin Wolf wrote:
Am 15.11.2016 um 07:37 hat Pavel Butsykin geschrieben:
RBCache provides functionality to cache the data from block devices
(basically). The range here is used as the main key for searching and storing
data. The cache is based on red-black trees, so basic op
Hi Stefan,
David's latest ppc-for-2.8-20161123 pull includes Ben's patch entitled "ppc:
Make
uninorth interrupt swizzling identical to Grackle". This requires a
corresponding
change in the OpenBIOS device tree to match and so this pull request should be
applied soon after.
ATB,
Mark.
The
>
>On 11/24/2016 12:47 PM, Maxime Coquelin wrote:
>>
>>
>> On 11/24/2016 01:33 PM, Yuanhan Liu wrote:
>>> On Thu, Nov 24, 2016 at 09:30:49AM +, Kevin Traynor wrote:
> On 11/24/2016 06:31 AM, Yuanhan Liu wrote:
> > > On Tue, Nov 22, 2016 at 04:53:05PM +0200, Michael S. Tsirkin wrote:
>>
Running SkiFree (1.04 x32) on wine (1.8.3 x32) installed in a gentoo
i686 chroot, all running via qemu-user-i386-static 1.7.0 on a raspberry
pi 2 armv7 host works. It was almost playable at 1920x1080 too!
winecfg worked, notepad.exe worked, and SkiFree worked too.
--
You received this bug notifi
On Thu, Nov 24, 2016 at 08:52:29PM +0800, Peter Xu wrote:
> In this patch, IOMMUNotifier.{start|end} are introduced to store section
> information for a specific notifier. When notification occurs, we not
> only check the notification type (MAP|UNMAP), but also check whether the
> notified iova is
On Thu, Nov 24, 2016 at 09:50:05AM +, Stefan Hajnoczi wrote:
> On Tue, Nov 22, 2016 at 07:06:11PM -0800, no-re...@patchew.org wrote:
> > === OUTPUT BEGIN ===
> > Checking PATCH 1/11: tests/postcopy: Use KVM on ppc64 only if it is
> > KVM-HV...
> > Checking PATCH 2/11: spapr: migration support
On Thu, Nov 24, 2016 at 02:31:21PM -0200, jos...@linux.vnet.ibm.com wrote:
> Hello Richard,
>
> Thank you for your review, please read my answer below.
>
>
> On Thu, Nov 24, 2016 at 01:43:18AM +0100, Richard Henderson wrote:
> > On 11/23/2016 05:21 PM, Jose Ricardo Ziviani wrote:
> > >bcdcfsq.:
On 23.11.2016 17:28, Kevin Wolf wrote:
Am 15.11.2016 um 07:36 hat Pavel Butsykin geschrieben:
It's just byte-based wrappers over bdrv_co_aio_prw_vector(), which provide
a byte-based interface for AIO read/write.
Signed-off-by: Pavel Butsykin
I'm in the process to phase out the last users o
Hi Peter,
I have tested the patch, it has solved the issue.
I think change
dev->dev.msix_table = dev->msix_table;
to
dev->dev.msix_table = (uint8_t *)dev->msix_table;
can avoid a gcc warning.
Regards
Chang limin
-Original Message-
From: Peter Xu [mailto:pet...@redhat.com]
Sent
On 2016年11月24日 12:28, Jason Wang wrote:
On 2016年11月01日 01:41, w...@redhat.com wrote:
From: Wei Xu
This patch is to support WHQL test for Windows guest, while this
feature also benifits other guest works as a kernel 'gro' like
feature with userspace implementation.
Feature information:
h
On Fri, Nov 25, 2016 at 12:55:12AM +, Changlimin wrote:
> Hi Peter,
> I have tested the patch, it has solved the issue.
> I think change
> dev->dev.msix_table = dev->msix_table;
> to
> dev->dev.msix_table = (uint8_t *)dev->msix_table;
> can avoid a gcc warning.
Thanks for the comme
Since commit e1d4fb2d ("kvm-irqchip: x86: add msi route notify fn"),
kvm_irqchip_add_msi_route() starts to use pci_get_msi_message() to fetch
MSI info. This requires that we setup MSI related fields in PCIDevice.
For most devices, that won't be a problem, as long as we are using
general interfaces
Since the mips manual tables are in octal, reorg all of the opcodes
into that format for clarity. Note that the 64-bit opcodes are as
yet unused.
Cc: Aurelien Jarno
Cc: James Hogan
Signed-off-by: Richard Henderson
Signed-off-by: Jin Guojie
---
tcg/mips/tcg-target.inc.c | 193
Changes since v2:
* Update against master(v2.8.0-rc1)
* Tested on Loongson as mips32r2(el) and mips64r2(el) hosts.
Loongson only implements little-endian mips32/mips64 ISA.
* Fully work for 32-bit and 64-bit guests.
Fix two bugs：segmentation fault on mips64el with 32-bit guests,
Without the mips32r2 instructions to perform swapping, bswap is quite large,
dominating the size of each reverse-endian qemu_ld/qemu_st operation.
Create two subroutines in the prologue block. The subroutines require extra
reserved registers (TCG_TMP[2, 3]). Using these within qemu_ld means that
Without the mips32r2 instructions to perform swapping, bswap is quite large,
dominating the size of each reverse-endian qemu_ld/qemu_st operation.
Create a subroutine in the prologue block. The subroutine requires extra
reserved registers (TCG_TMP[2, 3]). Using these within qemu_ld means that
we
Cc: Aurelien Jarno
Cc: James Hogan
Signed-off-by: Richard Henderson
Signed-off-by: Jin Guojie
---
tcg/mips/tcg-target.inc.c | 44
1 file changed, 44 insertions(+)
diff --git a/tcg/mips/tcg-target.inc.c b/tcg/mips/tcg-target.inc.c
index d4623b0..621
tcg_out_ldst: using a generic ALIAS_PADD to avoid ifdefs
tcg_out_ld: generates LD or LW
tcg_out_st: generates SD or SW
Cc: Aurelien Jarno
Cc: James Hogan
Signed-off-by: Richard Henderson
Signed-off-by: Jin Guojie
---
tcg/mips/tcg-target.inc.c | 14 +++---
1 file changed, 11 insertions
Cc: Aurelien Jarno
Cc: James Hogan
Signed-off-by: Richard Henderson
Signed-off-by: Jin Guojie
---
tcg/mips/tcg-target.h | 19 +++
tcg/mips/tcg-target.inc.c | 21 +++--
2 files changed, 30 insertions(+), 10 deletions(-)
diff --git a/tcg/mips/tcg-target.h b/t
Bulk patch adding 64-bit opcodes into tcg_out_op. Note that
mips64 is as yet neither complete nor enabled.
Cc: Aurelien Jarno
Cc: James Hogan
Signed-off-by: Richard Henderson
Signed-off-by: Jin Guojie
---
tcg/mips/tcg-target.h | 41 ++
tcg/mips/tcg-target.inc.c | 322 +++
32-bit condition functions(like brcond_i32) should only
compare the low half parts of two 64-bit host registers.
However, MIPS64 does not have distinct instruction for
such operation. The operands should be sign extended
to fit the case.
Gcc handles 32-bit comparison in the same way, as the
follow
Take stack frame parameters out from the function body.
Cc: Aurelien Jarno
Cc: James Hogan
Signed-off-by: Richard Henderson
Signed-off-by: Jin Guojie
---
tcg/mips/tcg-target.inc.c | 54 ++-
1 file changed, 25 insertions(+), 29 deletions(-)
diff --g
tcg_out_mov: using OPC_OR as most mips assemblers do;
tcg_out_movi: extended to 64-bit immediate.
Cc: Aurelien Jarno
Cc: James Hogan
Signed-off-by: Richard Henderson
Signed-off-by: Jin Guojie
---
tcg/mips/tcg-target.inc.c | 34 +-
1 file changed, 25 insertions(
Cc: Aurelien Jarno
Cc: James Hogan
Signed-off-by: Richard Henderson
Signed-off-by: Jin Guojie
---
tcg/mips/tcg-target.inc.c | 169 +++---
1 file changed, 114 insertions(+), 55 deletions(-)
diff --git a/tcg/mips/tcg-target.inc.c b/tcg/mips/tcg-target.inc
bcdcfsq.: Decimal convert from signed quadword. It is not possible
to convert values less than -10^31-1 or greater than 10^31-1 to be
represented in packed decimal format.
Signed-off-by: Jose Ricardo Ziviani
---
target-ppc/helper.h | 1 +
target-ppc/int_helper.c | 38
bcdcpsgn.: Decimal copy sign. Given two registers vra and vrb, it
copies the vra value with vrb sign to the result register vrt.
Signed-off-by: Jose Ricardo Ziviani
Reviewed-by: David Gibson
---
target-ppc/helper.h | 1 +
target-ppc/int_helper.c | 23 +++
v3:
- use decimal numbers instead of hex when appropriate
- set condition register flag to the new form
- fix bcdcfsq loops boundaries
v2:
- use div128 and mul64 functions to make code easier to understand
- fixed int128 neg
- improved functions bcdcpsgn and bcdsetsgn to do less work
than
bcdctsq.: Decimal convert to signed quadword. It is possible to
convert packed decimal values to signed quadwords.
Signed-off-by: Jose Ricardo Ziviani
Reviewed-by: David Gibson
---
target-ppc/helper.h | 1 +
target-ppc/int_helper.c | 40 +
bcdsetsgn.: Decimal set sign. This instruction copies the register
value to the result register but adjust the signal according to
the preferred sign value.
Signed-off-by: Jose Ricardo Ziviani
Reviewed-by: David Gibson
---
target-ppc/helper.h | 1 +
target-ppc/int_helper.c
On Thu, Nov 24, 2016 at 09:37:41AM +0100, Laszlo Ersek wrote:
> On 11/24/16 05:29, Michael S. Tsirkin wrote:
> > On Wed, Nov 23, 2016 at 07:38:35PM -0500, Kevin O'Connor wrote:
> >> As a general comment - it does seem unfortunate that we keep building
> >> adhoc interfaces to communicate informatio
On Tue, Nov 22, 2016 at 04:08:50PM +0800, Peter Xu wrote:
> We are very strict in the past getting MSIs from commit
> d1f6af6a1 ("kvm-irqchip: simplify kvm_irqchip_add_msi_route"), assuming
> that MSI should be configured before hand when fetching. When we have
> unrecognized configurations, we pan
On Thu, Nov 24, 2016 at 11:39:25AM +0200, Marcel Apfelbaum wrote:
> On 11/24/2016 06:06 AM, David Gibson wrote:
> > On Wed, Nov 23, 2016 at 01:08:46PM +0200, Marcel Apfelbaum wrote:
> > > On 11/22/2016 10:25 PM, Laurent Vivier wrote:
> > > >
> > > >
> > > > On 22/11/2016 18:26, Marcel Apfelbaum w
On Fri, Nov 25, 2016 at 01:53:29AM -0200, Jose Ricardo Ziviani wrote:
> v3:
> - use decimal numbers instead of hex when appropriate
> - set condition register flag to the new form
> - fix bcdcfsq loops boundaries
>
> v2:
> - use div128 and mul64 functions to make code easier to understand
> -
On Fri, Nov 25, 2016 at 01:53:30AM -0200, Jose Ricardo Ziviani wrote:
> bcdcfsq.: Decimal convert from signed quadword. It is not possible
> to convert values less than -10^31-1 or greater than 10^31-1 to be
> represented in packed decimal format.
>
> Signed-off-by: Jose Ricardo Ziviani
> ---
>
On Fri, Nov 25, 2016 at 06:11:01AM +0200, Michael S. Tsirkin wrote:
> On Tue, Nov 22, 2016 at 04:08:50PM +0800, Peter Xu wrote:
> > We are very strict in the past getting MSIs from commit
> > d1f6af6a1 ("kvm-irqchip: simplify kvm_irqchip_add_msi_route"), assuming
> > that MSI should be configured b
-device pci-assign,configfd=30,host=05:00.0,id=hostdev0,bus=pci.0,addr=0x3
KVM pci-assign is configured, maybe the same reason as
http://lists.nongnu.org/archive/html/qemu-devel/2016-11/msg04668.html
please try the patch inside it.
Chang limin
On Fri, Nov 25, 2016 at 06:11:01AM +0200, Michael S.
update the link
-device pci-assign,configfd=30,host=05:00.0,id=hostdev0,bus=pci.0,addr=0x3
KVM pci-assign is configured, maybe the same reason as
http://lists.nongnu.org/archive/html/qemu-devel/2016-11/msg04649.html
please try the patch inside it.
Chang limin
On Fri, Nov 25, 2016 at 06:03:59AM +, Changlimin wrote:
> update the link
>
> -device pci-assign,configfd=30,host=05:00.0,id=hostdev0,bus=pci.0,addr=0x3
> KVM pci-assign is configured, maybe the same reason as
> http://lists.nongnu.org/archive/html/qemu-devel/2016-11/msg04649.html
> please try
On Fri, Nov 25, 2016 at 01:28:36PM +0800, Peter Xu wrote:
> On Fri, Nov 25, 2016 at 06:11:01AM +0200, Michael S. Tsirkin wrote:
> > On Tue, Nov 22, 2016 at 04:08:50PM +0800, Peter Xu wrote:
> > > We are very strict in the past getting MSIs from commit
> > > d1f6af6a1 ("kvm-irqchip: simplify kvm_irq
On Fri, Nov 25, 2016 at 08:47:26AM +0200, Michael S. Tsirkin wrote:
> On Fri, Nov 25, 2016 at 01:28:36PM +0800, Peter Xu wrote:
> > On Fri, Nov 25, 2016 at 06:11:01AM +0200, Michael S. Tsirkin wrote:
> > > On Tue, Nov 22, 2016 at 04:08:50PM +0800, Peter Xu wrote:
> > > > We are very strict in the p
Richard Henderson writes:
> On 11/24/2016 12:32 PM, Nikunj A Dadhania wrote:
>> +#if defined(HOST_WORDS_BIGENDIAN)
>> +# if defined(CONFIG_INT128)
>> +# define VEXTULX_DO(name, size) \
>> +target_ulong glue(helper_, name)(target_ulong a, ppc_avr_t *b) \
>>
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