Hi,
> >> +L:qemu-devel@nongnu.org
>
> qemu-devel list already has very high traffic - not sure whether it
> makes much sense to route even more additional patches here. Maybe
> rather create a separate mailing list like qemu-graph...@nongnu.org ?
> So you've just man
On 23.11.2016 09:06, Gerd Hoffmann wrote:
> Hi,
>
+L:qemu-devel@nongnu.org
>>
>> qemu-devel list already has very high traffic - not sure whether it
>> makes much sense to route even more additional patches here. Maybe
>> rather create a separate mailing list like qe
+Nitin Jerath from Veritas.
On 11/18/16, 7:06 PM, "Daniel P. Berrange" wrote:
>On Fri, Nov 18, 2016 at 01:25:43PM +, Ketan Nilangekar wrote:
>>
>>
>> > On Nov 18, 2016, at 5:25 PM, Daniel P. Berrange
>> > wrote:
>> >
>> >> On Fri, Nov 18, 2016 at 11:36:02AM +, Ketan Nilangekar wr
On 11/23/2016 01:46 AM, Alastair D'Silva wrote:
> On Tue, 2016-11-22 at 17:56 +0100, Cédric Le Goater wrote:
>> On 11/17/2016 05:36 AM, Alastair D'Silva wrote:
>>>
>>> From: Alastair D'Silva
>>>
>>> Connect an RX8900 RTC to i2c12 of the AST2500 SOC at address 0x32
>>
>> If this is a board device,
1: fix quad word bufioreq handling
2: slightly simplify bufioreq handling
3: ignore direction in bufioreq handling
Signed-off-by: Jan Beulich
In this patch, IOMMUNotifier.{start|end} are introduced to store section
information for a specific notifier. When notification occurs, we not
only check the notification type (MAP|UNMAP), but also check whether the
notified iova is in the range of specific IOMMU notifier, and skip those
notifiers
- Original Message -
> From: "Eric Blake"
> To: qemu-devel@nongnu.org
> Cc: programmingk...@gmail.com, arm...@redhat.com, pbonz...@redhat.com
> Sent: Wednesday, November 23, 2016 5:16:27 AM
> Subject: [PATCH 2/3] test-qga: Avoid qobject_from_jsonf("%"PRId64)
>
> The qobject_from_jsonf()
We should not consume the second slot if it didn't get written yet.
Normal writers - i.e. Xen - would not update write_pointer between the
two writes, but the page may get fiddled with by the guest itself, and
we're better off entering an infinite loop in that case.
Reported-by: yanghongke
Signed
There's no point setting fields always receiving the same value on each
iteration, as handle_ioreq() doesn't alter them anyway. Set state and
count once ahead of the loop, drop the redundant clearing of
data_is_ptr, and avoid the meaningless setting of df altogether.
Also avoid doing an unsigned l
> The qobject_from_jsonf() function implements a pseudo-printf
> language for creating a QObject; however, it is hard-coded to
> only parse a subset of formats understood by printf(). In
> particular, any use of a 64-bit integer works only if the
> system's definition of PRId64 matches what the pa
There's no way to communicate back read data, so only writes can ever
be usefully specified. Ignore the field, paving the road for eventually
re-using the bit for something else in a few (many?) years time.
Signed-off-by: Jan Beulich
--- a/xen-hvm.c
+++ b/xen-hvm.c
@@ -997,6 +997,7 @@ static int
From: Prasad J Pandit
ES1370 audio device emulator registers a device reset call with
Qemu during initialisation. But the same is not unregistered when
audio device is unplugged. This leads to a use-after-free error
during reboot, as Qemu resets the machine. Add 'es1370_exit'
PCIDeviceClass metho
On Wed, Nov 23, 2016 at 08:30:20AM +0100, Vincent Bernat wrote:
> ❦ 22 novembre 2016 10:49 GMT, Stefan Hajnoczi :
>
> >> I guess the question is that while the patch above could be accepted for
> >> the upcoming 2.8 (I don't see it breaking existing systems), a patch
> >> that would implement th
On Tue, Nov 22, 2016 at 12:26:34PM -0500, John Snow wrote:
>
>
> On 11/22/2016 11:16 AM, Eric Blake wrote:
> > On 11/22/2016 10:07 AM, John Snow wrote:
> > >
> > >
> > > On 11/22/2016 07:01 AM, Nikolay Shirokovskiy wrote:
> > > > Hi, everyone.
> > > >
> > > > There is a problem with current
- Original Message -
> From: "Alastair D'Silva"
> To: "Paolo Bonzini" , "Cédric Le Goater"
> , qemu-...@nongnu.org
> Cc: qemu-devel@nongnu.org, "Peter Maydell" ,
> "Andrew Jeffery" , "Joel
> Stanley"
> Sent: Wednesday, November 23, 2016 12:19:50 AM
> Subject: Re: [PATCH 2/4] qtest: Su
On Tue, Nov 22, 2016 at 06:21:24PM +0100, Paolo Bonzini wrote:
>
>
> On 22/11/2016 17:31, Stefan Hajnoczi wrote:
> > +static bool try_poll_mode(AioContext *ctx, bool enable)
> > +{
> > +if (enable && aio_poll_max_ns && ctx->poll_disable_cnt == 0) {
> > +/* See qemu_soonest_timeout() u
> -Original Message-
> From: Jan Beulich [mailto:jbeul...@suse.com]
> Sent: 23 November 2016 09:24
> To: qemu-devel@nongnu.org
> Cc: Anthony Perard ; Paul Durrant
> ; Stefano Stabellini ; xen-
> devel
> Subject: [PATCH 1/3] xen: fix quad word bufioreq handling
>
> We should not consume th
Hi,
Your series seems to have some coding style problems. See output below for
more information:
Subject: [Qemu-devel] [PATCH] audio: es1370: unregister reset call on exit
Type: series
Message-id: 1479893700-4596-1-git-send-email-ppan...@redhat.com
=== TEST SCRIPT BEGIN ===
#!/bin/bash
BASE=bas
On Tue, Nov 22, 2016 at 08:21:16PM +0100, Christian Borntraeger wrote:
> On 11/22/2016 05:31 PM, Stefan Hajnoczi wrote:
> > v3:
> > * Avoid ppoll(2)/epoll_wait(2) if polling succeeded [Paolo]
> > * Disable guest->host virtqueue notification during polling [Christian]
> > * Rebased on top of my v
On Thu, Nov 10, 2016 at 3:54 PM, Michael S. Tsirkin wrote:
> On Thu, Nov 10, 2016 at 01:56:05AM +0200, Yuri Benditovich wrote:
> >
> >
> > On Wed, Nov 9, 2016 at 10:28 PM, Michael S. Tsirkin
> wrote:
> >
> > On Wed, Nov 09, 2016 at 05:22:02PM +0200,
> yuri.benditov...@daynix.com
> > wrot
> -Original Message-
> From: Jan Beulich [mailto:jbeul...@suse.com]
> Sent: 23 November 2016 09:25
> To: qemu-devel@nongnu.org
> Cc: Anthony Perard ; Paul Durrant
> ; Stefano Stabellini ; xen-
> devel
> Subject: [PATCH 2/3] xen: slightly simplify bufioreq handling
>
> There's no point set
Hi,
On 22/11/16 18:45, Andrew Jones wrote:
>
> Andre, Alex, Eric, anybody,
>
> Any more comments on this? If not, I'll send a pull request
> to Radim and Paolo to finally get this merged.
I didn't manage to look in detail at the IPI test, but I am OK with the
rest of the GIC framework.
So I'd s
> -Original Message-
> From: Jan Beulich [mailto:jbeul...@suse.com]
> Sent: 23 November 2016 09:25
> To: qemu-devel@nongnu.org
> Cc: Anthony Perard ; Paul Durrant
> ; Stefano Stabellini ; xen-
> devel
> Subject: [PATCH 3/3] xen: ignore direction in bufioreq handling
>
> There's no way to
On Wed, Nov 23, 2016 at 04:43:01AM -0500, Paolo Bonzini wrote:
>
>
> - Original Message -
> > From: "Alastair D'Silva"
> > To: "Paolo Bonzini" , "Cédric Le Goater"
> > , qemu-...@nongnu.org
> > Cc: qemu-devel@nongnu.org, "Peter Maydell" ,
> > "Andrew Jeffery" , "Joel
> > Stanley"
> >
From: Prasad J Pandit
ES1370 audio device emulator registers a device reset call with
Qemu during initialisation. But the same is not unregistered when
audio device is unplugged. This leads to a use-after-free error
during reboot, as Qemu resets the machine. Add 'es1370_exit'
PCIDeviceClass metho
Andrew Jones writes:
> Andre, Alex, Eric, anybody,
>
> Any more comments on this? If not, I'll send a pull request
> to Radim and Paolo to finally get this merged.
Looks good to me. I successfully re-based my TCG tests on top and they
work fine ;-)
Tested-by: Alex Bennée
>
> Thanks,
> drew
>
The guest sends discard requests as u64 sector/count pairs, but the
block layer operates internally with s64/s32 pairs. The conversion
leads to IO errors in the guest, the discard request is not processed.
domU.cfg:
'vdev=xvda, format=qcow2, backendtype=qdisk, target=/x.qcow2'
domU:
mkfs.e
When cpu thrpttle is turned on in migration, the first throttle value
is cpu_throttle_initial. And then, when more throttle is needed,
the next throttle value will be cpu_throttle_increment, so maybe
it should be smaller than the percentage of CPU frequency after
first throttle. Otherwise, cpu_thro
Hi,
Your series seems to have some coding style problems. See output below for
more information:
Subject: [Qemu-devel] [PATCH v2] xen_disk: split discard input to match
internal representation
Type: series
Message-id: 20161123094914.15675-1-o...@aepfle.de
=== TEST SCRIPT BEGIN ===
#!/bin/bash
On 23/11/2016 11:05, Edgar E. Iglesias wrote:
>> >
>> > But in general, the idea is that the qtest acts as the CPU. The test
>> > cases can control the passing of time precisely, and they can _observe_
>> > additional events (such as interrupts or GPIO lines) but they don't inject
>> > anything
>>> On 23.11.16 at 10:48, wrote:
>> From: Jan Beulich [mailto:jbeul...@suse.com]
>> Sent: 23 November 2016 09:24
>>
>> We should not consume the second slot if it didn't get written yet.
>> Normal writers - i.e. Xen - would not update write_pointer between the
>> two writes, but the page may get
Hi,
On 14/11/2016 22:08, Andrew Jones wrote:
> From: Peter Xu
>
> These macros will be useful to do page alignment checks.
>
> Reviewed-by: Andre Przywara
> Signed-off-by: Peter Xu
> [drew: also added SZ_64K and changed to shifts]
> Signed-off-by: Andrew Jones
>
> ---
> v6: change to shifts
Hi,
On 14/11/2016 22:08, Andrew Jones wrote:
> Add some gicv2 support. This just adds init and enable
> functions, allowing unit tests to start messing with it.
>
> Reviewed-by: Andre Przywara
> Signed-off-by: Andrew Jones
>
> ---
> v6: added comments (register offset headers) [Alex]
> v5: sha
On 11/23/2016 03:23 AM, Paolo Bonzini wrote:
>
>
> - Original Message -
>> From: "Eric Blake"
>> To: qemu-devel@nongnu.org
>> Cc: programmingk...@gmail.com, arm...@redhat.com, pbonz...@redhat.com
>> Sent: Wednesday, November 23, 2016 5:16:27 AM
>> Subject: [PATCH 2/3] test-qga: Avoid qob
Hi Drew,
On 14/11/2016 22:08, Andrew Jones wrote:
> By adding support for launching with gicv3 we can break the 8 vcpu
> limit. This patch adds support to smp code and also selects the
> vgic model corresponding to the host. The vgic model may also be
> manually selected by adding e.g. -machine gi
The guest sends discard requests as u64 sector/count pairs, but the
block layer operates internally with s64/s32 pairs. The conversion
leads to IO errors in the guest, the discard request is not processed.
domU.cfg:
'vdev=xvda, format=qcow2, backendtype=qdisk, target=/x.qcow2'
domU:
mkfs.e
Hi Drew,
On 14/11/2016 22:08, Andrew Jones wrote:
> Reviewed-by: Alex Bennée
> Signed-off-by: Andrew Jones
>
> ---
> v6:
> - added comments [Alex]
> - added stride parameter to gicv3_set_redist_base [Andre]
> - redist-wait s/rwp/uwp/ and comment [Andre]
> - removed unnecessary wait-for-rwps
> -Original Message-
> From: Jan Beulich [mailto:jbeul...@suse.com]
> Sent: 23 November 2016 10:36
> To: Paul Durrant
> Cc: Anthony Perard ; Stefano Stabellini
> ; xen-devel ;
> qemu-devel@nongnu.org
> Subject: RE: [PATCH 1/3] xen: fix quad word bufioreq handling
>
> >>> On 23.11.16 at 10
Hi,
Your series failed automatic build test. Please find the testing commands and
their output below. If you have docker installed, you can probably reproduce it
locally.
Subject: [Qemu-devel] [PATCH] migration: check the value of cpu throttle in
migrate_set_parameters
Type: series
Message-id: 1
On 11/23/2016 03:25 AM, Paolo Bonzini wrote:
>> The qobject_from_jsonf() function implements a pseudo-printf
>> language for creating a QObject; however, it is hard-coded to
>> only parse a subset of formats understood by printf(). In
>> particular, any use of a 64-bit integer works only if the
>>
On 23/11/2016 10:44, Stefan Hajnoczi wrote:
> I thought about the final poll but decided it was nicer for virtio.c to
> do it internally. Not all .io_poll_end() implementations may require an
> additional poll so it seemed more optimal to leave it up to each
> callback.
>
> If you prefer the ru
On Wed, Nov 23, Olaf Hering wrote:
> > > +if (!blk_split_discard(ioreq, req->sector_number,
> > > req->nr_sectors)) {
> > > +goto err;
> > How is error handling supposed to work here?
In the guest the cmd is stuck, instead of getting an IO error:
[ 91.966404] mkfs.ext4
Hi Drew,
On 14/11/2016 22:08, Andrew Jones wrote:
> Signed-off-by: Andrew Jones
>
> ---
> v6: move most gicv2/gicv3 wrappers to common code [Alex]
> v5:
> - fix copy+paste error in gicv3_write_eoir [drew]
> - use modern register names [Andre]
> v4:
> - heavily comment gicv3_ipi_send_tlist() [
Ping.
On Fri, Nov 18, Olaf Hering wrote:
> On Fri, Nov 18, Olaf Hering wrote:
>
> > @@ -708,12 +743,10 @@ static int ioreq_runio_qemu_aio(struct ioreq *ioreq)
> > +if (!blk_split_discard(ioreq, req->sector_number,
> > req->nr_sectors)) {
> > +goto err;
>
> How is error hand
On 11/22/2016 10:25 PM, Laurent Vivier wrote:
On 22/11/2016 18:26, Marcel Apfelbaum wrote:
On 11/18/2016 05:52 PM, Andrew Jones wrote:
On Wed, Nov 16, 2016 at 07:05:25PM +0200, Marcel Apfelbaum wrote:
On 11/16/2016 06:44 PM, Andrew Jones wrote:
On Sat, Nov 05, 2016 at 06:46:34PM +0200, Marc
On 11/23/2016 04:36 AM, Eric Blake wrote:
> I _really_ wish mingw would fix their headers (decide if 64-bit pid_t is
> really correct or not, and then make pid_t and getpid() match as well as
> supply id_t), but this isn't the forum to get that accomplished.
https://bugzilla.redhat.com/show_bug.c
Sergey Smolov writes:
> Hello, List!
>
> I have a subset of Aarch64 registers and I need to print something to
> QEMU log every time the emulator writes new data to them.
>
> Is this problem fully or partially solvable in QEMU?
>
> What QEMU components should I look inside to implement this?
Fo
>>> On 23.11.16 at 11:45, wrote:
> No, if QEMU is using a default ioreq server (i.e. the legacy way of doing
> things) then it's vulnerable to the guest messing with the rings and I'd
> forgotten that migrated-in guests from old QEMUs also end up using the
> default
> server, so I guess this i
Sergey Smolov writes:
> Hello, List!
>
> I have a subset of Aarch64 registers and I need to print something to
> QEMU log every time the emulator writes new data to them.
Sorry I forgot to ask what the subset was? System registers are generally
easier as they tend to end up in helpers. Also thi
Hi,
On 14/11/2016 22:08, Andrew Jones wrote:
> Allow user to select who sends ipis and with which irq,
> rather than just always sending irq=0 from cpu0.
>From a user point of view is there a way to know the list of available
tests and their arg?
>
> Signed-off-by: Andrew Jones
>
> ---
> v6:
>
Hi,
On 23/11/2016 11:09, Alex Bennée wrote:
>
> Andrew Jones writes:
>
>> Andre, Alex, Eric, anybody,
>>
>> Any more comments on this? If not, I'll send a pull request
>> to Radim and Paolo to finally get this merged.
>
> Looks good to me. I successfully re-based my TCG tests on top and they
>
Some other stages of my extra tests are currently WIP, but those that
work worked fine on the ppa I built of your debdiffs.
That covers:
- migration with various workloads
- different types of migrations (live, offline, postcopy)
- upgrading onto the new qemu version
- migration into the upgraded
Uploaded into Zesty - per SRU policy (and experience that always
something happens at the last minute at LP build/tests) waiting with the
SRU uploads until that fully migrated.
--
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
https://b
** Attachment added: "Collection of extra test logs if we have to search for
anything in them later on."
https://bugs.launchpad.net/qemu/+bug/1626972/+attachment/4781992/+files/bug-1626972-migration-fix-tinoco-sts-extraverifications.tgz
--
You received this bug notification because you are a
From: Bharata B Rao
Move instruction decode helpers to target-ppc/internal.h so that some
of these can be used from outside of translate.c. This movement also
helps to get rid of some duplicate helpers from target-ppc/fpu_helper.c.
Suggested-by: Nikunj A Dadhania
Signed-off-by: Bharata B Rao
S
From: Bharata B Rao
xscmpexpdp: VSX Scalar Compare Exponents Double-Precision
xscmpexpqp: VSX Scalar Compare Exponents Quad-Precision
Signed-off-by: Bharata B Rao
Signed-off-by: Nikunj A Dadhania
---
target-ppc/fpu_helper.c | 64 +
target-ppc/he
This series contains 18 new instructions for POWER9 ISA3.0
Vector Extract Left/Right Indexed
VSX Scalar Compare Exponents
VSX Scalar Compare Quad-Precision
Load/Store VSX Vector
Load/Store VSX Scalar
Changelog:
v0:
* Change dq/ds-form decoding for primary opcode 0x3D
* Rename
lxsd: Load VSX Scalar Dword
lxssp: Load VSX Scalar Single
Moreover, DS-Form instructions shares the same primary opcode, bits
30:31 are used to decode the instruction. Use a common routine to decode
primary opcode(0x39) - ds-form instructions and branch-out depending on
bits 30:31.
Signed-off-by:
Add _BIT to CRF_[GT,LT,EQ_SO] and introduce CRF_[GT,LT,EQ,SO] for usage
without shifts in the code. This would simplify the code.
Signed-off-by: Nikunj A Dadhania
--
Note: Have not changed CRF defines for SPE extension.
---
target-ppc/cpu.h| 21 +
target-ppc/int_hel
On Tue, Nov 22, 2016 at 11:27:53PM +0100, Paolo Bonzini wrote:
> The following changes since commit a7764f1548ef9946af30a8f96be9cef10761f0c1:
>
> Fix FreeBSD (10.x) build after 7dc9ae43 (2016-11-22 10:56:01 +)
>
> are available in the git repository at:
>
> git://github.com/bonzini/qemu.
Preserve only Intel specific details.
Signed-off-by: Marcel Apfelbaum
---
hw/pci-bridge/ioh3420.c | 150 +++-
1 file changed, 7 insertions(+), 143 deletions(-)
diff --git a/hw/pci-bridge/ioh3420.c b/hw/pci-bridge/ioh3420.c
index c8b5ac4..431266c 10064
The 'base' PCI Express Root Port includes
the common code to be re-used for all
Root Ports implementations. Most of the code
was taken from the current implementation
of Intel's IOH 3420 Root Port.
Signed-off-by: Marcel Apfelbaum
---
default-configs/arm-softmmu.mak| 1 +
default-configs/i3
From: Bharata B Rao
- xscmpodp & xscmpudp are missing flags reset.
- In xscmpodp, VXCC should be set only if VE is 0 for signalling NaN case
and VXCC should be set by explicitly checking for quiet NaN case.
- Comparison is being done only if the operands are not NaNs. However as
per ISA, it s
The Generic Root Port behaves the same as the
Intel's IOH device with id 3420, without having
Intel specific attributes.
The device has two purposes:
(1) Can be used on both X86 and ARM machines.
(2) It will allow us to tweak the behaviour
(e.g add vendor-specific PCI capabilities)
- so
From: "Hariharan T.S"
vextubrx: Vector Extract Unsigned Byte Right-Indexed VX-form
vextuhrx: Vector Extract Unsigned Halfword Right-Indexed VX-form
vextuwrx: Vector Extract Unsigned Word Right-Indexed VX-form
Signed-off-by: Hariharan T.S.
Signed-off-by: Avinesh Kumar
Signed-off-by: Nikunj A D
From: Bharata B Rao
xscmpoqp - VSX Scalar Compare Ordered Quad-Precision
xscmpuqp - VSX Scalar Compare Unordered Quad-Precision
Signed-off-by: Bharata B Rao
Signed-off-by: Nikunj A Dadhania
---
target-ppc/fpu_helper.c | 54 +
target-ppc/helper.h
If we assign the user crateable object in QEMU command
line, then the correspeonding qemu_opts for the object
doesn't be deleted, which will produce a wrong result.
If we hot unplug the object by object_del, the qemu_opts
will be leaked, ann then if we hot plug the object using
the same id by obje
On 11/23/2016 04:39 AM, Olaf Hering wrote:
> The guest sends discard requests as u64 sector/count pairs, but the
> block layer operates internally with s64/s32 pairs. The conversion
> leads to IO errors in the guest, the discard request is not processed.
>
> domU.cfg:
> 'vdev=xvda, format=qcow
stxsd: Store VSX Scalar Dword
stxssp: Store VSX Scalar SP
Moreover, DQ-Form/DS-FORM instructions shares the same primary
opcode(0x3D). For DQ-FORM bits 29:31 are used, for DS-FORM bits 30:31
are used. Common routine to decode primary opcode(0x3D) -
ds-form/dq-form instructions is required.
Signe
From: Avinesh Kumar
vextublx: Vector Extract Unsigned Byte Left
vextuhlx: Vector Extract Unsigned Halfword Left
vextuwlx: Vector Extract Unsigned Word Left
Signed-off-by: Avinesh Kumar
Signed-off-by: Nikunj A Dadhania
---
target-ppc/helper.h | 3 ++
target-ppc/int_helper.c
lxv: Load VSX Vector
lxvx: Load VSX Vector Indexed
Little/Big-endian Storage
+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+
|F0|F1|F2|F3|F4|F5|F6|F7|E0|E1|E2|E3|E4|E5|E6|E7|
+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+
Vector load results:
BE:
+--+--+--+--+--+
://github.com/dgibson/qemu.git tags/ppc-for-2.8-20161123
>
> for you to fetch changes up to 5c4537bded40640b166ec77e112592174b048c21:
>
> spapr: Fix 2.7<->2.8 migration of PCI host bridge (2016-11-23 12:00:48
> +1100)
>
> -
When cpu thrpttle is turned on in migration, the first throttle value
is cpu_throttle_initial. And then, when more throttle is needed,
the next throttle value will be cpu_throttle_increment, so maybe
it should be smaller than the percentage of CPU frequency after
first throttle. Otherwise, cpu_thro
The Generic Root Port behaves the same as the
Intel's IOH device with id 3420, without having
Intel specific attributes.
The device has two purposes:
(1) Can be used on both X86 and ARM machines.
(2) It will allow us to tweak the behaviour
(e.g add vendor-specific PCI capabilities)
- so
On 23/11/2016 11:36, Eric Blake wrote:
> This is the key, look at:
> $ git grep -A2 strdup_printf tests/test-qga.c
>
> and you'll see that my change is no grosser than the rest of the file.
>
Oh well... I guess with a better commit message the patch is fine.
Paolo
signature.asc
Description
On Tue, 22 Nov 2016 16:02:12 +0100
Pradeep Kiruvale wrote:
> On 22 November 2016 at 14:55, Greg Kurz wrote:
>
> > On Tue, 22 Nov 2016 14:51:12 +0100
> > Alberto Garcia wrote:
> >
> > > On Tue 22 Nov 2016 01:49:51 PM CET, Greg Kurz wrote:
> > >
> > > > This will allow other subsystems (i.e. fsd
On 23 November 2016 at 13:13, Greg Kurz wrote:
> On Tue, 22 Nov 2016 16:02:12 +0100
> Pradeep Kiruvale wrote:
>
> > On 22 November 2016 at 14:55, Greg Kurz wrote:
> >
> > > On Tue, 22 Nov 2016 14:51:12 +0100
> > > Alberto Garcia wrote:
> > >
> > > > On Tue 22 Nov 2016 01:49:51 PM CET, Greg Kur
Am 23.11.2016 um 12:40 hat Eric Blake geschrieben:
> On 11/23/2016 04:39 AM, Olaf Hering wrote:
> > The guest sends discard requests as u64 sector/count pairs, but the
> > block layer operates internally with s64/s32 pairs. The conversion
> > leads to IO errors in the guest, the discard request is
From: Vijaya Kumar K
This temporary patch adds kernel API definitions. Use proper header update
procedure after these features are released.
Signed-off-by: Pavel Fedin
Signed-off-by: Vijaya Kumamr K
---
linux-headers/asm-arm/kvm.h | 13 +
linux-headers/asm-arm64/kvm.h | 13 +
From: Vijaya Kumar K
Reset CPU interface registers of GICv3 when CPU is reset.
For this, object interface is used, which is called from
arm_cpu_reset function.
Signed-off-by: Vijaya Kumar K
---
hw/intc/arm_gicv3_kvm.c| 37 +
include/hw/arm/linux-boot
A typo prevents ISA interrupts from being recognized on cpu0,
which is where the smp kernel normally wants to see them.
Signed-off-by: Richard Henderson
---
hw/alpha/typhoon.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/alpha/typhoon.c b/hw/alpha/typhoon.c
index 883db1
it://github.com/rth7680/qemu.git tags/pull-axp-20161123
for you to fetch changes up to 424ad8388f89f4202a7836d003273f23ebe04b09:
target-alpha: Fix interrupt mask for cpu1 (2016-11-22 16:53:53 +0100)
Fix alpha smp in
On Wed, Nov 23, 2016 at 12:05:42PM +0100, Auger Eric wrote:
> Hi Drew,
>
> On 14/11/2016 22:08, Andrew Jones wrote:
> > Signed-off-by: Andrew Jones
> >
> > ---
> > v6: move most gicv2/gicv3 wrappers to common code [Alex]
> > v5:
> > - fix copy+paste error in gicv3_write_eoir [drew]
> > - use m
Hi Andre,
On 18/11/2016 14:06, Andrew Jones wrote:
> Hi Andre,
>
> I'm so pleased to see this series. Thank you!
>
> On Thu, Nov 17, 2016 at 05:57:49PM +, Andre Przywara wrote:
>> This adds an MMIO subtest to the GIC test.
>> It accesses some generic GICv2 registers and does some sanity test
On Wed, Nov 23, 2016 at 12:28:34PM +0100, Auger Eric wrote:
> Hi,
>
> On 14/11/2016 22:08, Andrew Jones wrote:
> > Allow user to select who sends ipis and with which irq,
> > rather than just always sending irq=0 from cpu0.
> From a user point of view is there a way to know the list of available
>
This is a combination of two patch sets that have had previous
revisions, as well as some new patches. I wanted to post this
all together since Alex was having trouble with prerequisites.
The full tree is at
git://github.com/rth7680/qemu.git tcg-2.9
Changes since v3:
* PPC host patches have
Signed-off-by: Richard Henderson
---
tcg/arm/tcg-target.h | 4 ++--
tcg/arm/tcg-target.inc.c | 22 ++
2 files changed, 24 insertions(+), 2 deletions(-)
diff --git a/tcg/arm/tcg-target.h b/tcg/arm/tcg-target.h
index d1fe12b..4e30728 100644
--- a/tcg/arm/tcg-target.h
+++ b
Adds tcg_gen_extract_* and tcg_gen_sextract_* for extraction of
fixed position bitfields, much like we already have for deposit.
Signed-off-by: Richard Henderson
---
tcg/README | 20 ++-
tcg/aarch64/tcg-target.h | 4 +
tcg/arm/tcg-target.h | 2 +
tcg/i386/tcg-target.h|
Assert that len is not 0.
Since we have asserted that ofs + len <= N, a later
check for len == N implies that ofs == 0.
Signed-off-by: Richard Henderson
---
tcg/tcg-op.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/tcg/tcg-op.c b/tcg/tcg-op.c
index c185b9c..b17f03f
Signed-off-by: Richard Henderson
---
tcg/arm/tcg-target.h | 36
tcg/arm/tcg-target.inc.c | 41 +
2 files changed, 33 insertions(+), 44 deletions(-)
diff --git a/tcg/arm/tcg-target.h b/tcg/arm/tcg-target.h
index 8e72
Signed-off-by: Richard Henderson
---
tcg/optimize.c | 15 +++
1 file changed, 15 insertions(+)
diff --git a/tcg/optimize.c b/tcg/optimize.c
index f41ed2c..9e26bb7 100644
--- a/tcg/optimize.c
+++ b/tcg/optimize.c
@@ -1105,6 +1105,21 @@ void tcg_optimize(TCGContext *s)
While we don't require a new opcode, it is handy to have an expander
that knows the first source is zero.
Signed-off-by: Richard Henderson
---
tcg/tcg-op.c | 143 +++
tcg/tcg-op.h | 6 +++
2 files changed, 149 insertions(+)
diff --git a/
Signed-off-by: Richard Henderson
---
tcg/aarch64/tcg-target.h | 8
tcg/aarch64/tcg-target.inc.c | 14 ++
2 files changed, 18 insertions(+), 4 deletions(-)
diff --git a/tcg/aarch64/tcg-target.h b/tcg/aarch64/tcg-target.h
index 410c31b..4a74bd8 100644
--- a/tcg/aarch64/tc
Reviewed-by: David Gibson
Signed-off-by: Richard Henderson
---
tcg/ppc/tcg-target.h | 4 ++--
tcg/ppc/tcg-target.inc.c | 10 ++
2 files changed, 12 insertions(+), 2 deletions(-)
diff --git a/tcg/ppc/tcg-target.h b/tcg/ppc/tcg-target.h
index c765d3e..b42c57a 100644
--- a/tcg/ppc/tcg
Signed-off-by: Richard Henderson
---
disas/i386.c | 12 ++--
1 file changed, 10 insertions(+), 2 deletions(-)
diff --git a/disas/i386.c b/disas/i386.c
index 57145d0..07f871f 100644
--- a/disas/i386.c
+++ b/disas/i386.c
@@ -682,6 +682,7 @@ fetch_data(struct disassemble_info *info, bfd_byt
Signed-off-by: Richard Henderson
---
tcg/mips/tcg-target.h | 2 +-
tcg/mips/tcg-target.inc.c | 4
2 files changed, 5 insertions(+), 1 deletion(-)
diff --git a/tcg/mips/tcg-target.h b/tcg/mips/tcg-target.h
index 1bcea3b..f1c3137 100644
--- a/tcg/mips/tcg-target.h
+++ b/tcg/mips/tcg-targe
Signed-off-by: Richard Henderson
---
tcg/i386/tcg-target.h | 12 +---
tcg/i386/tcg-target.inc.c | 38 ++
2 files changed, 47 insertions(+), 3 deletions(-)
diff --git a/tcg/i386/tcg-target.h b/tcg/i386/tcg-target.h
index 7625188..dc19c47 100644
---
Signed-off-by: Richard Henderson
---
target-alpha/translate.c | 67 ++--
1 file changed, 42 insertions(+), 25 deletions(-)
diff --git a/target-alpha/translate.c b/target-alpha/translate.c
index 114927b..5ac2277 100644
--- a/target-alpha/translate.c
+++
Signed-off-by: Richard Henderson
---
target-alpha/helper.h | 2 --
target-alpha/int_helper.c | 10 --
target-alpha/translate.c | 4 ++--
3 files changed, 2 insertions(+), 14 deletions(-)
diff --git a/target-alpha/helper.h b/target-alpha/helper.h
index 004221d..eed3906 100644
--- a
Signed-off-by: Richard Henderson
---
tcg/s390/tcg-target.h | 4 ++--
tcg/s390/tcg-target.inc.c | 11 +++
2 files changed, 13 insertions(+), 2 deletions(-)
diff --git a/tcg/s390/tcg-target.h b/tcg/s390/tcg-target.h
index d650a72..e9ac12e 100644
--- a/tcg/s390/tcg-target.h
+++ b/tcg/s
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