Hi,
> > Side note for usb: In practice you don't want to use the tons of
> > uhci/ehci controllers present in the original q35 but plug xhci into one
> > of the pcie root ports instead (unless your guest doesn't support xhci).
>
> I've wondered about that recently. For i440fx machinetypes if yo
Richard Henderson writes:
> On 08/11/2016 08:24 AM, Alex Bennée wrote:
>> This adds calls to the assert_(memory|tb)_lock for all public APIs which
>> are documented as needing them held for linux-user mode. The asserts are
>> NOPs for system-mode although these will be converted when MTTCG is
>>
On Wed, Sep 07, 2016 at 04:02:39PM +1000, David Gibson wrote:
> On Wed, Sep 07, 2016 at 01:32:22PM +0800, Peter Xu wrote:
> > IOMMU Notifier list is used for notifying IO address mapping changes.
> > Currently VFIO is the only user.
> >
> > However it is possible that future consumer like vhost wo
Note: Also affects Migration Xenial->Trusty (tested and ran into the
same issue, that was how I found the bug) and very likely also
Yakkety->Trusty.
qemu | 2.0.0+dfsg-2ubuntu1.27 | trusty-security | source
qemu | 1:2.5+dfsg-5ubuntu10.4 | xenial-updates| source
Subscrib
David Gibson writes:
> On Wed, Sep 07, 2016 at 10:17:42AM +0530, Nikunj A Dadhania wrote:
>> David Gibson writes:
>>
>> > [ Unknown signature status ]
>> > On Fri, Sep 02, 2016 at 12:02:55PM +0530, Nikunj A Dadhania wrote:
>> >> Signed-off-by: Nikunj A Dadhania
>> >
>> > This really needs a co
On Wed, Sep 07, 2016 at 04:05:50PM +1000, David Gibson wrote:
> On Wed, Sep 07, 2016 at 01:32:23PM +0800, Peter Xu wrote:
> > Considering that we may have multiple IOMMU notifier consumers in the
> > future, converting iommu_ops.notify_{started|stopped} into some more
> > general form. Now we can t
Hello Edgar,
thanks for your comments.
On 06/09/2016 23:43, Edgar E. Iglesias wrote:
Hi,
Sorry for the delay. I have a few questions.
I don't fully understand the purpose of this. Could you elaborate a little on
that?
You need a real IPI signal to drive this I guess, so it's a little bit of
Now that the 2.8 tree is open, I'd like to resurrect this earlier patch
to switch the macio controller over to the new byte-aligned DMA helpers:
https://lists.gnu.org/archive/html/qemu-devel/2016-05/msg04907.html.
The first patch in the series is a hack to work around the issue that
byte-aligned q
On 09/06/16 20:32, Alex Williamson wrote:
> On Tue, 6 Sep 2016 21:14:11 +0300
> Marcel Apfelbaum wrote:
>
>> On 09/06/2016 06:38 PM, Alex Williamson wrote:
>>> On Thu, 1 Sep 2016 16:22:07 +0300
>>> Marcel Apfelbaum wrote:
+5. Device assignment
+
+Host devices
On Wed, Sep 07, 2016 at 09:24:39AM +0200, Christian Pinto wrote:
> Hello Edgar,
>
> thanks for your comments.
>
Thanks for the clarification, I have a few follow-up questions/comments.
>
> On 06/09/2016 23:43, Edgar E. Iglesias wrote:
> >Hi,
> >
> >Sorry for the delay. I have a few questions.
On 09/06/16 13:35, Gerd Hoffmann wrote:
> Hi,
>
>>> +Plug only legacy PCI devices as Root Complex Integrated Devices
>>> +even if the PCIe spec does not forbid PCIe devices.
>>
>> I suggest "even though the PCI Express spec does not forbid PCI Express
>> devices as Integrated Devices". (Detail i
On 09/07/2016 10:53 AM, Laszlo Ersek wrote:
On 09/06/16 13:35, Gerd Hoffmann wrote:
Hi,
[...]
Side note: the linux kernel allocates io space nevertheless, so
checking /proc/ioports after boot doesn't tell you what the firmware
did.
Yeah, we've got to convince Linux to stop doing that.
** Changed in: qemu (Ubuntu)
Status: New => Triaged
** Changed in: qemu (Ubuntu)
Importance: Undecided => High
--
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
https://bugs.launchpad.net/bugs/1536487
Title:
Unable to migr
On 09/07/2016 09:21 AM, Gerd Hoffmann wrote:
Hi,
ports, if that's allowed). For example:
- 1-32 ports needed: use root ports only
- 33-64 ports needed: use 31 root ports, and one switch with 2-32
downstream ports
I expect you rarely need any switches. You can go multifunction with
the p
On 09/07/16 08:21, Gerd Hoffmann wrote:
> Hi,
>
ports, if that's allowed). For example:
- 1-32 ports needed: use root ports only
- 33-64 ports needed: use 31 root ports, and one switch with 2-32
downstream ports
>
> I expect you rarely need any switches. You can
Am 06.09.2016 um 23:44 hat John Snow geschrieben:
> On 09/05/2016 05:15 AM, Markus Armbruster wrote:
> >John Snow writes:
> >>(3) Just allow flushes to work on devices not visible to the guest,
> >>which is what I've done here. Internal requests should work, Guest
> >>requests should fail.
> >
> >
> From: Alex Williamson
> Sent: Wednesday, September 07, 2016 5:29 AM
>
> On Wed, 7 Sep 2016 01:05:11 +0530
> Kirti Wankhede wrote:
>
> > On 9/6/2016 11:10 PM, Alex Williamson wrote:
> > > On Sat, 3 Sep 2016 22:04:56 +0530
> > > Kirti Wankhede wrote:
> > >
> > >> On 9/3/2016 3:18 AM, Paolo Bonz
On 09/07/2016 11:06 AM, Laszlo Ersek wrote:
On 09/07/16 08:21, Gerd Hoffmann wrote:
Hi,
ports, if that's allowed). For example:
- 1-32 ports needed: use root ports only
- 33-64 ports needed: use 31 root ports, and one switch with 2-32
downstream ports
I expect you rarely need any switch
On Wed, 2016-09-07 at 15:46 +1000, David Gibson wrote:
> Right, that's probably better. Not immediately sure how the
> scomdevice would get hold of its chip's scom AS, but we can probably
> figure out something.
Passed at instanciation ?
Cheers,
Ben.
Am 06.09.2016 um 21:04 hat Eric Blake geschrieben:
> When qemu uses iscsi devices in sg mode, iscsilun->block_size
> is left at 0. Prior to commits cf081fca and similar, when
> block limits were tracked in sectors, this did not matter:
> various block limits were just left at 0. But when we start
Ashijeet Acharya wrote:
> Mark old-commands for speed and downtime as deprecated.
> Move max-bandwidth and downtime-limit into migrate-set-parameters for
> setting maximum migration speed and expected downtime limit parameters
> respectively.
> Change downtime units to milliseconds (only for new-c
Benjamin Herrenschmidt writes:
> On Wed, 2016-09-07 at 10:17 +0530, Nikunj A Dadhania wrote:
>> > David Gibson writes:
>>
>> >
>> > [ Unknown signature status ]
>> > On Fri, Sep 02, 2016 at 12:02:55PM +0530, Nikunj A Dadhania wrote:
>> > >
>> > > > > > Signed-off-by: Nikunj A Dadhania
>> >
Marc-André Lureau writes:
> Hi
>
> On Tue, Sep 6, 2016 at 7:58 PM Markus Armbruster wrote:
>
>> QAPI language design issues, copying Eric.
>>
>> Marc-André Lureau writes:
>>
>> > Hi
>> >
>> > On Tue, Sep 6, 2016 at 5:00 PM Markus Armbruster
>> wrote:
>> >
>> >> Marc-André Lureau writes:
>> >>
Peter Xu writes:
> v4 changes:
> - remove two standard headers since they are included in osdep.h
> already [Fam]
> - make sure it passes build on all platforms (no --target-list
> specified during configure)
>
> v3 changes:
> - implement error_report_fatal using function [Markus]
> - provid
On 07/09/2016 00:07, Greg Kurz wrote:
> On Tue, 6 Sep 2016 15:17:57 +0200
> Laurent Vivier wrote:
>
>> Add a first test to validate the protocol:
>>
>> - rtas/get-time-of-day compares the time
>> from the guest with the time from the host.
>>
>> Signed-off-by: Laurent Vivier
>> ---
>> v4:
>
On 09/07/2016 09:15 AM, Jeff Cody wrote:
> On Tue, Sep 06, 2016 at 06:11:19PM +0300, Denis V. Lunev wrote:
>> bdrv_is_allocated_above() returns true in the case if qcow2 even for
>> completely zeroed areas as BDRV_BLOCK_ALLOCATED flag is set in both
>> cases.
> Hi Denis,
>
> Not just qcow2. BDRV_B
On Wed, 09/07 10:23, Alex Bennée wrote:
> Last time I needed to do error reporting I was told the error_setg
> method was the correct way to do it and the report/exit case made sense
> only in the top level. Before we add even more error reporting
> primitives can we update HACKING (or possibly add
On 06/09/2016 23:41, Greg Kurz wrote:
> On Tue, 6 Sep 2016 15:17:56 +0200
> Laurent Vivier wrote:
>
>> And add support for ppc64.
>>
>> Signed-off-by: Laurent Vivier
>> ---
>> v2:
>> - remove useless parenthesis, inline
>>
>
> This works indeed but I'm just feeling curious about the QOSOps t
On 11/08/2016 17:24, Alex Bennée wrote:
> Once TCG gains the ability to sleep individual threads we need to make
> sure they don't sleep when safe work is pending as all threads need to
> go through the process_queued_work function. Also if we have multiple
> threads wait_for_safe_work can now sl
On 11/08/2016 17:24, Alex Bennée wrote:
> +if (cpu->created && !qemu_cpu_is_self(cpu)) {
Is the cpu->created necessary? It may introduce some potential races
and doesn't really add much.
> +if (atomic_bool_cmpxchg(&cpu->pending_tlb_flush, false, true)) {
This is slightly cheaper:
On 11/08/2016 17:24, Alex Bennée wrote:
> -if (atomic_bool_cmpxchg(&cpu->pending_tlb_flush, false, true)) {
> +if (atomic_mb_read(&cpu->pending_tlb_flush) != ALL_MMUIDX_BITS) {
> +atomic_mb_set(&cpu->pending_tlb_flush, ALL_MMUIDX_BITS);
This can use atomic_xchg as wel
Paolo Bonzini writes:
> On 07/09/2016 05:25, Richard Henderson wrote:
>>>
>>> +/* Set to kick if we have to do more than one vCPU */
>>> +if (CPU_NEXT(first_cpu)) {
>>> +kick_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, kick_tcg_thread,
>>> + &kick_t
Richard Henderson writes:
> On 08/11/2016 08:24 AM, Alex Bennée wrote:
>> Currently we rely on the side effect of the main loop grabbing the
>> iothread_mutex to give any long running basic block chains a kick to
>> ensure the next vCPU is scheduled. As this code is being re-factored and
>> rati
On Wed, Sep 07, 2016 at 03:23:16PM +0800, Peter Xu wrote:
> On Wed, Sep 07, 2016 at 04:05:50PM +1000, David Gibson wrote:
> > On Wed, Sep 07, 2016 at 01:32:23PM +0800, Peter Xu wrote:
> > > Considering that we may have multiple IOMMU notifier consumers in the
> > > future, converting iommu_ops.noti
On Wed, Sep 07, 2016 at 03:09:16PM +0800, Peter Xu wrote:
> On Wed, Sep 07, 2016 at 04:02:39PM +1000, David Gibson wrote:
> > On Wed, Sep 07, 2016 at 01:32:22PM +0800, Peter Xu wrote:
> > > IOMMU Notifier list is used for notifying IO address mapping changes.
> > > Currently VFIO is the only user.
From: Greg Kurz
We abort a few lines above if kernel_xics_fd == -1.
This is only code cleanup.
Signed-off-by: Greg Kurz
Signed-off-by: David Gibson
---
hw/intc/xics_kvm.c | 20
1 file changed, 8 insertions(+), 12 deletions(-)
diff --git a/hw/intc/xics_kvm.c b/hw/intc/xi
From: Nikunj A Dadhania
ISA 3.0 instruction for adding immediate value shifted with next
instruction address and return the result in the target register.
Signed-off-by: Nikunj A Dadhania
Reviewed-by: David Gibson
Signed-off-by: David Gibson
---
target-ppc/translate.c | 26 ++
From: "Aneesh Kumar K.V"
The patch adds CPU PVR definition for POWER9 and enables QEMU to launch
guests/linux-user in TCG mode.
Signed-off-by: Aneesh Kumar K.V
[ Added POWER9 alias, POWER9 SPAPR core and dropped MMU defines ]
Signed-off-by: Nikunj A Dadhania
[dwg: Dropped sPAPR core type again
The following changes since commit 2926375cffce464fde6b4dabaed1e133d549af39:
Merge remote-tracking branch 'remotes/kevin/tags/for-upstream' into staging
(2016-09-06 17:18:17 +0100)
are available in the git repository at:
git://github.com/dgibson/qemu.git tags/ppc-for-2.8-2016090
From: Nikunj A Dadhania
This flag will be used for POWER9 instructions.
Signed-off-by: Nikunj A Dadhania
Reviewed-by: David Gibson
Signed-off-by: David Gibson
---
target-ppc/cpu.h| 5 -
target-ppc/translate_init.c | 2 +-
2 files changed, 5 insertions(+), 2 deletions(-)
diff
From: Nikunj A Dadhania
ISA 3.0 Compare Ranged Byte instruction useful for
isupper/islower/isaplha kind of operation.
Signed-off-by: Nikunj A Dadhania
Reviewed-by: Richard Henderson
Signed-off-by: David Gibson
---
target-ppc/translate.c | 39 +++
1 file ch
From: Nikunj A Dadhania
Adding following instructions for ISA3.0 support
modud: Modulo Unsigned Dword
modsd: Modulo Signed Dword
Signed-off-by: Nikunj A Dadhania
Reviewed-by: Richard Henderson
---
target-ppc/translate.c | 48
1 file changed, 4
From: Nikunj A Dadhania
Adding following instructions:
moduw: Modulo Unsigned Word
modsw: Modulo Signed Word
Signed-off-by: Nikunj A Dadhania
Reviewed-by: Richard Henderson
Signed-off-by: David Gibson
---
target-ppc/translate.c | 48
1 file c
From: Nikunj A Dadhania
Add ISA3.0: Count trailing zeros word instruction.
Signed-off-by: Nikunj A Dadhania
Reviewed-by: Richard Henderson
Signed-off-by: David Gibson
---
target-ppc/helper.h | 1 +
target-ppc/int_helper.c | 5 +
target-ppc/translate.c | 11 +++
3 files cha
From: Nikunj A Dadhania
maddld: Multiply-Add Low Doubleword
Multiplies two 64-bit registers (RA * RB), adds third register(RC) to
the result(quadword) and returns the lower dword in the target
register(RT).
Signed-off-by: Nikunj A Dadhania
Reviewed-by: Richard Henderson
Signed-off-by: David G
From: Cédric Le Goater
spapr_pci would also be a good candidate but the macro _FDT is
slightly different. It returns and does not exit.
Signed-off-by: Cédric Le Goater
Signed-off-by: David Gibson
---
hw/ppc/spapr.c| 11 +--
hw/ppc/spapr_events.c | 11 +--
include/hw/pp
From: Nikunj A Dadhania
maddhd: Multiply-Add High Doubleword
maddhdu: Multiply-Add High Doubleword Unsigned
Above two instruction are dual form and differ by 1 bit
(31st bit)
Multiplies two 64-bit registers (RA * RB), adds third register(RC) to
the result(quadword) and returns the higher dword
From: Nikunj A Dadhania
Search a byte in the stream of 8bytes provided in the register
Suggested-by: Richard Henderson
Signed-off-by: Nikunj A Dadhania
Reviewed-by: Richard Henderson
Signed-off-by: David Gibson
---
target-ppc/helper.h | 1 +
target-ppc/int_helper.c | 22 +++
From: Benjamin Herrenschmidt
Instead of using the same helpers called from translate.c, let's have
a bunch of functions that take the various argument combinations,
especially the retaddr which will be needed in subsequent patches,
and leave the helpers to be just that, helpers for translate.c
W
From: Benjamin Herrenschmidt
This is no longer necessary as the helpers will properly retrieve
the return address when needed. Also remove gen_update_current_nip()
which didn't seem to make much sense to me.
Signed-off-by: Benjamin Herrenschmidt
Signed-off-by: David Gibson
---
target-ppc/cpu.
From: Benjamin Herrenschmidt
This is no longer necessary as the helpers will properly retrieve
the return address when needed.
Signed-off-by: Benjamin Herrenschmidt
Signed-off-by: David Gibson
---
target-ppc/mmu_helper.c | 12 ++--
target-ppc/translate.c | 1 -
2 files changed, 6 in
From: Nikunj A Dadhania
ISA 3.0 has introduced EO - Expanded Opcode. Introduce third level
indirect opcode table and corresponding parsing routines.
EO (11:12) Expanded opcode field
Formats: XX1
EO (11:15) Expanded opcode field
Formats: VX, X, XX2
Signed-off-by: Nikunj A Dadhania
[dwg: Trivia
From: Benjamin Herrenschmidt
Instead of relying on NIP having been updated already
Signed-off-by: Benjamin Herrenschmidt
Signed-off-by: David Gibson
---
target-ppc/fpu_helper.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/target-ppc/fpu_helper.c b/target-ppc/fpu_h
From: Benjamin Herrenschmidt
This is no longer necessary as the helpers will properly retrieve
the return address when needed.
Signed-off-by: Benjamin Herrenschmidt
Signed-off-by: David Gibson
---
target-ppc/excp_helper.c | 6 --
target-ppc/translate.c | 8
2 files changed, 4 i
From: Benjamin Herrenschmidt
Makes things a bit more manageable
Signed-off-by: Benjamin Herrenschmidt
Signed-off-by: David Gibson
---
target-ppc/translate.c | 365 +---
target-ppc/translate/dfp-impl.c | 212 +++
target-ppc/trans
From: Vivek Andrew Sha
The CR number is provided in the opcode as - BFA (11:13)
Returns:
-1 if bit 0 of CR field is set
1 if bit 1 of CR field is set
0 otherwise.
Signed-off-by: Vivek Andrew Sha
[ reworded commit, used 32bit ops as crf is 32bits ]
Signed-off-by: Nikunj A Dadhania
Revi
From: Sandipan Das
Add ISA3.0 Count trailing zeros double word
Signed-off-by: Sandipan Das
[ added ISA300 flag ]
Signed-off-by: Nikunj A Dadhania
Reviewed-by: Richard Henderson
Signed-off-by: David Gibson
---
target-ppc/helper.h | 1 +
target-ppc/int_helper.c | 5 +
target-ppc/tra
From: Benjamin Herrenschmidt
Just generate an alignment interrupt
Signed-off-by: Benjamin Herrenschmidt
Signed-off-by: David Gibson
---
target-ppc/translate.c | 29 +
1 file changed, 29 insertions(+)
diff --git a/target-ppc/translate.c b/target-ppc/translate.c
ind
From: Vivek Andrew Sha
Adds Vector Shift Right Variable instruction.
Signed-off-by: Vivek Andrew Sha
[ reverse the order of computation to avoid temporary array ]
Signed-off-by: Nikunj A Dadhania
Reviewed-by: Richard Henderson
Signed-off-by: David Gibson
---
target-ppc/helper.h
From: Benjamin Herrenschmidt
We need to pass it to the raise helper since we don't update it
before the calls.
Signed-off-by: Benjamin Herrenschmidt
Signed-off-by: David Gibson
---
target-ppc/mmu-hash64.c | 16
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/tar
From: Benjamin Herrenschmidt
Signed-off-by: Benjamin Herrenschmidt
Signed-off-by: David Gibson
---
linux-user/main.c| 12 ++--
target-ppc/excp_helper.c | 146 ++-
target-ppc/mmu_helper.c | 7 +--
target-ppc/translate.c | 60 +++
From: Benjamin Herrenschmidt
Instead, pass GETPC() result to the corresponding helpers. This
requires a bit of fiddling to get the PC (hopefully) right in
the case where we generate a program check, though the hacks there
are temporary, a subsequent patch will clean this all up by always
having t
From: Benjamin Herrenschmidt
Move the NIP update to after the conditional branch so that we
don't do it if we aren't going to take the alignment exception
Signed-off-by: Benjamin Herrenschmidt
Signed-off-by: David Gibson
---
target-ppc/translate.c | 3 +--
1 file changed, 1 insertion(+), 2 de
From: Benjamin Herrenschmidt
Instead of relying on NIP having been updated already.
Signed-off-by: Benjamin Herrenschmidt
[dwg: Fold in fix to mark function always_inline]
Signed-off-by: David Gibson
---
target-ppc/fpu_helper.c | 67 +
1 file ch
From: Vivek Andrew Sha
vslv: Vector Shift Left Variable
Signed-off-by: Vivek Andrew Sha
Signed-off-by: Nikunj A Dadhania
Reviewed-by: David Gibson
Reviewed-by: Richard Henderson
Signed-off-by: David Gibson
---
target-ppc/helper.h | 1 +
target-ppc/int_helper.c | 14 +++
From: Benjamin Herrenschmidt
We don't implement imprecise FP exceptions and using store_current
which sets SRR1 to the *previous* instruction never makes sense
for these. So let's be truthful and make them precise, which is
allowed by the architecture.
Signed-off-by: Benjamin Herrenschmidt
Sign
From: Benjamin Herrenschmidt
The current mapping, while correct for the base ports (which is all the
driver uses these days), is wrong for the extended registers.
I suspect the bugs come from incorrect tables in the CHRP IO Ref document,
I have verified the new values here match Apple's MacTech.
From: Benjamin Herrenschmidt
Instead, pass GETPC() result to the corresponding helpers.
Signed-off-by: Benjamin Herrenschmidt
Signed-off-by: David Gibson
---
target-ppc/mem_helper.c | 11 ++-
target-ppc/translate.c | 6 --
2 files changed, 6 insertions(+), 11 deletions(-)
diff
From: Nikunj A Dadhania
While implementing modulo instructions figured out that the
implementation uses many branches. Change the logic to achieve the
branch-less code. Undefined value is set to dividend in case of invalid
input.
Signed-off-by: Nikunj A Dadhania
Reviewed-by: Richard Henderson
From: Benjamin Herrenschmidt
This is no longer necessary as the helpers will properly retrieve
the return address.
Signed-off-by: Benjamin Herrenschmidt
Signed-off-by: David Gibson
---
target-ppc/translate/fp-impl.c | 28
target-ppc/translate/vsx-impl.c | 6
From: Sandipan Das
DFP Test Significance Immediate [Quad]
Signed-off-by: Sandipan Das
Signed-off-by: Nikunj A Dadhania
Reviewed-by: David Gibson
Signed-off-by: David Gibson
---
target-ppc/dfp_helper.c | 35 +++
target-ppc/helper.h | 2 ++
From: Benjamin Herrenschmidt
This is no longer necessary as the helpers will properly retrieve
the return address when needed
Signed-off-by: Benjamin Herrenschmidt
Signed-off-by: David Gibson
---
target-ppc/timebase_helper.c | 23 +--
target-ppc/translate.c | 12
From: Benjamin Herrenschmidt
We are always generating the "else" case of the condition even when
generating an unconditional branch that will never hit it.
Signed-off-by: Benjamin Herrenschmidt
Reviewed-by: Richard Henderson
Signed-off-by: David Gibson
---
target-ppc/translate.c | 14 +++
From: Sandipan Das
Adds following instructions:
vabsdub: Vector Absolute Difference Unsigned Byte
vabsduh: Vector Absolute Difference Unsigned Halfword
vabsduw: Vector Absolute Difference Unsigned Word
Signed-off-by: Sandipan Das
[ use ISA300 define. Drop etype ]
Signed-off-by: Nikunj A Dadhan
From: Benjamin Herrenschmidt
Mostly turn "store" type of helpers into TCG_CALL_NO_WG because
they can take exceptions. Also fixup_thrm doesn't read nor write
the tracked environment.
Signed-off-by: Benjamin Herrenschmidt
Reviewed-by: Richard Henderson
Signed-off-by: David Gibson
---
target-p
From: Benjamin Herrenschmidt
Those helpers never load from or store to the TCG tracked environment,
not do they generate synchronous exceptions (they might generate an
asynchronous interrupt but that's not an issue here).
So we can make them all use TCG_CALL_NO_RWG
Signed-off-by: Benjamin Herre
From: Nikunj A Dadhania
extswsli : Extend Sign Word & Shift Left Immediate
Signed-off-by: Nikunj A Dadhania
Reviewed-by: David Gibson
Reviewed-by: Richard Henderson
Signed-off-by: David Gibson
---
target-ppc/translate.c | 28
1 file changed, 28 insertions(+)
di
From: Benjamin Herrenschmidt
The current alignment exception generation tries to load the opcode
to put in DSISR from a context where a cpu_ldl_code() is really not
a good idea. It might fault and longjmp out and that's not something
we want happening here.
Instead, pass the releavant opcode bit
From: Benjamin Herrenschmidt
Also while at it, group the #include statements in translate.c
Signed-off-by: Benjamin Herrenschmidt
Signed-off-by: David Gibson
---
target-ppc/translate.c | 40 +++---
.../translate/{dfp-impl.c => dfp-impl.inc.c}
From: Benjamin Herrenschmidt
Some operations aren't allowed in LE mode, use a helper rather than
open coding the exception generation.
Signed-off-by: Benjamin Herrenschmidt
Signed-off-by: David Gibson
---
target-ppc/translate.c | 11 ---
1 file changed, 8 insertions(+), 3 deletions(-)
From: Thomas Huth
Some of the machines that we have got a firmware image for write
some output to the serial console while booting up. We can use
this output to make sure that the machine is basically working,
so this adds a test that checks the output of these machines
for some well-known "magic
From: Swapnil Bokade
Adds following instructions:
vcmpnezb[.]: Vector Compare Not Equal or Zero Byte
vcmpnezh[.]: Vector Compare Not Equal or Zero Halfword
vcmpnezw[.]: Vector Compare Not Equal or Zero Word
Signed-off-by: Swapnil Bokade
[ collapse switch case ]
Signed-off-by: Nikunj A Dadhania
From: Benjamin Herrenschmidt
Makes things a bit more manageable
Signed-off-by: Benjamin Herrenschmidt
Signed-off-by: David Gibson
---
target-ppc/translate.c | 1205 +---
target-ppc/translate/fp-impl.c | 1098
tar
From: Cédric Le Goater
Signed-off-by: Cédric Le Goater
Signed-off-by: David Gibson
---
hw/ppc/spapr.c | 12 ++--
hw/ppc/spapr_drc.c | 8
hw/ppc/spapr_iommu.c | 4 ++--
hw/ppc/spapr_rtas.c | 13 +++--
hw/ppc/spapr_vio.c | 3 ++-
include/hw/ppc/fdt.h | 8 +
From: Benjamin Herrenschmidt
We don't use it so let's not generate the updates.
Signed-off-by: Benjamin Herrenschmidt
Signed-off-by: David Gibson
---
target-ppc/translate.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/target-ppc/translate.c b/target-ppc/translate.c
i
From: Benjamin Herrenschmidt
Use tlb_vaddr_to_host to do a fast path single translate for
the whole cache line. Also make the reservation check match
the entire range.
Signed-off-by: Benjamin Herrenschmidt
Signed-off-by: David Gibson
---
target-ppc/mem_helper.c | 46 +-
From: Benjamin Herrenschmidt
No other change
Signed-off-by: Benjamin Herrenschmidt
Signed-off-by: David Gibson
---
target-ppc/fpu_helper.c | 122
1 file changed, 61 insertions(+), 61 deletions(-)
diff --git a/target-ppc/fpu_helper.c b/target-p
Hi,
It is a proposition for implementation of grant copy operation in qemu-qdisk
and interface in libxc/libs.
Changes since v5:
-added checking of every interface in the configure file. Based on
the Roger's comment that xengnttab_map_grant_ref was added prior
xengnttab_grant_copy, thus do not
From: Benjamin Herrenschmidt
We were one instruction off
Signed-off-by: Benjamin Herrenschmidt
Signed-off-by: David Gibson
---
target-ppc/translate.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/target-ppc/translate.c b/target-ppc/translate.c
index ac2c79b..bc5b
From: Thomas Huth
The rather random list of check-qtest-xxx entries caused some
confusion in the past, where to use "=" and where to use "+="
(see commits 0ccac16f59462b8e2b9afbc1 and 1f5c1cfbaec0792cd2e5da
for example).
Sorting the check-qtest-xxx entries by architecure instead and
using some em
On Wed, Sep 07, 2016 at 05:33:08PM +0800, Fam Zheng wrote:
> On Wed, 09/07 10:23, Alex Bennée wrote:
> > Last time I needed to do error reporting I was told the error_setg
> > method was the correct way to do it and the report/exit case made sense
> > only in the top level. Before we add even more
From: Benjamin Herrenschmidt
We don't need to call a helper for trap always and trap never
which are used by Linux under some circumstances.
Signed-off-by: Benjamin Herrenschmidt
--
v2. Don't generate the helper call when trapping always
Signed-off-by: David Gibson
---
target-ppc/translate.c
From: Benjamin Herrenschmidt
They generate exceptions, but they don't update the environment
Signed-off-by: Benjamin Herrenschmidt
Reviewed-by: Richard Henderson
Signed-off-by: David Gibson
---
target-ppc/helper.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/target
On Di, 2016-08-23 at 23:37 +0300, Andrei Karas wrote:
> Signed-off-by: Andrei Karas
> ---
> ui/sdl2.c | 3 ---
> 1 file changed, 3 deletions(-)
>
> diff --git a/ui/sdl2.c b/ui/sdl2.c
> index 4441e99..9523f64 100644
> --- a/ui/sdl2.c
> +++ b/ui/sdl2.c
> @@ -584,9 +584,6 @@ static void handle_wind
On 09/06/2016 09:07 AM, Mark Cave-Ayland wrote:
> On 06/09/16 01:16, David Gibson wrote:
>
>> On Mon, Sep 05, 2016 at 09:51:09PM +0100, Mark Cave-Ayland wrote:
>>> On 05/09/16 21:30, Cédric Le Goater wrote:
>>>
> Shall we disable rfi now for QEMU 2.8 ? Cédric, could you maybe send a
> patc
From: Benjamin Herrenschmidt
Instead, pass GETPC() result to the corresponding helpers.
Signed-off-by: Benjamin Herrenschmidt
Signed-off-by: David Gibson
---
target-ppc/mem_helper.c | 9 +
target-ppc/translate.c | 4
2 files changed, 5 insertions(+), 8 deletions(-)
diff --git a
From: Laurent Vivier
Since kernel v4.0, linux uses H_CHANGE_LOGICAL_LAN_MAC to change lively
the MAC address of an ibmveth interface.
As QEMU doesn't implement this h_call, we can't change anymore the
MAC address of an spapr-vlan interface.
Signed-off-by: Laurent Vivier
Signed-off-by: David Gi
On 07/09/2016 08:05, David Gibson wrote:
> On Wed, Sep 07, 2016 at 01:32:23PM +0800, Peter Xu wrote:
>> Considering that we may have multiple IOMMU notifier consumers in the
>> future, converting iommu_ops.notify_{started|stopped} into some more
>> general form. Now we can trap all notifier regis
From: Nikunj A Dadhania
Similar to divw, implement branch-less divd.
Signed-off-by: Nikunj A Dadhania
Reviewed-by: Richard Henderson
Signed-off-by: David Gibson
---
target-ppc/translate.c | 48 ++--
1 file changed, 26 insertions(+), 22 deletions(-)
From: Benjamin Herrenschmidt
The usermode "translate" code generates an error code value that
has the "is_write" bit set, which causes our switch/case to miss
and display "Invalid segfault errno" and a spurrious second state
dump. Fix it.
Signed-off-by: Benjamin Herrenschmidt
Signed-off-by: Dav
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