This is a followup to:
v1: https://lists.gnu.org/archive/html/qemu-devel/2016-05/msg00701.html
This series of patches provides a framework for testing migration performance
characteristics. The motivating factor for this is planning that is underway
in OpenStack wrt making use of QEMU migration
On Wed, Jul 06, 2016 at 08:47:03PM +0200, marcandre.lur...@redhat.com wrote:
> From: Marc-André Lureau
>
> Calling a vhost operation may fail, especially with disconnectable
> backends. Treat some that look harmless as recoverable errors (print
> error, or ignore on error code path).
>
> Signed-
On 19 July 2016 at 18:22, Eduardo Habkost wrote:
> The following changes since commit 0c1b58f25025cc09463aae235162b19ff45c37b7:
>
> Merge remote-tracking branch 'remotes/stefanha/tags/tracing-pull-request'
> into staging (2016-07-19 10:54:49 +0100)
>
> are available in the git repository at:
>
On Wed, Jul 06, 2016 at 08:47:10PM +0200, marcandre.lur...@redhat.com wrote:
> From: Marc-André Lureau
>
> Signed-off-by: Marc-André Lureau
> ---
> hw/net/vhost_net.c | 1 +
> net/vhost-user.c | 2 ++
> 2 files changed, 3 insertions(+)
>
> diff --git a/hw/net/vhost_net.c b/hw/net/vhost_net.c
- Original Message -
> On Wed, Jul 06, 2016 at 08:47:03PM +0200, marcandre.lur...@redhat.com wrote:
> > From: Marc-André Lureau
> >
> > Calling a vhost operation may fail, especially with disconnectable
> > backends. Treat some that look harmless as recoverable errors (print
> > error,
On Wed, Jul 06, 2016 at 08:47:06PM +0200, marcandre.lur...@redhat.com wrote:
> From: Marc-André Lureau
>
> More error checking to break code flow and report appropriate errors.
>
> Signed-off-by: Marc-André Lureau
So this will cause asserts here:
/* inform backend of log switching, this m
> > 1) is it expected that SEEK_HOLE skips unwritten extents?
>
> There are multiple answers to this, all of which are correct depending
> on current context and state:
>
> 1. No - some filesystems will report clean unwritten extents as holes.
>
> 2. Yes - some filesystems will report clean unwr
On Thu, Jul 07, 2016 at 03:00:24AM +0200, marcandre.lur...@redhat.com wrote:
> From: Marc-André Lureau
>
> Hi,
>
> Since 'vhost-user: simple reconnection support' was merged, it is
> possible to disconnect and reconnect a vhost-user backend. However,
> many code paths in qemu may trigger assert(
Hi,
I fiddled with BMI2 instructions and discovered that pext instructions
emulated with "qemu-x86_64 -cpu Haswell" return the wrong value. It
seemingly switches up its arguments. I suspect that the error is around the
gen_helper_pext(..) call in target-i386/translate.c. I checked helper_pext
in t
On Wed, Jul 20, 2016 at 05:19:37AM -0400, Paolo Bonzini wrote:
> Adding ext4 and XFS guys (Lukas and Dave respectively). As a quick recap, the
> issue here is the semantics of FIEMAP and SEEK_HOLE/SEEK_DATA, which we use in
> "qemu-img map". This command prints metadata about a virtual disk
> im
On 07/19/2016 02:54 AM, marcandre.lur...@redhat.com wrote:
> From: Marc-André Lureau
>
> In all cases, even when the dict doesn't contain 'ram', the qmp response
> must be unref.
>
> Signed-off-by: Marc-André Lureau
> ---
> tests/postcopy-test.c | 2 +-
> 1 file changed, 1 insertion(+), 1 dele
On Wed, Jul 20, 2016 at 09:41:26AM -0400, Marc-André Lureau wrote:
>
>
> - Original Message -
> > On Wed, Jul 06, 2016 at 08:47:03PM +0200, marcandre.lur...@redhat.com wrote:
> > > From: Marc-André Lureau
> > >
> > > Calling a vhost operation may fail, especially with disconnectable
> >
On Wed, Jul 20, 2016 at 10:30:25PM +1000, Dave Chinner wrote:
> On Wed, Jul 20, 2016 at 05:19:37AM -0400, Paolo Bonzini wrote:
> > Adding ext4 and XFS guys (Lukas and Dave respectively). As a quick recap,
> > the
> > issue here is the semantics of FIEMAP and SEEK_HOLE/SEEK_DATA, which we use
> >
From: Sascha Silbe
It's not obvious from the code flow that sch_handle_start_func() gets
called for rsch. Add some comments explaining this.
Signed-off-by: Sascha Silbe
Reviewed-by: Halil Pasic
Signed-off-by: Cornelia Huck
---
hw/s390x/css.c | 4
1 file changed, 4 insertions(+)
diff --
From: Sascha Silbe
The CCW Format (F) flag of the Subchannel-Status Word (SCSW) indicates
the format of the CCWs "associated with an I/O operation", i.e. the
value of CCW-Format Control (F) bit of the Operation-Request Block
(ORB).
Copy the CCW format bit from the ORB to the SCSW so we correctly
We need to implement the get_dev_path method for the css bus, or
else we might end up with two different devices having the same
qdev_path.
This was noticed when adding two scsi_hd controllers: The SCSIBus
code will produce a non-unique dev_path for vmstate usage if the
parent bus does not provide
ck/qemu s390x-20160720
The following changes since commit 1ecfb24da987b862fd46a5b37292879952ea9e7d:
Merge remote-tracking branch 'remotes/riku/tags/pull-linux-user-20160719-2'
into staging (2016-07-20 11:32:12 +0100)
are available in the git repository at:
git://github.com/cohuck
From: Marc Mari
Extend the current module interface to allow for block drivers to be
loaded dynamically on request. The only block drivers that can be
converted into modules are the drivers that don't perform any init
operation except for registering themselves.
In addition, only the protocol dr
Here's v5 of the modularization series. Since it seems the concensus is
that modularizing the format drivers is unnecessary, this series no
longer modularizes those and is thus much shorter than before.
v5:
- No format drivers are modularized, therefore the probe functions are
all being left com
From: Marc Mari
To simplify the addition of new block modules, add a script that generates
module_block.h automatically from the modules' source code.
This script assumes that the QEMU coding style rules are followed.
Signed-off-by: Marc Marí
Signed-off-by: Colin Lord
---
Makefile
This commit moves the initialization of the QemuOptsList qemu_iscsi_opts
struct out of block/iscsi.c in order to allow the iscsi module to be
dynamically loaded.
Signed-off-by: Colin Lord
Reviewed-by: Fam Zheng
---
block/iscsi.c | 36
vl.c | 38
On 19 July 2016 at 19:41, Markus Armbruster wrote:
> The following changes since commit 0c1b58f25025cc09463aae235162b19ff45c37b7:
>
> Merge remote-tracking branch 'remotes/stefanha/tags/tracing-pull-request'
> into staging (2016-07-19 10:54:49 +0100)
>
> are available in the git repository at:
From: "Dr. David Alan Gilbert"
Provide a constant for the number of address bits supported under TCG.
Signed-off-by: Dr. David Alan Gilbert
Suggested-by: Eduardo Habkost
Reviewed-by: Eduardo Habkost
Signed-off-by: Eduardo Habkost
---
target-i386/cpu.h | 6 --
1 file changed, 4 insertion
From: "Dr. David Alan Gilbert"
Fill the bits between 51..number-of-physical-address-bits in the
MTRR_PHYSMASKn variable range mtrr masks so that they're consistent
in the migration stream irrespective of the physical address space
of the source VM in a migration.
Signed-off-by: Dr. David Alan Gi
From: "Dr. David Alan Gilbert"
Add the host-phys-bits boolean property, if true, take phys-bits
from the hosts physical bits value, overriding either the default
or the user specified value.
We can also use the value we read from the host to check the users
explicitly set value and warn them if
Changes v2:
* Fixed 32-bit build error by using %d and idx at
pc_cpu_pre_plug()
The following changes since commit 338404d061144956b76f9893ca3434d057dff2d4:
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20160719'
into staging (2016-07-20 12:48:18 +0100)
are available i
From: "Dr. David Alan Gilbert"
The CPU GPs if we try and set a bit in a variable MTRR mask above
the limit of physical address bits on the host. We hit this
when loading a migration from a host with a larger physical
address limit than our destination (e.g. a Xeon->i7 of same
generation) but pre
From: Igor Mammedov
Machine code knows about all possible APIC IDs so use that
instead of hack which does O(n^2) complexity duplicate
checks, interating over global CPUs list.
As result duplicate check is done only once with O(log n) complexity.
Signed-off-by: Igor Mammedov
Reviewed-by: Eduardo
From: Igor Mammedov
These properties will be used by as address where to plug
CPU with help -device/device_add commands.
Signed-off-by: Igor Mammedov
Reviewed-by: Eduardo Habkost
Signed-off-by: Eduardo Habkost
---
hw/i386/pc.c | 29 +
target-i386/cpu.c | 6 +
From: "Dr. David Alan Gilbert"
Currently QEMU sets the x86 number of physical address bits to the
magic number 40. This is only correct on some small AMD systems;
Intel systems tend to have 36, 39, 46 bits, and large AMD systems
tend to have 48.
Having the value different from your actual hardw
From: Igor Mammedov
It's reverse of apicid_from_topo_ids() and will be used in follow up
patches to fill in data structures for query-hotpluggable-cpus and
for user friendly error reporting.
Signed-off-by: Igor Mammedov
Reviewed-by: Eduardo Habkost
Signed-off-by: Eduardo Habkost
---
include/
From: Igor Mammedov
object_property_add_child() silently fails with error that it can't
create duplicate propery 'apic' as we already have 'apic' property
registered for 'apic' feature. As result generic device_realize puts
apic into unattached container.
As it's programming error, abort if name
From: Igor Mammedov
Signed-off-by: Igor Mammedov
Reviewed-by: Eduardo Habkost
Signed-off-by: Eduardo Habkost
---
target-i386/cpu.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index 6c36b13..5d0e085 100644
--- a/target-i386/cpu.c
+++ b/target-i386/
From: Igor Mammedov
Redo 9886e834 (target-i386: Require APIC ID to be explicitly set before
CPU realize) in another way that doesn't use int64_t to detect
if apic-id property has been set.
Use the fact that 0x is the broadcast
value that a CPU can't have and set default
uint32_t apic_id
From: Igor Mammedov
Boot CPU is assumed to always present in QEMU code, so
untile that assumptions are gone, deny removal request,
In another words QEMU won't support BSP hot-unplug.
Signed-off-by: Igor Mammedov
Reviewed-by: Michael S. Tsirkin
Signed-off-by: Eduardo Habkost
---
hw/i386/pc.c
From: Igor Mammedov
Signed-off-by: Igor Mammedov
Reviewed-by: Michael S. Tsirkin
Signed-off-by: Eduardo Habkost
---
target-i386/cpu.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index 5d0e085..3df5f5f 100644
--- a/target-i386/cpu.c
+++ b/target-i3
From: Igor Mammedov
It will be reused in the next patch at pre_plug time
Signed-off-by: Igor Mammedov
Reviewed-by: Eduardo Habkost
Signed-off-by: Eduardo Habkost
---
hw/i386/pc.c | 29 ++---
1 file changed, 22 insertions(+), 7 deletions(-)
diff --git a/hw/i386/pc.c b
From: Igor Mammedov
It will still allow us to use cpu_index as migration instance_id
since when CPUs are added contiguously (from the first to the last)
and removed in opposite order, cpu_index stays stable and it's
reproducible on destination side.
While there is work in progress to support mig
From: Igor Mammedov
MAX_APICS is only used by child 'apic' class and not
by its parent TYPE_APIC_COMMON or any other derived
class.
Move check into end user 'apic' class so it won't
get in the way of other APIC implementations
if they support more then MAX_APICS.
Signed-off-by: Igor Mammedov
R
From: Igor Mammedov
Callbacks will do necessary cleanups before APIC device is deleted
Signed-off-by: Chen Fan
Signed-off-by: Gu Zheng
Signed-off-by: Zhu Guihua
Signed-off-by: Igor Mammedov
Reviewed-by: Michael S. Tsirkin
Signed-off-by: Eduardo Habkost
---
hw/i386/kvm/apic.c
From: Igor Mammedov
kvm-apic.io_memory memory region had its parent set to NULL at
memory_region_init_io() time, so it ended up as a child in
/unattached contaner.
As result when kvm-apic instance was deleted, the child property
/unattached/kvm-apic-msi[XXX] contained a reference to
kvm-apic.io
From: Igor Mammedov
Custom apic-id setter/getter doesn't do any property specific
checks anymore, so clean it up and use more compact static
property DEFINE_PROP_UINT32 instead.
Signed-off-by: Igor Mammedov
Reviewed-by: Eduardo Habkost
Signed-off-by: Eduardo Habkost
---
target-i386/cpu.c | 4
From: Igor Mammedov
it returns a list of present/possible to hotplug CPU
objects with a list of properties to use with
device_add.
in PC case returned list would looks like:
-> { "execute": "query-hotpluggable-cpus" }
<- {"return": [
{
"type": "qemu64-x86_64-cpu", "vcpus-count": 1,
From: Igor Mammedov
instance_id is generated by last_used_id + 1 for a given device type
so for QEMU with 3 CPUs instance_id for APICs is a seti of [0, 1, 2]
When CPU in the middle is hot-removed and migration started
APICs with instance_ids 0 and 2 are transferred in migration stream.
However ta
From: Igor Mammedov
ACPI subsystem already has all logic in place the only
thing left to eject CPU is destroy it and ammend
present CPUs counter in CMOS, do so.
Signed-off-by: Igor Mammedov
Reviewed-by: Michael S. Tsirkin
Signed-off-by: Eduardo Habkost
---
hw/i386/pc.c | 11 +--
1 fi
On Wed, Jul 06, 2016 at 08:20:40AM +0200, Igor Mammedov wrote:
> +error_setg(errp, "CPU[%ld] with APIC ID %" PRIu32 " exists",
> + cpu_slot - pcms->possible_cpus->cpus,
> + cpu->apic_id);
Build error on 32-bit reported by Peter Maydell:
/home/petmay01/
From: Igor Mammedov
CPU added with device_add help won't have APIC ID set,
so set it according to socket/core/thread ids provided
with device_add command.
Signed-off-by: Igor Mammedov
Reviewed-by: Eduardo Habkost
Signed-off-by: Eduardo Habkost
---
hw/i386/pc.c | 44 ++
From: Igor Mammedov
First remove VCPU from exec loop and only then remove lapic.
Signed-off-by: Chen Fan
Signed-off-by: Gu Zheng
Signed-off-by: Zhu Guihua
Signed-off-by: Igor Mammedov
Reviewed-by: Eduardo Habkost
Signed-off-by: Eduardo Habkost
---
target-i386/cpu.c | 16
On Tue, Jul 19, 2016 at 09:41:22AM -0400, Frediano Ziglio wrote:
> > I don't think we have strong reasons to support software encoding, video
> > encoding is really expensive, and that mmap/copy is not going to be
> > marginal, so even less these 2 syscalls.
> >
>
> Using HW encoding is not easy
From: Paolo Bonzini
These are both stored in CPUID[EAX=7,EBX=0].ECX. KVM is going to
be able to emulate both (albeit with a performance loss in the case
of RDPID, which therefore will be in KVM_GET_EMULATED_CPUID rather
than KVM_GET_SUPPORTED_CPUID).
It's also possible to implement both in TCG,
From: Igor Mammedov
Currently present CPUs counter in CMOS only contains
smp_cpus (i.e. initial CPUs specified with -smp X) and
doesn't account for CPUs created with -device.
If VM is started with additional CPUs added with
-device, it will hang in BIOS waiting for condition
smp_cpus == count
Enable transitional virtio devices by default.
Enable virtio-1.0 for devices plugged into
PCIe ports (Root ports or Downstream ports).
Using the virtio-1 mode will remove the limitation
of the number of devices that can be attached to a machine
by removing the need for the IO BAR.
Signed-off-by:
From: Igor Mammedov
Consolidate possible_cpus array management in pc_cpu_plug() for
smp_cpus, coldplugged with -device and hotplugged with
device_add.
Signed-off-by: Igor Mammedov
Reviewed-by: Eduardo Habkost
Signed-off-by: Eduardo Habkost
---
hw/i386/pc.c | 25 +
1 f
From: Igor Mammedov
local_apics[] is sized to contain all APIC ID supported in xAPIC mode,
so use APIC ID as index in it instead of constantly increasing counter idx.
Fixes error "apic initialization failed" when a CPU hotplugged and
unplugged more times than there are free slots in local_apics[
Hey guys,
A few days ago we noticed that some of our VPSes lost network connection
after a live migration using QEMU/KVM. We started investigating and
noticed that the problem was at least present for guests running
FreeBSD, Debian 7 (Linux 3.2.81-1) and some flavors of CentOS. At least
Debia
On 19 July 2016 at 23:29, Michael S. Tsirkin wrote:
> The following changes since commit 3913d3707e3debfbf0d2d014a1a793394993b088:
>
> Merge remote-tracking branch 'remotes/dgibson/tags/ppc-for-2.7-20160718'
> into staging (2016-07-18 11:24:15 +0100)
>
> are available in the git repository at:
On 19 July 2016 at 23:47, Max Reitz wrote:
> The following changes since commit 5d3217340adcb6c4f0e4af5d2b865331eb2ff63d:
>
> disas: Fix ATTRIBUTE_UNUSED define clash with ALSA headers (2016-07-19
> 16:40:39 +0100)
>
> are available in the git repository at:
>
> git://github.com/XanClic/qemu.
The following changes since commit 338404d061144956b76f9893ca3434d057dff2d4:
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20160719'
into staging (2016-07-20 12:48:18 +0100)
are available in the git repository at:
git://github.com/stefanha/qemu.git tags/block-pull-requ
From: Eric Blake
Drivers should be able to rely on the block layer honoring the
max transfer length, rather than needing to return -EINVAL
(iscsi) or manually fragment things (nbd). This patch adds
the fragmentation in the block layer, after requests have been
aligned (fragmenting before alignme
From: Eric Blake
Another step towards byte-based interfaces everywhere. Replace
the sector-based bdrv_co_discard() with a new byte-based
bdrv_co_pdiscard(), which silently ignores any unaligned head
or tail. Driver callbacks will be converted in followup patches.
By calculating the alignment o
From: Eric Blake
BlockRequest is the internal struct used by bdrv_aio_*. At the
moment, all such calls were sector-based, but we will eventually
convert to byte-based; start by changing the internal variables
to be byte-based. No change to behavior, although the read and
write code can now go b
From: Eric Blake
The raw format layer supports all flags via passthrough - but
it only makes sense to pass through flags that the lower layer
actually supports.
The next patch gives stronger reasoning for why this is correct.
At the moment, the raw format layer ignores the max_transfer
limit of
From: Eric Blake
Another step towards byte-based interfaces everywhere. Replace
the sector-based bdrv_aio_discard() with a new byte-based
bdrv_aio_pdiscard(), which silently ignores any unaligned head
or tail. Driver callbacks will be converted in followup patches.
Signed-off-by: Eric Blake
M
From: Eric Blake
Now that the block layer honors max_request, we don't need to
bother with an EINVAL on overlarge requests, but can instead
assert that requests are well-behaved.
Signed-off-by: Eric Blake
Reviewed-by: Fam Zheng
Reviewed-by: Stefan Hajnoczi
Acked-by: Paolo Bonzini
Message-id:
From: Eric Blake
The only remaining uses of paio_submit() were flush (with no
offset or count) and discard (which we are switching to byte-based);
furthermore, the similarly named paio_submit_co() is already
byte-based.
Signed-off-by: Eric Blake
Reviewed-by: Stefan Hajnoczi
Message-id: 1468624
From: Eric Blake
Another step towards killing off sector-based block APIs.
Unlike write_zeroes, where we can be handed unaligned requests
and must fail gracefully with -ENOTSUP for a fallback, we are
guaranteed that discard requests are always aligned because the
block layer already ignored unal
From: Eric Blake
Drivers should be able to rely on the block layer honoring the
max transfer length, rather than needing to return -EINVAL
(iscsi) or manually fragment things (nbd). We already fragment
write zeroes at the block layer; this patch adds the fragmentation
for normal writes, after re
From: Eric Blake
Another step towards byte-based interfaces everywhere. Replace
the sector-based bdrv_discard() with a new byte-based
bdrv_pdiscard(), which silently ignores any unaligned head
or tail.
Signed-off-by: Eric Blake
Reviewed-by: Stefan Hajnoczi
Message-id: 1468624988-423-3-git-sen
From: Eric Blake
Change sector-based blk_discard(), blk_co_discard(), and
blk_aio_discard() to instead be byte-based blk_pdiscard(),
blk_co_pdiscard(), and blk_aio_pdiscard(). NBD gets a lot
simpler now that ignoring the unaligned portion of a
byte-based discard request is handled under the hood
From: Eric Blake
Now that the block layer will honor max_transfer, we can simplify
our code to rely on that guarantee.
The readv code can call directly into nbd-client, just as the
writev code has done since commit 52a4650.
Interestingly enough, while qemu-io 'w 0 40m' splits into a 32M
and 8M
From: Eric Blake
Another step towards byte-based interfaces everywhere. Replace
the sector-based driver callback .bdrv_aio_discard() with a new
byte-based .bdrv_aio_pdiscard(). Only raw-posix and RBD drivers
are affected, so it was not worth splitting into multiple patches.
Signed-off-by: Eric
From: Eric Blake
Another step towards killing off sector-based block APIs.
Signed-off-by: Eric Blake
Reviewed-by: Stefan Hajnoczi
Message-id: 1468624988-423-12-git-send-email-ebl...@redhat.com
Signed-off-by: Stefan Hajnoczi
---
block/gluster.c | 14 ++
1 file changed, 6 insertion
From: Eric Blake
There's enough drivers with a sector-based callback that it will
be easier to switch one at a time. This patch adds a byte-based
callback, and then after all drivers are swapped, we'll drop the
sector-based callback.
[checkpatch doesn't like the space after coroutine_fn in
bloc
From: Eric Blake
The internal function converts to byte-based before calling into
RBD code; hoist the conversion to the callers so that callers
can then be switched to byte-based themselves.
Signed-off-by: Eric Blake
Reviewed-by: Stefan Hajnoczi
Message-id: 1468624988-423-8-git-send-email-ebl.
From: Eric Blake
Since the raw format driver is just passing things through, we can
do byte-based read and write if the underlying protocol does
likewise.
There's one tricky part - if we probed the image format, we document
that we restrict operations on the initial sector. It's easiest to
keep
From: Eric Blake
Another step towards killing off sector-based block APIs.
Signed-off-by: Eric Blake
Reviewed-by: Stefan Hajnoczi
Message-id: 1468624988-423-15-git-send-email-ebl...@redhat.com
Signed-off-by: Stefan Hajnoczi
---
block/qcow2.c | 10 +-
1 file changed, 5 insertions(+),
From: Eric Blake
Now that NBD relies on the block layer to fragment things, we no
longer need to track an offset argument for which fragment of
a request we are actually servicing.
While at it, use true and false instead of 0 and 1 for a bool
parameter.
Signed-off-by: Eric Blake
Reviewed-by: F
From: Eric Blake
Another step towards killing off sector-based block APIs.
While at it, call directly into nbd-client.c instead of having
a pointless trivial wrapper in nbd.c.
Signed-off-by: Eric Blake
Reviewed-by: Stefan Hajnoczi
Message-id: 1468624988-423-14-git-send-email-ebl...@redhat.com
From: Eric Blake
Now that all drivers have a byte-based .bdrv_co_pdiscard(), we
no longer need to worry about the sector-based version. We can
also relax our minimum alignment to 1 for drivers that support it.
Signed-off-by: Eric Blake
Reviewed-by: Stefan Hajnoczi
Message-id: 1468624988-423-1
From: Eric Blake
Another step towards killing off sector-based block APIs.
Signed-off-by: Eric Blake
Reviewed-by: Stefan Hajnoczi
Message-id: 1468624988-423-16-git-send-email-ebl...@redhat.com
Signed-off-by: Stefan Hajnoczi
---
block/raw_bsd.c | 9 -
1 file changed, 4 insertions(+),
QEMU 2.6 added support for the XSAVE family of instructions, which
includes the XSETBV instruction which allows setting the 'XCR0'
register.
But, when booting Linux kernels with XSAVE support enabled, I was
getting very early crashes where the instruction pointer was set
to 0x3. I tracked it down
From: Eric Blake
Another step towards killing off sector-based block APIs.
Signed-off-by: Eric Blake
Reviewed-by: Stefan Hajnoczi
Message-id: 1468624988-423-17-git-send-email-ebl...@redhat.com
Signed-off-by: Stefan Hajnoczi
---
block/sheepdog.c | 17 ++---
1 file changed, 10 inse
From: Eric Blake
The NBD protocol doesn't have any notion of sectors, so it is
a fairly easy conversion to use byte-based read and write.
Signed-off-by: Eric Blake
Acked-by: Paolo Bonzini
Message-id: 1468624988-423-19-git-send-email-ebl...@redhat.com
Signed-off-by: Stefan Hajnoczi
---
block/
From: Eric Blake
Another step towards killing off sector-based block APIs.
Signed-off-by: Eric Blake
Reviewed-by: Stefan Hajnoczi
Message-id: 1468624988-423-11-git-send-email-ebl...@redhat.com
Signed-off-by: Stefan Hajnoczi
---
block/blkreplay.c | 9 -
1 file changed, 4 insertions(+)
From: Marcel Apfelbaum
On a slower machine the test can take more than 30 seconds.
Increase the timeout to 100 seconds.
Signed-off-by: Marcel Apfelbaum
Reviewed-by: Michael S. Tsirkin
Signed-off-by: Michael S. Tsirkin
Tested-by: Mark Cave-Ayland
---
tests/prom-env-test.c | 2 +-
1 file chan
From: Stefan Hajnoczi
object_get_canonical_path_component() returns a heap-allocated string
that must be freed using g_free().
Reported-by: Paolo Bonzini
Signed-off-by: Stefan Hajnoczi
Reviewed-by: Igor Mammedov
Reviewed-by: Xiao Guangrong
Reviewed-by: Michael S. Tsirkin
Signed-off-by: Mich
From: Peter Xu
Introducing parent class for intel-iommu devices named "x86-iommu". This
is preparation work to abstract shared functionalities out from Intel
and AMD IOMMUs. Currently, only the parent class is introduced. It does
nothing yet.
Signed-off-by: Peter Xu
Reviewed-by: Michael S. Tsir
I think that's it feature-wise for 2.7.
There are still a couple of bugfix patchsets I plan to merge before -rc1:
- vhost-user fixes for backend disconnect
- pxb fixes for 64 bit mmio
and a couple of other bugfixes here and there.
The following changes since commit 5d3217340adcb6c4f0e4af5d2b8653
From: Marcel Apfelbaum
'Realize' the PCI root bus manually since the 'realize' mechanism
does not propagate to child devices yet.
Signed-off-by: Marcel Apfelbaum
Reviewed-by: Michael S. Tsirkin
Signed-off-by: Michael S. Tsirkin
Tested-by: Mark Cave-Ayland
---
hw/pci-host/prep.c | 1 +
1 fil
From: Marcel Apfelbaum
'Realize' the PCI root bus manually since the 'realize' mechanism
does not propagate to child devices yet.
Signed-off-by: Marcel Apfelbaum
Reviewed-by: Michael S. Tsirkin
Signed-off-by: Michael S. Tsirkin
Tested-by: Mark Cave-Ayland
---
hw/pci-host/versatile.c | 1 +
From: Marcel Apfelbaum
Delay the host-bridge 'realization' until the
PCI root bus is attached.
Signed-off-by: Marcel Apfelbaum
Reviewed-by: Michael S. Tsirkin
Signed-off-by: Michael S. Tsirkin
Tested-by: Mark Cave-Ayland
---
hw/alpha/typhoon.c | 2 +-
1 file changed, 1 insertion(+), 1 delet
From: Peter Xu
In ACPI DMA remapping report structure, enable INTR flag when specified.
Signed-off-by: Peter Xu
Reviewed-by: Michael S. Tsirkin
Signed-off-by: Michael S. Tsirkin
---
include/hw/i386/intel_iommu.h | 2 ++
hw/i386/acpi-build.c | 14 +-
2 files changed, 15
From: Peter Xu
Signed-off-by: Peter Xu
Reviewed-by: Michael S. Tsirkin
Signed-off-by: Michael S. Tsirkin
---
include/hw/i386/intel_iommu.h | 1 -
include/hw/i386/x86-iommu.h | 2 ++
hw/i386/intel_iommu.c | 11 +++
3 files changed, 9 insertions(+), 5 deletions(-)
diff --gi
From: Peter Xu
Instead of searching the device tree every time, one static variable is
declared for the default system x86 IOMMU device.
Signed-off-by: Peter Xu
Reviewed-by: Michael S. Tsirkin
Signed-off-by: Michael S. Tsirkin
---
include/hw/i386/x86-iommu.h | 6 ++
hw/i386/acpi-build.c
From: Marcel Apfelbaum
Create and connect the PCI root bus to the
host bridge before the later is 'realized'.
Signed-off-by: Marcel Apfelbaum
Reviewed-by: Michael S. Tsirkin
Signed-off-by: Michael S. Tsirkin
Tested-by: Mark Cave-Ayland
---
hw/pci-host/apb.c | 15 +++
1 file chan
From: Marcel Apfelbaum
Delay the host-bridge 'realization' until the
PCI root bus is attached.
Signed-off-by: Marcel Apfelbaum
Reviewed-by: Michael S. Tsirkin
Signed-off-by: Michael S. Tsirkin
Tested-by: Mark Cave-Ayland
Acked-by: Leon Alrae
Tested-by: Leon Alrae
---
hw/mips/gt64xxx_pci.c
From: Peter Xu
This patch enables interrupt remapping for PCI devices.
To play the trick, one memory region "iommu_ir" is added as child region
of the original iommu memory region, covering range 0xfeeX (which is
the address range for APIC). All the writes to this range will be taken
as MSI,
From: Peter Xu
Queued invalidation is required for IR. This patch add basic support for
interrupt cache invalidate requests. Since we currently have no IR cache
implemented yet, we can just skip all interrupt cache invalidation
requests for now.
Signed-off-by: Peter Xu
Reviewed-by: Michael S. T
From: Peter Xu
Enable IR in IOMMU Extended Capability register.
Signed-off-by: Peter Xu
Reviewed-by: Michael S. Tsirkin
Signed-off-by: Michael S. Tsirkin
---
hw/i386/intel_iommu_internal.h | 2 ++
hw/i386/intel_iommu.c | 6 ++
2 files changed, 8 insertions(+)
diff --git a/hw/i3
From: Marcel Apfelbaum
Delay the host-bridge 'realization' until the
PCI root bus is attached.
Signed-off-by: Marcel Apfelbaum
Reviewed-by: Michael S. Tsirkin
Signed-off-by: Michael S. Tsirkin
Tested-by: Mark Cave-Ayland
---
hw/pci-host/grackle.c | 2 +-
1 file changed, 1 insertion(+), 1 de
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