[Qemu-devel] [PATCH v3] fw/msr_feature_control: add support to set MSR_IA32_FEATURE_CONTROL

OS usually expects BIOS to set certain bits in MSR_IA32_FEATURE_CONTROL for some features (e.g. VMX and LMCE). QEMU provides a fw_cfg file "etc/msr_feature_control" to advise bits that should be set in MSR_IA32_FEATURE_CONTROL. If this file exists, SeaBIOS will set the advised bits in that MSR. Si

[Qemu-devel] [PATCH v2 0/3] Second try at fixing sparc register allocation

Attempting to fix the problem reported by Mark re i686 vs sparc64. Unsurprisingly, the problems tend to revolve around the 6 operand opcodes like sub2 or qemu_st64, where we use all, or all but one register. r~ Richard Henderson (3): tcg: Fix name for high-half register tcg: Optimize spill

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