[Qemu-devel] [PATCH v4 4/5] include/hw/acpi/acpi-defs: Add GICC Affinity Structure

From: Shannon Zhao Signed-off-by: Shannon Zhao --- CC: Igor Mammedov --- hw/i386/acpi-build.c| 2 +- include/hw/acpi/acpi-defs.h | 15 ++- 2 files changed, 15 insertions(+), 2 deletions(-) diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c index 78758e2..0f0b88f 100

[Qemu-devel] [PATCH v4 5/5] hw/arm/virt-acpi-build: Generate SRAT table

From: Shannon Zhao To support NUMA, it needs to generate SRAT ACPI table. Signed-off-by: Shannon Zhao --- CC: Igor Mammedov --- hw/arm/virt-acpi-build.c | 58 1 file changed, 58 insertions(+) diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt

[Qemu-devel] [PATCH v4 1/5] ARM: Virt: Add /distance-map node for NUMA

From: Shannon Zhao This /distance-map node is used to describe the accessing distance between NUMA nodes. Signed-off-by: Shannon Zhao --- hw/arm/virt.c | 30 ++ 1 file changed, 30 insertions(+) diff --git a/hw/arm/virt.c b/hw/arm/virt.c index 15658f4..c725e29 10064

[Qemu-devel] [PATCH v4 0/5] ARM: Add NUMA support for machine virt

From: Shannon Zhao Add NUMA support for machine virt. Tested successfully running a guest Linux kernel with the following patch applied: - [PATCH v9 0/6] arm64, numa: Add numa support for arm64 platforms https://lwn.net/Articles/672329/ - [PATCH v2 0/4] ACPI based NUMA support for ARM64 http://w

[Qemu-devel] [PATCH v4 3/5] ARM: Add numa-node-id for /memory node

From: Shannon Zhao When specifying NUMA for ARM machine, generate /memory node according to NUMA topology. Signed-off-by: Shannon Zhao --- hw/arm/boot.c | 29 - 1 file changed, 28 insertions(+), 1 deletion(-) diff --git a/hw/arm/boot.c b/hw/arm/boot.c index 7742dd3

[Qemu-devel] [PATCH v4 2/5] ARM: Virt: Set numa-node-id for CPUs

From: Shannon Zhao Add a numa-node-id property to specify NUMA information for CPUs. Signed-off-by: Shannon Zhao --- hw/arm/virt.c | 7 +++ 1 file changed, 7 insertions(+) diff --git a/hw/arm/virt.c b/hw/arm/virt.c index c725e29..14265b1 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -

Re: [Qemu-devel] [PULL 10/11] Add Error **errp for xen_pt_config_init()

On 01/22/2016 07:21 PM, Paolo Bonzini wrote: On 21/01/2016 18:01, Stefano Stabellini wrote: -XEN_PT_LOG(&s->dev, "Failed to initialize %d/%ld reg 0x%x in grp_type=0x%x (%d/%ld), rc=%d\n", - j, ARRAY_SIZE(xen_pt_emu_reg_grps[i].emu_r

Re: [Qemu-devel] [PATCH] seabios: fix submodule

On Fri, Jan 22, 2016 at 12:02:30PM +, Peter Maydell wrote: > On 22 January 2016 at 10:59, Gerd Hoffmann wrote: > > Commit "36f96c4 target-i386: Add support to migrate vcpu's TSC rate" > > updates roms/seabios, appearently by mistake. Revert this. > > > > Signed-off-by: Gerd Hoffmann > > ---

Re: [Qemu-devel] [PATCH v6 04/11] cpu: Don't realize CPU from cpu_generic_init()

On Fri, Jan 08, 2016 at 12:25:12PM +0530, Bharata B Rao wrote: > Don't do CPU realization from cpu_generic_init(). With this > cpu_generic_init() will be used to just create CPU threads and they > should be realized separately from realizefn call. > > Convert the existing callers to do explicit re

Re: [Qemu-devel] [PATCH v6 01/11] machine: Don't allow CPU toplogies with partially filled cores

On Fri, Jan 08, 2016 at 12:25:09PM +0530, Bharata B Rao wrote: > Prevent guests from booting with CPU topologies that have partially > filled CPU cores or can result in partially filled CPU cores after > CPU hotplug like > > -smp 15,sockets=1,cores=4,threads=4,maxcpus=16 or > -smp 15,sockets=1,cor

Re: [Qemu-devel] [RFC] target-i386: Display i386 CPUID properties

On Tue, Jan 12, 2016 at 02:50:20PM +, Daniel P. Berrange wrote: > On Tue, Jan 12, 2016 at 05:36:27PM +0300, Valentin Rakush wrote: > > This is RFC because implementation depends on the upcoming class > > properties > > http://lists.nongnu.org/archive/html/qemu-devel/2015-08/msg03115.html > >

Re: [Qemu-devel] [PATCH v3 04/11] igd: switch TYPE_IGD_PASSTHROUGH_I440FX_PCI_DEVICE to realize

On Tue, Jan 05, 2016 at 12:41:31PM +0100, Gerd Hoffmann wrote: > Signed-off-by: Gerd Hoffmann > --- > hw/pci-host/igd.c | 9 - > 1 file changed, 4 insertions(+), 5 deletions(-) > > diff --git a/hw/pci-host/igd.c b/hw/pci-host/igd.c > index ef0273b..d1eeafb 100644 > --- a/hw/pci-host/igd.

Re: [Qemu-devel] [PATCH v3 05/11] igd: TYPE_IGD_PASSTHROUGH_I440FX_PCI_DEVICE: call parent realize

On Wed, Jan 20, 2016 at 10:10:11AM +0100, Gerd Hoffmann wrote: > Hi, > > > > > > +i440fx_realize = k->realize; > > > > > k->realize = igd_pt_i440fx_realize; > > > > > > ... because we are overriding it right here. > > > > Many device classes have a parent_realize field so they can kee

Re: [Qemu-devel] [PATCH v17 7/9] add MachineClass->default_props for setting default device properties

On Tue, Jan 19, 2016 at 02:06:27PM +0100, Igor Mammedov wrote: > Signed-off-by: Igor Mammedov > --- > include/hw/boards.h | 1 + > vl.c| 4 > 2 files changed, 5 insertions(+) > > diff --git a/include/hw/boards.h b/include/hw/boards.h > index 0f30959..d495611 100644 > --- a/i

Re: [Qemu-devel] [PATCH 0/5] target-i386: kvm: Increase MSR entry array limits, check for array overrun

On Wed, Dec 16, 2015 at 10:38:25PM +0100, Paolo Bonzini wrote: > > > On 16/12/2015 20:06, Eduardo Habkost wrote: > > We are dangerously close to the array limits in kvm_put_msrs() > > and kvm_get_msrs(): with the default mcg_cap configuration, we > > can set up to 148 MSRs in kvm_put_msrs(), and

Re: [Qemu-devel] [PATCH v2] target-i386/kvm: Hyper-V VMBus hypercalls blank handlers

On Thu, Jan 21, 2016 at 05:04:20PM +0300, Andrey Smetanin wrote: > Add Hyper-V VMBus hypercalls blank handlers which > just returns error code - HV_STATUS_INVALID_HYPERCALL_CODE. > > Changes v2: > * use KVM_EXIT_HYPERV exit type > Paolo, this needs a linux-headers update. Should I let you update

[Qemu-devel] [PATCH v2 3/5] ich9: Remove enable_tco arguments from init functions

The enable_tco arguments are always true, so they are not needed anymore. Signed-off-by: Eduardo Habkost --- hw/acpi/ich9.c | 8 +++- hw/i386/pc_q35.c | 2 +- hw/isa/lpc_ich9.c | 4 ++-- include/hw/acpi/ich9.h | 1 - include/hw/i386/ich9.h | 2 +- 5 files changed, 7 insert

[Qemu-devel] [PATCH v2 1/5] q35: Remove old machine versions

Migration with q35 was not possible before commit 04329029a8c539eb5f75dcb6d8b016f0c53a031a, because q35 unconditionally creates an ich9-ahci device, that was marked as unmigratable. So all q35 machine classes before pc-q35-2.4 were not migratable, so there's no point in keeping compatibility code f

[Qemu-devel] [PATCH v2 0/5] q35: Remove old machines and unused compat code

This is another attempt to remove old q35 machine code. Now I am also removing unused compat code to demonstrate the benefit of throwing away the old code that nobody uses. Eduardo Habkost (5): q35: Remove old machine versions machine: Remove no_tco field ich9: Remove enable_tco arguments fr

[Qemu-devel] [PATCH v2 4/5] q35: Remove unused q35-acpi-dsdt.aml file

The file was used only by older machine-types, and it is not needed anymore. Signed-off-by: Eduardo Habkost --- Makefile | 2 +- hw/i386/pc_q35.c | 4 pc-bios/q35-acpi-dsdt.aml | Bin 7344 -> 0 bytes 3 files changed, 1 insertion(+), 5 deletions(-) delete mode

[Qemu-devel] [PATCH v2 2/5] machine: Remove no_tco field

The field is always set to zero, so it is not necessary anymore. Signed-off-by: Eduardo Habkost --- hw/i386/pc_q35.c| 3 +-- include/hw/boards.h | 1 - 2 files changed, 1 insertion(+), 3 deletions(-) diff --git a/hw/i386/pc_q35.c b/hw/i386/pc_q35.c index cc81601..8773efb 100644 --- a/hw/i38

[Qemu-devel] [PATCH v2 5/5] q35: No need to check gigabyte_align

gigabyte_align is always true on q35, so we don't need the !gigabyte_align compat code anymore. Signed-off-by: Eduardo Habkost --- hw/i386/pc_q35.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/hw/i386/pc_q35.c b/hw/i386/pc_q35.c index aed4432..20722f2 100644 --- a/hw/i3

Re: [Qemu-devel] [PATCH v2] target-i386/kvm: Hyper-V VMBus hypercalls blank handlers

- Original Message - > From: "Eduardo Habkost" > To: "Andrey Smetanin" > Cc: qemu-devel@nongnu.org, k...@vger.kernel.org, "Marcelo Tosatti" > , "Roman Kagan" > , "Denis V. Lunev" , "Paolo Bonzini" > , "Andreas Färber" > , "Richard Henderson" > Sent: Saturday, January 23, 2016 4:20:13

Re: [Qemu-devel] [PATCH] cuda.c: return error for unknown commands

On 22/01/16 23:07, Alyssa Milburn wrote: > This avoids MacsBug hanging at startup in the absence of ADB mouse > input, by replying with an error (which is also what MOL does) when > it sends an unknown command (0x1c). > > Signed-off-by: Alyssa Milburn > --- > hw/misc/macio/cuda.c | 5 + > 1

[Qemu-devel] [PATCH 02/13] cuda: reject unknown commands

Signed-off-by: Hervé Poussineau --- hw/misc/macio/cuda.c | 25 - 1 file changed, 16 insertions(+), 9 deletions(-) diff --git a/hw/misc/macio/cuda.c b/hw/misc/macio/cuda.c index 69f69c2..f27dd19 100644 --- a/hw/misc/macio/cuda.c +++ b/hw/misc/macio/cuda.c @@ -589,15 +589,1

[Qemu-devel] [PATCH 04/13] cuda: port SET_AUTO_RATE command to new framework

Take requested autopoll rate into account Signed-off-by: Hervé Poussineau --- hw/misc/macio/cuda.c | 31 +++ hw/ppc/mac.h | 1 + 2 files changed, 28 insertions(+), 4 deletions(-) diff --git a/hw/misc/macio/cuda.c b/hw/misc/macio/cuda.c index 37406fc..9ec642f

[Qemu-devel] [PATCH 03/13] cuda: port AUTOPOLL command to new framework

Signed-off-by: Hervé Poussineau --- hw/misc/macio/cuda.c | 40 +--- 1 file changed, 25 insertions(+), 15 deletions(-) diff --git a/hw/misc/macio/cuda.c b/hw/misc/macio/cuda.c index f27dd19..37406fc 100644 --- a/hw/misc/macio/cuda.c +++ b/hw/misc/macio/cuda.c @

[Qemu-devel] [PATCH 06/13] cuda: port POWERDOWN command to new framework

Signed-off-by: Hervé Poussineau --- hw/misc/macio/cuda.c | 17 + 1 file changed, 13 insertions(+), 4 deletions(-) diff --git a/hw/misc/macio/cuda.c b/hw/misc/macio/cuda.c index 9af8e1d..df4797f 100644 --- a/hw/misc/macio/cuda.c +++ b/hw/misc/macio/cuda.c @@ -601,10 +601,23 @@ sta

[Qemu-devel] [PATCH 00/13] cuda: misc fixes and cleanups

Hi, This patchset cleans up a little bit the Apple CUDA emulation: - correctly reject unknown commands - correctly reject commands with wrong parameters - support changing the frequency of auto-polling - support changing device list probed in auto-poll - add logs when using FILE_SERVER_FLAG/SET_PO

[Qemu-devel] [PATCH 12/13] cuda: remove GET_6805_ADDR command

It doesn't seem to be used, and operating systems should accept a 'unknown command' answer. Signed-off-by: Hervé Poussineau --- hw/misc/macio/cuda.c | 3 --- 1 file changed, 3 deletions(-) diff --git a/hw/misc/macio/cuda.c b/hw/misc/macio/cuda.c index 49a79fc..d1a7ae2 100644 --- a/hw/misc/maci

[Qemu-devel] [PATCH 08/13] cuda: port FILE_SERVER_FLAG command to new framework

This command tells if computer should automatically wake-up after a power loss. Signed-off-by: Hervé Poussineau --- hw/misc/macio/cuda.c | 17 - 1 file changed, 16 insertions(+), 1 deletion(-) diff --git a/hw/misc/macio/cuda.c b/hw/misc/macio/cuda.c index 70a5d0c..294e8fb 100644

[Qemu-devel] [PATCH 01/13] cuda: add a framework to handle commands

Next commits will port existing CUDA commands to this framework. Signed-off-by: Hervé Poussineau --- hw/misc/macio/cuda.c | 34 ++ 1 file changed, 34 insertions(+) diff --git a/hw/misc/macio/cuda.c b/hw/misc/macio/cuda.c index 9db4c64..69f69c2 100644 --- a/hw/mis

[Qemu-devel] [PATCH 13/13] cuda: remove CUDA_GET_SET_IIC/CUDA_COMBINED_FORMAT_IIC commands

We currently don't emulate the I2C bus provided by CUDA. Signed-off-by: Hervé Poussineau --- hw/misc/macio/cuda.c | 23 --- 1 file changed, 23 deletions(-) diff --git a/hw/misc/macio/cuda.c b/hw/misc/macio/cuda.c index d1a7ae2..80eea1b 100644 --- a/hw/misc/macio/cuda.c +++ b

[Qemu-devel] [PATCH 07/13] cuda: port RESET_SYSTEM command to new framework

Signed-off-by: Hervé Poussineau --- hw/misc/macio/cuda.c | 17 + 1 file changed, 13 insertions(+), 4 deletions(-) diff --git a/hw/misc/macio/cuda.c b/hw/misc/macio/cuda.c index df4797f..70a5d0c 100644 --- a/hw/misc/macio/cuda.c +++ b/hw/misc/macio/cuda.c @@ -613,11 +613,24 @@ sta

[Qemu-devel] [PATCH 05/13] cuda: port SET_DEVICE_LIST command to new framework

Take device list mask into account when polling ADB devices. Signed-off-by: Hervé Poussineau --- hw/input/adb.c | 18 ++ hw/misc/macio/cuda.c | 17 +++-- hw/ppc/mac.h | 1 + include/hw/input/adb.h | 2 +- roms/SLOF | 2 +- roms/open

[Qemu-devel] [PATCH 10/13] cuda: port GET_TIME command to new framework

Signed-off-by: Hervé Poussineau --- hw/misc/macio/cuda.c | 29 + 1 file changed, 21 insertions(+), 8 deletions(-) diff --git a/hw/misc/macio/cuda.c b/hw/misc/macio/cuda.c index 64a3e79..55e9cff 100644 --- a/hw/misc/macio/cuda.c +++ b/hw/misc/macio/cuda.c @@ -653,6 +65

[Qemu-devel] [PATCH 09/13] cuda: port SET_POWER_MESSAGES command to new framework

Signed-off-by: Hervé Poussineau --- hw/misc/macio/cuda.c | 19 --- 1 file changed, 16 insertions(+), 3 deletions(-) diff --git a/hw/misc/macio/cuda.c b/hw/misc/macio/cuda.c index 294e8fb..64a3e79 100644 --- a/hw/misc/macio/cuda.c +++ b/hw/misc/macio/cuda.c @@ -639,6 +639,20 @@ st

[Qemu-devel] [PATCH 11/13] cuda: port SET_TIME command to new framework

Signed-off-by: Hervé Poussineau --- hw/misc/macio/cuda.c | 24 ++-- 1 file changed, 18 insertions(+), 6 deletions(-) diff --git a/hw/misc/macio/cuda.c b/hw/misc/macio/cuda.c index 55e9cff..49a79fc 100644 --- a/hw/misc/macio/cuda.c +++ b/hw/misc/macio/cuda.c @@ -673,6 +673,23

Re: [Qemu-devel] [vfio-users] [PATCH v2 1/3] input: add qemu_input_qcode_to_linux + qemu_input_linux_to_qcode

Hi Gerd, I am using qemu 2.5.0 source code and applied all the patches on your git server. This one: https://www.kraxel.org/cgit/qemu/commit/?h=work/input-dev-event&id=b52110d4f22e99953ac5195a90988a253e3e2f90 causes the build to fail with this: error: array index in non-array initializer It happen

Re: [Qemu-devel] Regarding Intel IGD passthru support for QEMU/KVM

Hi All, As I mentioned, here is the Intel IGD Passthru in action, that's fully working without any issues, with QEMU/KVM running hardware-accelerated Android-x86 5.1/Lollipop : https://www.youtube.com/watch?v=PBN1DmarJ7k Thank you all once again for the wonderful work on QEMU/KVM/XEN since many y

Re: [Qemu-devel] [PATCH] target-mips: silence NaNs for cvt.s.d and cvt.d.s

On Sun, 6 Dec 2015, Aurelien Jarno wrote: > cvt.s.d and cvt.d.s are FP operations and thus need to convert input > sNaN into corresponding qNaN. Explicitely use the floatXX_maybe_silence_nan > functions for that as the floatXX_to_floatXX functions do not do that. > > Cc: Leon Alrae > Signed-off-

Re: [Qemu-devel] [PATCH v11 6/7] hw/ptimer: Legalize running with delta = load = 0 and abort on period = 0

On Thu, Jan 21, 2016 at 11:03 AM, Dmitry Osipenko wrote: > Currently ptimer would print error message and clear enable flag for an > arming timer that has delta = load = 0. That actually could be a valid case > for some hardware, like instant IRQ trigger for oneshot timer or continuous > in period

Re: [Qemu-devel] [PATCH v11 7/7] arm_mptimer: Convert to use ptimer

On Thu, Jan 21, 2016 at 11:03 AM, Dmitry Osipenko wrote: > Current ARM MPTimer implementation uses QEMUTimer for the actual timer, > this implementation isn't complete and mostly tries to duplicate of what > generic ptimer is already doing fine. > > Conversion to ptimer brings the following benefi

Re: [Qemu-devel] [PATCH v11 2/7] hw/ptimer: Perform counter wrap around if timer already expired

On Thu, Jan 21, 2016 at 11:03 AM, Dmitry Osipenko wrote: > ptimer_get_count() might be called while QEMU timer already been expired. > In that case ptimer would return counter = 0, which might be undesirable > in case of polled timer. Do counter wrap around for periodic timer to keep > it distribu

Re: [Qemu-devel] [PATCH 0/3] merge SSDT into DSDT

On Fri, Jan 22, 2016 at 03:36:05PM +0100, Igor Mammedov wrote: > Merging both tables will allow for futher ASL > simplification and cleanups per device/subsystem > And it also allows to reduce number of expected > binary blobs for ACPI tests which reduces tests > maintenance. What this does break,

Re: [Qemu-devel] [PATCH v2] pc: allow raising low memory via max-ram-below-4g option

On Fri, Jan 22, 2016 at 11:51:54AM +0100, Gerd Hoffmann wrote: > Hi, > > > > > I wonder whether we should just bite the bullet and ask management to > > > > maintain the physical memory map for us, instead of trying to give us > > > > hints. > > > > > > I doubt this simplified things, given the