Re: [Qemu-devel] [Xen-devel] [PATCH RFC v2 4/4] xen/MSI: re-expose masking capability

>>> On 11.12.15 at 17:56, wrote: > On Fri, 2015-12-11 at 16:44 +, Stefano Stabellini wrote: >> >> It is not possible to do this at runtime. I think we should do this at >> compile time because in any case it is not supported to run a QEMU built >> for a given Xen version on a different Xen v

[Qemu-devel] [PATCH for 2.5? 1/1] DSDT: add floppy-related objects

From: Roman Kagan On x86-based systems Linux determines the presence and the type of floppy drives via a query of a CMOS field. So does SeaBIOS when populating the return data for int 0x13 function 0x08. Windows doesn't; instead, it requests this information from BIOS via int 0x13/0x08 or throu

Re: [Qemu-devel] [Bug 1525682] Re: configure: fix POSIX compatibility issue

On Sun, Dec 13, 2015 at 06:39:22PM -, Dmitrij D. Czarkoff wrote: > Sorry, wrong patch. > > ** Patch added: "0001-configure-fix-POSIX-compatibility-issue.patch" > > https://bugs.launchpad.net/qemu/+bug/1525682/+attachment/4534158/+files/0001-configure-fix-POSIX-compatibility-issue.patch >

Re: [Qemu-devel] [PATCH] usb: hcd-ehci: add check to avoid an infinite loop

On Do, 2015-12-10 at 18:51 +0530, P J P wrote: >Hello Gerd, > > An infinite loop issue was reported by Mr Qinghao Tang(CC'd), in the USB EHCI > emulator. In that, a malicious isochronous transfer descriptor(iTD) list > could > unfold an infinite loop in the 'ehci_advance_state' routine, by

Re: [Qemu-devel] [RFC] qemu-system-arm: cortex-m gdb registers

On 14 December 2015 at 06:36, Christopher Friedt wrote: > * allow overriding the default xml descriptor with gdb_xml_descriptor() > * read cortex-m registers using arm_cortexm_gdb_read_register() > * write cortex-m registers using arm_cortexm_gdb_write_register() > * correct the number of cortex-m

[Qemu-devel] [RFC v6 00/14] Slow-path for atomic instruction translation

This is the sixth iteration of the patch series which applies to the upstream branch of QEMU (v2.5.0-rc3). Changes versus previous versions are at the bottom of this cover letter. The code is also available at following repository: https://git.virtualopensystems.com/dev/qemu-mt.git branch: slowpa

[Qemu-devel] [RFC v6 03/14] Add CPUClass hook to set exclusive range

Allow each architecture to set the exclusive range at any LoadLink operation through a CPUClass hook. This comes in handy to emulate, for instance, the exclusive monitor implemented in some ARM architectures (more precisely, the Exclusive Reservation Granule). Suggested-by: Jani Kokkonen Suggeste

[Qemu-devel] [RFC v6 06/14] configure: Use slow-path for atomic only when the softmmu is enabled

Use the new slow path for atomic instruction translation when the softmmu is enabled. Suggested-by: Jani Kokkonen Suggested-by: Claudio Fontana Signed-off-by: Alvise Rigo --- configure | 4 1 file changed, 4 insertions(+) diff --git a/configure b/configure index b9552fd..cc3891a 100755 -

[Qemu-devel] [RFC v6 11/14] softmmu: Simplify helper_*_st_name, wrap MMIO code

Attempting to simplify the helper_*_st_name, wrap the MMIO code into an inline function. Suggested-by: Jani Kokkonen Suggested-by: Claudio Fontana Signed-off-by: Alvise Rigo --- softmmu_template.h | 64 +- 1 file changed, 44 insertions(+), 20

[Qemu-devel] [RFC v6 01/14] exec.c: Add new exclusive bitmap to ram_list

The purpose of this new bitmap is to flag the memory pages that are in the middle of LL/SC operations (after a LL, before a SC) on a per-vCPU basis. For all these pages, the corresponding TLB entries will be generated in such a way to force the slow-path if at least one vCPU has the bit not set. Wh

[Qemu-devel] [RFC v6 10/14] softmmu: Simplify helper_*_st_name, wrap unaligned code

Attempting to simplify the helper_*_st_name, wrap the do_unaligned_access code into an inline function. Remove also the goto statement. Suggested-by: Jani Kokkonen Suggested-by: Claudio Fontana Signed-off-by: Alvise Rigo --- softmmu_template.h | 96 ++---

[Qemu-devel] [RFC v6 02/14] softmmu: Add new TLB_EXCL flag

Add a new TLB flag to force all the accesses made to a page to follow the slow-path. In the case we remove a TLB entry marked as EXCL, we unset the corresponding exclusive bit in the bitmap. Suggested-by: Jani Kokkonen Suggested-by: Claudio Fontana Signed-off-by: Alvise Rigo --- cputlb.c

[Qemu-devel] [RFC v6 14/14] softmmu: Protect MMIO exclusive range

As for the RAM case, also the MMIO exclusive ranges have to be protected by other CPU's accesses. In order to do that, we flag the accessed MemoryRegion to mark that an exclusive access has been performed and is not concluded yet. This flag will force the other CPUs to invalidate the exclusive rang

[Qemu-devel] [RFC v6 04/14] softmmu: Add helpers for a new slowpath

The new helpers rely on the legacy ones to perform the actual read/write. The LoadLink helper (helper_ldlink_name) prepares the way for the following SC operation. It sets the linked address and the size of the access. These helper also update the TLB entry of the page involved in the LL/SC for th

[Qemu-devel] [RFC v6 12/14] softmmu: Simplify helper_*_st_name, wrap RAM code

Attempting to simplify the helper_*_st_name, wrap the code relative to a RAM access into an inline function. Suggested-by: Jani Kokkonen Suggested-by: Claudio Fontana Signed-off-by: Alvise Rigo --- softmmu_template.h | 110 + 1 file changed,

[Qemu-devel] [RFC v6 05/14] tcg: Create new runtime helpers for excl accesses

Introduce a set of new runtime helpers do handle exclusive instructions. This helpers are used as hooks to call the respective LL/SC helpers in softmmu_llsc_template.h from TCG code. Suggested-by: Jani Kokkonen Suggested-by: Claudio Fontana Signed-off-by: Alvise Rigo --- Makefile.target

[Qemu-devel] [RFC v6 09/14] softmmu: Add history of excl accesses

Add a circular buffer to store the hw addresses used in the last EXCLUSIVE_HISTORY_LEN exclusive accesses. When an address is pop'ed from the buffer, its page will be set as not exclusive. In this way, we avoid: - frequent set/unset of a page (causing frequent flushes as well) - the possibility to

[Qemu-devel] [RFC v6 07/14] target-arm: translate: Use ld/st excl for atomic insns

Use the new LL/SC runtime helpers to handle the ARM atomic instructions in softmmu_llsc_template.h. In general, the helper generator gen_helper_{ldlink,stcond}_aa32_i{8,16,32,64}() calls the function helper_{le,be}_{ldlink,stcond}{ub,uw,ulq}_mmu() implemented in softmmu_llsc_template.h. Suggested

[Qemu-devel] [RFC v6 08/14] target-arm: Add atomic_clear helper for CLREX insn

Add a simple helper function to emulate the CLREX instruction. Suggested-by: Jani Kokkonen Suggested-by: Claudio Fontana Signed-off-by: Alvise Rigo --- target-arm/helper.h| 2 ++ target-arm/op_helper.c | 6 ++ target-arm/translate.c | 1 + 3 files changed, 9 insertions(+) diff --git a

[Qemu-devel] [RFC v6 13/14] softmmu: Include MMIO/invalid exclusive accesses

Enable exclusive accesses when the MMIO/invalid flag is set in the TLB entry. In case a LL access is done to MMIO memory, we treat it differently from a RAM access in that we do not rely on the EXCL bitmap to flag the page as exclusive. In fact, we don't even need the TLB_EXCL flag to force the slo

Re: [Qemu-devel] live migration vs device assignment (motivation)

On Fri, Dec 11, 2015 at 03:32:04PM +0800, Lan, Tianyu wrote: > > > On 12/11/2015 12:11 AM, Michael S. Tsirkin wrote: > >On Thu, Dec 10, 2015 at 10:38:32PM +0800, Lan, Tianyu wrote: > >> > >> > >>On 12/10/2015 7:41 PM, Dr. David Alan Gilbert wrote: > Ideally, it is able to leave guest driver u

Re: [Qemu-devel] [PATCH for 2.5? 1/1] DSDT: add floppy-related objects

On Mon, Dec 14, 2015 at 11:22:39AM +0300, Denis V. Lunev wrote: > From: Roman Kagan > > On x86-based systems Linux determines the presence and the type of > floppy drives via a query of a CMOS field. So does SeaBIOS when > populating the return data for int 0x13 function 0x08. > > Windows doesn

Re: [Qemu-devel] [PATCH for 2.5? 1/1] DSDT: add floppy-related objects

On 12/14/2015 12:21 PM, Michael S. Tsirkin wrote: On Mon, Dec 14, 2015 at 11:22:39AM +0300, Denis V. Lunev wrote: From: Roman Kagan On x86-based systems Linux determines the presence and the type of floppy drives via a query of a CMOS field. So does SeaBIOS when populating the return data for

Re: [Qemu-devel] live migration vs device assignment (motivation)

On Sun, Dec 13, 2015 at 11:47:44PM +0800, Lan, Tianyu wrote: > > > On 12/11/2015 1:16 AM, Alexander Duyck wrote: > >On Thu, Dec 10, 2015 at 6:38 AM, Lan, Tianyu wrote: > >> > >> > >>On 12/10/2015 7:41 PM, Dr. David Alan Gilbert wrote: > > Ideally, it is able to leave guest driver unmodi

Re: [Qemu-devel] [PATCH 2/4] error: Clean up errors with embedded newlines (again), part 1

Laszlo Ersek writes: > On 12/10/15 18:23, Markus Armbruster wrote: >> The arguments of error_report() should yield a short error string >> without newlines. >> >> A few places try to print additional help after the error message by >> embedding newlines in the error string. That's nice, but let

Re: [Qemu-devel] [PATCH for 2.5? 1/1] DSDT: add floppy-related objects

On 14/12/2015 10:26, Denis V. Lunev wrote: >> > > this was a question actually. > > Yes, this is not a regression but user observable bug. The floppy > is not available in Windows UEFI guests and it is not that easy > to get VirtIO drivers in this case installed especially for root > disk. Isn

Re: [Qemu-devel] [RFC v6 00/14] Slow-path for atomic instruction translation

On 14/12/2015 09:41, Alvise Rigo wrote: > In theory, the provided implementation of TCG LoadLink/StoreConditional > can be used to properly handle atomic instructions on any architecture. No, _in theory_ this implementation is wrong. If a normal store can make a concurrent LL-SC pair fail, it's

Re: [Qemu-devel] [RFC v6 09/14] softmmu: Add history of excl accesses

On 14/12/2015 09:41, Alvise Rigo wrote: > +static inline void excl_history_put_addr(CPUState *cpu, hwaddr addr) > +{ > +/* Avoid some overhead if the address we are about to put is equal to > + * the last one */ > +if (cpu->excl_protected_addr[cpu->excl_protected_last] != > +

Re: [Qemu-devel] [RFC v6 06/14] configure: Use slow-path for atomic only when the softmmu is enabled

On 14/12/2015 09:41, Alvise Rigo wrote: > Use the new slow path for atomic instruction translation when the > softmmu is enabled. > > Suggested-by: Jani Kokkonen > Suggested-by: Claudio Fontana > Signed-off-by: Alvise Rigo > --- > configure | 4 > 1 file changed, 4 insertions(+) > > di

Re: [Qemu-devel] [RFC v6 06/14] configure: Use slow-path for atomic only when the softmmu is enabled

On 14/12/2015 10:38, Paolo Bonzini wrote: >> > +if test "$softmmu" = "yes" ; then >> > + echo "CONFIG_TCG_USE_LDST_EXCL=y" >> $config_host_mak >> > +fi > Just use CONFIG_SOFTMMU in translate.c, no? > > A target other than ARM might need ll/sc in user-mode emulation as well. Sorry, that makes n

Re: [Qemu-devel] [RFC v6 05/14] tcg: Create new runtime helpers for excl accesses

On 14/12/2015 09:41, Alvise Rigo wrote: > diff --git a/tcg/tcg-llsc-gen-helper.h b/tcg/tcg-llsc-gen-helper.h > new file mode 100644 > index 000..2b647cd > --- /dev/null > +++ b/tcg/tcg-llsc-gen-helper.h > @@ -0,0 +1,32 @@ > +DEF_HELPER_3(ldlink_aa32_i8, i32, env, i32, i32) > +DEF_HELPER_3(ldl

Re: [Qemu-devel] [PATCH for 2.5? 1/1] DSDT: add floppy-related objects

On 12/14/2015 12:28 PM, Paolo Bonzini wrote: On 14/12/2015 10:26, Denis V. Lunev wrote: this was a question actually. Yes, this is not a regression but user observable bug. The floppy is not available in Windows UEFI guests and it is not that easy to get VirtIO drivers in this case installed e

Re: [Qemu-devel] [PATCH 3/4] error: Clean up errors with embedded newlines (again), part 2

Laszlo Ersek writes: > On 12/10/15 18:23, Markus Armbruster wrote: >> The arguments of error_setg() & friends should yield a short error >> string without newlines. >> >> A few places try to append additional help to the error message by >> embedding newlines in the error string. That's nice, b

Re: [Qemu-devel] [PATCH for 2.5? 1/1] DSDT: add floppy-related objects

On 14/12/2015 10:41, Denis V. Lunev wrote: > The problem comes from unattended installation. As far as we > have tried unattended answers file should come on USB flash > or on floppy. Yes, the answers file cannot use an ISO indeed. But as you said it can be USB mass storage. In any case, even

Re: [Qemu-devel] [PATCH for 2.5? 1/1] DSDT: add floppy-related objects

On 12/14/2015 12:44 PM, Paolo Bonzini wrote: On 14/12/2015 10:41, Denis V. Lunev wrote: The problem comes from unattended installation. As far as we have tried unattended answers file should come on USB flash or on floppy. Yes, the answers file cannot use an ISO indeed. But as you said it can

Re: [Qemu-devel] [PATCH for 2.5? 1/1] DSDT: add floppy-related objects

On 14/12/2015 10:49, Denis V. Lunev wrote: >> >> In any case, even if this is a bug that we want to add to 2.5.1, it's >> definitely too late for 2.5---at any time after soft freeze. > ok. 2.5.1 would be really great. Thank you for a prompt reply. > > Though I have a question about the freeze po

Re: [Qemu-devel] [PATCH] rtc: introduce nmi disable bit handler for cmos

On 12/12/2015 14:15, Gonglei wrote: > The Non-Maskable Interrupt (NMI) Enable bit is 0x80 bit of > Port 0x70 (and its aliases). This bit must be 0b to enable > the hardware chipset to send a Non-Maskable Interrupt. When > set to a 1b, NMI's are disabled. This bit is commonly accessed > by applica

Re: [Qemu-devel] [PATCH 4/4] hw/s390x: Rename local variables Error *l_err to just err

David Hildenbrand writes: >> >> static Property s390_ipl_properties[] = { >> diff --git a/hw/s390x/sclp.c b/hw/s390x/sclp.c >> index a061b49..9a117c9 100644 >> --- a/hw/s390x/sclp.c >> +++ b/hw/s390x/sclp.c >> @@ -456,29 +456,29 @@ static void sclp_realize(DeviceState *dev, Error >> **errp) >>

Re: [Qemu-devel] [PATCH] usb: hcd-ehci: add check to avoid an infinite loop

Hello Gerd, +-- On Mon, 14 Dec 2015, Gerd Hoffmann wrote --+ | Can you test the attached patch please? In case it doesn't fix the bug: Yes, it did fix the infinite loop issue. Thank you. -- Prasad J Pandit / Red Hat Product Security Team 47AF CE69 3A90 54AA 9045 1053 DD13 3D32 FE5B 041F

Re: [Qemu-devel] [RFC v6 00/14] Slow-path for atomic instruction translation

Hi Paolo, Thank you for your feedback. On Mon, Dec 14, 2015 at 10:33 AM, Paolo Bonzini wrote: > > > > On 14/12/2015 09:41, Alvise Rigo wrote: > > In theory, the provided implementation of TCG LoadLink/StoreConditional > > can be used to properly handle atomic instructions on any architecture. >

Re: [Qemu-devel] [PATCH 01/12] hw: Don't use hw_error() for machine initialization errors

On 10/12/15 11:29, Markus Armbruster wrote: > Printing CPU registers is not helpful during machine initialization. > Moreover, these are straightforward configuration or "can get > resources" errors, so dumping core isn't appropriate either. Replace > hw_error() by error_report(); exit(1). Matche

Re: [Qemu-devel] [PATCH 05/12] raven: Mark use of hw_error() in realize() FIXME

On 10/12/15 11:29, Markus Armbruster wrote: > Device realize() methods aren't supposed to call hw_error(), they > should set an error and fail cleanly. Blindly doing that would be > easy enough, but then realize() would fail without undoing its side > effects. Just mark it FIXME for now. > > Cc:

Re: [Qemu-devel] [RFC v6 06/14] configure: Use slow-path for atomic only when the softmmu is enabled

On 14/12/2015 09:41, Alvise Rigo wrote: > Use the new slow path for atomic instruction translation when the > softmmu is enabled. > > Suggested-by: Jani Kokkonen > Suggested-by: Claudio Fontana > Signed-off-by: Alvise Rigo > --- > configure | 4 > 1 file changed, 4 insertions(+) > > di

Re: [Qemu-devel] [PATCH 4/4] hw/s390x: Rename local variables Error *l_err to just err

On Mon, 14 Dec 2015 10:59:36 +0100 Markus Armbruster wrote: > Separate patch, like this: > > diff --git a/hw/s390x/sclp.c b/hw/s390x/sclp.c > index 9a117c9..74f2b40 100644 > --- a/hw/s390x/sclp.c > +++ b/hw/s390x/sclp.c > @@ -463,21 +463,18 @@ static void sclp_realize(DeviceState *dev, Error **e

Re: [Qemu-devel] [RFC v6 00/14] Slow-path for atomic instruction translation

On 14/12/2015 11:04, alvise rigo wrote: > In any case, what I proposed in the mttcg based v5 was: > - A LL ensures that the TLB_EXCL flag is set on all the CPU's TLB. > This is done by querying a TLB flush to all (not exactly all...) the > CPUs. To be 100% safe, probably we should also wait that

Re: [Qemu-devel] [PATCH] usb: hcd-ehci: add check to avoid an infinite loop

On Mo, 2015-12-14 at 15:33 +0530, P J P wrote: > Hello Gerd, > > +-- On Mon, 14 Dec 2015, Gerd Hoffmann wrote --+ > | Can you test the attached patch please? In case it doesn't fix the bug: > > Yes, it did fix the infinite loop issue. Good. Is there a cve number for that one which I can ad

Re: [Qemu-devel] [PATCH 4/4] hw/s390x: Rename local variables Error *l_err to just err

> On Mon, 14 Dec 2015 10:59:36 +0100 > Markus Armbruster wrote: > > > Separate patch, like this: > > > > diff --git a/hw/s390x/sclp.c b/hw/s390x/sclp.c > > index 9a117c9..74f2b40 100644 > > --- a/hw/s390x/sclp.c > > +++ b/hw/s390x/sclp.c > > @@ -463,21 +463,18 @@ static void sclp_realize(DeviceS

[Qemu-devel] [Bug 1525682] Re: configure: fix POSIX compatibility issue

In particular, the Signed-off-by: line is critically important -- we cannot apply a patch without one. git blame says this + syntax was originally introduced in commit becaeb726 in July (though at that point the variable name was slightly different: ${gnutls_nettle+($nettle_version)} ). That means

Re: [Qemu-devel] [PATCH] usb: hcd-ehci: add check to avoid an infinite loop

+-- On Mon, 14 Dec 2015, Gerd Hoffmann wrote --+ | Good. Is there a cve number for that one which I can add to the commit | message? No, not yet. I'll request one, once it is approved for the upstream. Thank you. -- Prasad J Pandit / Red Hat Product Security Team 47AF CE69 3A90 54AA 9045 1053

Re: [Qemu-devel] [PATCH 01/12] hw: Don't use hw_error() for machine initialization errors

Thomas Huth writes: > On 10/12/15 11:29, Markus Armbruster wrote: >> Printing CPU registers is not helpful during machine initialization. >> Moreover, these are straightforward configuration or "can get >> resources" errors, so dumping core isn't appropriate either. Replace >> hw_error() by erro

Re: [Qemu-devel] An RDMA race?

* Michael R. Hines (mhi...@digitalocean.com) wrote: > David, > > Thanks for including my email directly. It helps a lot. > > Below, I'm going to assume that only "dest" is calling > qemu_rdma_exchange_recv() > and only src is calling qemu_rdma_exchange_send(), since you didn't specify > who > is

[Qemu-devel] [PATCH] ehci: make idt processing more robust

Make ehci_process_itd return an error in case we didn't do any actual iso transfer because we've found no active transaction. That'll avoid ehci happily run in circles forever if the guest builds a loop out of idts. Reported-by: Qinghao Tang Tested-by: P J P Signed-off-by: Gerd Hoffmann --- h

Re: [Qemu-devel] [PATCH] usb: hcd-ehci: add check to avoid an infinite loop

On Mo, 2015-12-14 at 16:16 +0530, P J P wrote: > +-- On Mon, 14 Dec 2015, Gerd Hoffmann wrote --+ > | Good. Is there a cve number for that one which I can add to the commit > | message? > > No, not yet. I'll request one, once it is approved for the upstream. Ok, sending out for review without

Re: [Qemu-devel] [Xen-devel] [PATCH RFC v2 4/4] xen/MSI: re-expose masking capability

On Fri, 11 Dec 2015, Ian Campbell wrote: > On Fri, 2015-12-11 at 16:44 +, Stefano Stabellini wrote: > >   > > It is not possible to do this at runtime. I think we should do this at > > compile time because in any case it is not supported to run a QEMU built > > for a given Xen version on a diff

Re: [Qemu-devel] [Xen-devel] [PATCH RFC v2 4/4] xen/MSI: re-expose masking capability

On Mon, 14 Dec 2015, Jan Beulich wrote: > >>> On 11.12.15 at 17:56, wrote: > > On Fri, 2015-12-11 at 16:44 +, Stefano Stabellini wrote: > >> > >> It is not possible to do this at runtime. I think we should do this at > >> compile time because in any case it is not supported to run a QEMU bui

[Qemu-devel] [PATCH v2 04/10] igd: switch TYPE_IGD_PASSTHROUGH_I440FX_PCI_DEVICE to realize

Signed-off-by: Gerd Hoffmann --- hw/pci-host/igd.c | 9 - 1 file changed, 4 insertions(+), 5 deletions(-) diff --git a/hw/pci-host/igd.c b/hw/pci-host/igd.c index ef0273b..d1eeafb 100644 --- a/hw/pci-host/igd.c +++ b/hw/pci-host/igd.c @@ -53,7 +53,7 @@ out: return ret; } -static

[Qemu-devel] [PATCH v2 00/10] igd passthrough chipset tweaks

Hi, We have some code in our tree to support pci passthrough of intel graphics devices (igd) on xen, which requires some chipset tweaks for (a) the host bridge and (b) the lpc/isa-bridge to meat the expectations of the guest driver. For kvm we need pretty much the same, also the requirements fo

[Qemu-devel] [PATCH v2 02/10] pc: remove has_igd_gfx_passthru global

Signed-off-by: Gerd Hoffmann --- hw/xen/xen_pt.h | 3 +-- vl.c| 10 -- 2 files changed, 1 insertion(+), 12 deletions(-) diff --git a/hw/xen/xen_pt.h b/hw/xen/xen_pt.h index c545280..6d8702b 100644 --- a/hw/xen/xen_pt.h +++ b/hw/xen/xen_pt.h @@ -320,10 +320,9 @@ extern void *

[Qemu-devel] [PATCH v2 06/10] igd: use defines for standard pci config space offsets

Signed-off-by: Gerd Hoffmann --- hw/pci-host/igd.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/hw/pci-host/igd.c b/hw/pci-host/igd.c index 6f52ab1..0784128 100644 --- a/hw/pci-host/igd.c +++ b/hw/pci-host/igd.c @@ -10,9 +10,9 @@ typedef struct { /* Here we just ex

[Qemu-devel] [PATCH v2 03/10] pc: move igd support code to igd.c

Pure code motion, except for dropping instance_size for TYPE_IGD_PASSTHROUGH_I440FX_PCI_DEVICE (no need to set, we can inherit it from TYPE_I440FX_PCI_DEVICE). Signed-off-by: Gerd Hoffmann Acked-by: Stefano Stabellini --- hw/pci-host/Makefile.objs | 3 ++ hw/pci-host/igd.c | 96 +++

[Qemu-devel] [PATCH v2 01/10] pc: wire up TYPE_IGD_PASSTHROUGH_I440FX_PCI_DEVICE for !xen

rename pc_xen_hvm_init_pci to pc_i440fx_init_pci, use it for both xen and non-xen init. That changes behavior of all pc-i440fx-$version machine types where specifying -machine igd-passthru=on used to have no effect and now it has. It is unlikely to cause any trouble though as there used to be no

[Qemu-devel] [PATCH v2 09/10] igd: move igd-passthrough-isa-bridge to igd.c too

Signed-off-by: Gerd Hoffmann --- hw/i386/pc_piix.c | 113 -- hw/pci-host/igd.c | 108 +++ 2 files changed, 108 insertions(+), 113 deletions(-) diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c in

[Qemu-devel] [PATCH v2 07/10] igd: revamp host config read

Move all work to the host_pci_config_copy helper function, which we can easily reuse when adding q35 support. Open sysfs file only once for all values. Use pread. Proper error handling. Fix bugs: * Don't throw away results (like old host_pci_config_read did because val was passed by value no

[Qemu-devel] [PATCH] ehci: make idt processing more robust

Make ehci_process_itd return an error in case we didn't do any actual iso transfer because we've found no active transaction. That'll avoid ehci happily run in circles forever if the guest builds a loop out of idts. Signed-off-by: Gerd Hoffmann --- hw/usb/hcd-ehci.c | 5 +++-- 1 file changed, 3

[Qemu-devel] [PATCH v2 05/10] igd: TYPE_IGD_PASSTHROUGH_I440FX_PCI_DEVICE: call parent realize

Signed-off-by: Gerd Hoffmann --- hw/pci-host/igd.c | 9 + 1 file changed, 9 insertions(+) diff --git a/hw/pci-host/igd.c b/hw/pci-host/igd.c index d1eeafb..6f52ab1 100644 --- a/hw/pci-host/igd.c +++ b/hw/pci-host/igd.c @@ -53,12 +53,20 @@ out: return ret; } +static void (*i440fx_

[Qemu-devel] [PATCH v2 08/10] igd: add q35 support

Signed-off-by: Gerd Hoffmann --- hw/pci-host/igd.c | 41 - hw/pci-host/q35.c | 6 +- 2 files changed, 45 insertions(+), 2 deletions(-) diff --git a/hw/pci-host/igd.c b/hw/pci-host/igd.c index ec48875..f6e3f7a 100644 --- a/hw/pci-host/igd.c +++ b/hw/pc

[Qemu-devel] [Bug 1525682] Re: configure: fix POSIX compatibility issue

OK, so I misidentified the issue and screwed up my bug report. The shell is pdksh on OpenBSD, and the real issue is with parentheses: $ a=1 $ b=2 $ echo "${a+($b)}" ksh: ${a+($b)}": bad substitution $ echo "${a+\($b\)}" (2) -- You received this bug notification because you are a mem

[Qemu-devel] [PATCH v2 10/10] igd: handle igd-passthrough-isa-bridge setup in realize()

That way a simple '-device igd-passthrough-isa-bridge,addr=1f' will do the setup. Also instead of looking up reasonable PCI IDs based on the graphic device id simply copy over the ids from the host, thereby reusing the infrastructure we have in place for the igd host bridges. Less code, and shoul

Re: [Qemu-devel] [Xen-devel] [PATCH RFC v2 4/4] xen/MSI: re-expose masking capability

On Mon, 2015-12-14 at 11:19 +, Stefano Stabellini wrote: > On Fri, 11 Dec 2015, Ian Campbell wrote: > > On Fri, 2015-12-11 at 16:44 +, Stefano Stabellini wrote: > > >   > > > It is not possible to do this at runtime. I think we should do this > > > at > > > compile time because in any case

Re: [Qemu-devel] [PATCH 05/18] slirp: Factorizing address translation

On 12/12/15 00:14, Samuel Thibault wrote: > Hello, > > Thomas, this is the last refactoring patch which doesn't have a review > yet, right? Right. It somehow showed up out of order in my e-mail program, so I missed it on Friday, sorry. So here's a review... > > Samuel Thibault, on Fri 11 Dec 20

Re: [Qemu-devel] net: vmxnet3: memory leakage issue

Hello Dmitry, Jason +-- On Sun, 13 Dec 2015, Dmitry Fleytman wrote --+ | According to Linux driver code VMXNET3_CMD_QUIESCE_DEV does not flip | paused/active states. It always disables device, see vmxnet3_resume() for | |

[Qemu-devel] [Bug 1525682] Re: configure: fix POSIX compatibility issue

Unfortunately in bash and dash backslash-escaping the brackets results in the backslashes being printed verbatim: $ (a=1 b=2 ; echo "${a+\($b\)}") \(2\) Can you try this syntax with extra quote characters? (It works in bash/dash): (a=1 b=2 ; echo "${a+"($b)"}") (2) -- You received this bug noti

Re: [Qemu-devel] [PATCH v2] checkpatch: Detect newlines in error_report and other error functions

"Jason J. Herne" writes: > We don't want newlines embedded in error messages. This seems to be a common > problem with new code so let's try to catch it with checkpatch. > > This will not catch cases where newlines are inserted into the middle of an > existing multi-line statement. But those case

Re: [Qemu-devel] [PATCH] rtc: introduce nmi disable bit handler for cmos

Hi Paolo, Thanks for your comments firstly. > Subject: Re: [PATCH] rtc: introduce nmi disable bit handler for cmos > > > > On 12/12/2015 14:15, Gonglei wrote: > > The Non-Maskable Interrupt (NMI) Enable bit is 0x80 bit of Port 0x70 > > (and its aliases). This bit must be 0b to enable the hardw

Re: [Qemu-devel] [PATCH] rtc: introduce nmi disable bit handler for cmos

On 14/12/2015 13:49, Gonglei (Arei) wrote: >>> > > This patch introduce nmi disable bit handler to fix the problem and >>> > > make the emulated CMOS like the real hardware. >> > >> > I think that this only works with -machine kernel_irqchip=off, however. > IIRCC, the kernel_irqchip is disabled

[Qemu-devel] [Bug 1525682] Re: configure: fix POSIX compatibility issue

It works. -- You received this bug notification because you are a member of qemu- devel-ml, which is subscribed to QEMU. https://bugs.launchpad.net/bugs/1525682 Title: configure: fix POSIX compatibility issue Status in QEMU: New Bug description: When running configure script from 2.5.0-r

[Qemu-devel] [PATCH] disas/libvixl: Update to upstream VIXL 1.12

Update our copy of libvixl to upstream's 1.12 release. The major benefit from QEMU's point of view is that some instructions previously disassembled as "unimplemented (System)" are now displayed as something more useful. It also fixes some warnings about format strings that newer w64-mingw32 compil

Re: [Qemu-devel] [RFC] qemu-system-arm: cortex-m gdb registers

On Mon, Dec 14, 2015 at 3:31 AM, Peter Maydell wrote: > This patch seems to be creating a completely new method of > constructing the XML to send to gdb. Is it really not possible > to do this using the existing mechanisms we have for selecting > XML to send to gdb and handling the registers it im

Re: [Qemu-devel] [RFC] qemu-system-arm: cortex-m gdb registers

On 14 December 2015 at 13:07, Christopher Friedt wrote: > On Mon, Dec 14, 2015 at 3:31 AM, Peter Maydell > wrote: >> This patch seems to be creating a completely new method of >> constructing the XML to send to gdb. Is it really not possible >> to do this using the existing mechanisms we have fo

Re: [Qemu-devel] [RFC] qemu-system-arm: cortex-m gdb registers

On Mon, Dec 14, 2015 at 8:14 AM, Peter Maydell wrote: > Note that our XML files are from gdb itself, so you should start > by checking whether gdb has a suitable Cortex-M xml file. They do indeed. Thanks for the tip.

Re: [Qemu-devel] [PATCH v2 58/74] pc: acpi: piix4: move PCI0._PRT() into SSDT

On Sun, 13 Dec 2015 17:19:23 +0200 Marcel Apfelbaum wrote: > On 12/10/2015 06:17 PM, Igor Mammedov wrote: > > Signed-off-by: Igor Mammedov > > --- > > v2: > > - adapt build_prt() for using for PCI0._PRT(), reduces code > > duplication, Suggested-by: Marcel Apfelbaum > > > > > > pc: acpi: piix

Re: [Qemu-devel] [PATCH] rtc: introduce nmi disable bit handler for cmos

> > On 14/12/2015 13:49, Gonglei (Arei) wrote: > >>> > > This patch introduce nmi disable bit handler to fix the problem > >>> > > and make the emulated CMOS like the real hardware. > >> > > >> > I think that this only works with -machine kernel_irqchip=off, however. > > IIRCC, the kernel_irqchip

[Qemu-devel] [Bug 1525682] Re: configure: fix POSIX compatibility issue

Thanks. I'll send out a patch. -- You received this bug notification because you are a member of qemu- devel-ml, which is subscribed to QEMU. https://bugs.launchpad.net/bugs/1525682 Title: configure: fix POSIX compatibility issue Status in QEMU: New Bug description: When running configur

Re: [Qemu-devel] [PATCH] rtc: introduce nmi disable bit handler for cmos

On 14/12/2015 14:27, Gonglei (Arei) wrote: > >> >> On 14/12/2015 13:49, Gonglei (Arei) wrote: >>> This patch introduce nmi disable bit handler to fix the problem >>> and make the emulated CMOS like the real hardware. > > I think that this only works with -machine kernel_irqchip=o

[Qemu-devel] [Bug 1525682] Re: configure: fix POSIX compatibility issue

Actually it turns out we really shouldn't be using the ${} syntax anyway, because if nettle is not present we end up printing "nettle: no ()" because $nettle is set to "no", not null or unset. So we should just write this out like: if test "$nettle" = "yes"; then echo "nettle$nett

Re: [Qemu-devel] [PATCH for-2.5 1/1] blockdev: Mark {insert, remove}-medium experimental

Peter Maydell writes: > On 11 December 2015 at 15:43, Max Reitz wrote: >> On 2015-12-11 at 16:40, Peter Maydell wrote: >>> >>> On 11 December 2015 at 15:30, Eric Blake wrote: On 12/11/2015 08:23 AM, Max Reitz wrote: > > > SQMP > -blockdev-remove-medium > +x-block

[Qemu-devel] [PATCHv6 0/9] slirp: Adding IPv6 support to Qemu -net user mode

Hello, This is another respin of IPv6 in Qemu -net user mode. The following patches first make some refactoring to make current code ready for IPv6, and do not change the behavior. The actual IPv6 support will then be submitted as a separate patch series. Difference with version 5 is: - separat

[Qemu-devel] [PATCH 4/9] slirp: Make Socket structure IPv6 compatible

From: Guillaume Subiron This patch replaces foreign and local address/port couples in Socket structure by 2 sockaddr_storage which can be casted in sockaddr_in. Direct access to address and port is still possible thanks to some \#define, so retrocompatibility of the existing code is assured. The

[Qemu-devel] [PATCH 3/9] slirp: Adding address family switch for incoming frames

From: Guillaume Subiron In if_encap, a switch is added to prepare for the IPv6 case. Some code is factorized. This prepares for IPv6 support. Signed-off-by: Guillaume Subiron Signed-off-by: Samuel Thibault --- slirp/slirp.c | 61 ++- 1

[Qemu-devel] [PATCH 2/9] slirp: Generalizing and neutralizing ARP code

From: Guillaume Subiron Basically, this patch replaces "arp" by "resolution" every time "arp" means "mac resolution" and not specifically ARP. This prepares for IPv6 support. Signed-off-by: Guillaume Subiron Signed-off-by: Samuel Thibault --- slirp/mbuf.c | 2 +- slirp/mbuf.h | 2 +- slirp

[Qemu-devel] [PATCH 5/9] slirp: Factorizing address translation

From: Guillaume Subiron This patch factorizes some duplicate code into a new function, sotranslate_out(). This function perform the address translation when a packet is transmitted to the host network. If the packet is destinated to the host, the loopback address is used, and if the packet is des

[Qemu-devel] [PATCH 9/9] slirp: Adding family argument to tcp_fconnect()

From: Guillaume Subiron This patch simply adds a sa_family_t argument to remove the hardcoded "AF_INET" in the call of qemu_socket(). This prepares for IPv6 support. Signed-off-by: Guillaume Subiron Signed-off-by: Samuel Thibault Reviewed-by: Thomas Huth --- slirp/slirp.h | 2 +- slirp/

[Qemu-devel] [PATCH 6/9] slirp: Factorizing and cleaning solookup()

From: Guillaume Subiron solookup() was only compatible with TCP. Having the socket list in argument, it is now compatible with UDP too. Some optimization code is factorized inside the function (the function look at the last returned result before browsing the complete socket list). This prepare

[Qemu-devel] [PATCH 1/9] slirp: goto bad in udp_input if sosendto fails

From: Guillaume Subiron Before this patch, if sosendto fails, udp_input is executed as if the packet was sent, recording the packet for icmp errors, which does not makes sense since the packet was not actually sent, errors would be related to a previous packet. This patch adds a goto bad to cut

[Qemu-devel] [PATCH 7/9] slirp: Add sockaddr_equal, make solookup family-agnostic

From: Guillaume Subiron This patch makes solookup() compatible with varying address families, by using a new sockaddr_equal() function that compares two sockaddr_storage. This prepares for IPv6 support. Signed-off-by: Guillaume Subiron Signed-off-by: Samuel Thibault --- slirp/socket.c| 2

[Qemu-devel] [PATCH 8/9] slirp: Make udp_attach IPv6 compatible

From: Guillaume Subiron A sa_family_t is now passed in argument to udp_attach instead of using a hardcoded "AF_INET" to call qemu_socket(). This prepares for IPv6 support. Signed-off-by: Guillaume Subiron Signed-off-by: Samuel Thibault Reviewed-by: Thomas Huth --- slirp/ip_icmp.c | 2 +- sl

Re: [Qemu-devel] [RFC PATCH 3/3] x86: Create dma_mark_dirty to dirty pages used for DMA by VM guest

On Sun, Dec 13, 2015 at 01:28:31PM -0800, Alexander Duyck wrote: > This patch is meant to provide the guest with a way of flagging DMA pages > as being dirty to the host when using a direct-assign device within a > guest. The advantage to this approach is that it is fairly simple, however > It cur

Re: [Qemu-devel] [RFC PATCH 0/3] x86: Add support for guest DMA dirty page tracking

On Mon, Dec 14, 2015 at 03:20:26PM +0800, Yang Zhang wrote: > On 2015/12/14 13:46, Alexander Duyck wrote: > >On Sun, Dec 13, 2015 at 9:22 PM, Yang Zhang wrote: > >>On 2015/12/14 12:54, Alexander Duyck wrote: > >>> > >>>On Sun, Dec 13, 2015 at 6:27 PM, Yang Zhang > >>>wrote: > > On 2015/1

[Qemu-devel] [Bug 1525682] Re: configure: fix POSIX compatibility issue

FWIW this way it is also consistent with other check results reporting, eg. spice. -- You received this bug notification because you are a member of qemu- devel-ml, which is subscribed to QEMU. https://bugs.launchpad.net/bugs/1525682 Title: configure: fix POSIX compatibility issue Status in Q

[Qemu-devel] [PATCH v2 1/3] input: add qemu_input_qcode_to_linux + qemu_input_linux_to_qcode

Signed-off-by: Gerd Hoffmann --- include/ui/input.h | 3 ++ ui/input-keymap.c | 145 + 2 files changed, 148 insertions(+) diff --git a/include/ui/input.h b/include/ui/input.h index d06a12d..d7afd80 100644 --- a/include/ui/input.h +++ b/inclu

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