Re: [Qemu-devel] [SeaBIOS] qemu freeze, seabios release

2015-06-12 Thread Gerd Hoffmann
Hi, > should be cherry-picked into stable please speak up now. So far my list > is pretty short: Looked through the log. The leal instruction and ahci max-ports fixes are worth having too I think. So I have this list now: nilsson kraxel ~/projects/seabios (1.8-stable)# git log --oneline rel

Re: [Qemu-devel] where is the definition of cpu_ldub_code() for Softmmu mode?

2015-06-12 Thread Jun Koi
On Mon, May 18, 2015 at 6:20 PM, Peter Maydell wrote: > On 18 May 2015 at 10:55, Jun Koi wrote: > > Hi, > > > > I am trying to find the definition of cpu_ldub_code() in Softmmu mode. > > However, the only thing I can find is like this in > include/exec/cpu_ldst.h: > > > > #define cpu_ldub_co

Re: [Qemu-devel] [PATCH v3 2/2] vhost user: Add RARP injection for legacy guest

2015-06-12 Thread Jason Wang
On 06/11/2015 08:13 PM, Michael S. Tsirkin wrote: > On Thu, Jun 11, 2015 at 02:10:48PM +0200, Thibaut Collet wrote: >> I am not sure to understand your remark: >> >>> It needs to be sent when backend is activated by guest kick >>> (in case of virtio 1, it's possible to use DRIVER_OK for this). >>

Re: [Qemu-devel] where is the definition of cpu_ldub_code() for Softmmu mode?

2015-06-12 Thread Peter Maydell
On 12 June 2015 at 08:29, Jun Koi wrote: > On Mon, May 18, 2015 at 6:20 PM, Peter Maydell > wrote: >> In cpu_ldst.h we #define MEMSUFFIX _code and then include >> "exec/cpu_ldst_template.h" multiple times to define the >> accessor functions for the various widths. (For the usermode >> version we

Re: [Qemu-devel] [PATCH v2] net:Enable vhost with vhostforce, vhost options for guests without MSI-X support

2015-06-12 Thread Jason Wang
On 06/11/2015 07:49 PM, Pankaj Gupta wrote: >> On 06/05/2015 10:32 PM, Pankaj Gupta wrote: >>> We use vhostforce to enable vhost even if Guests don't have MSI-X >>> support >>> and we fall back to QEMU virtio-net. This patch will enable vhost >>> unconditionally >>> whenever we have vhost

Re: [Qemu-devel] [RFC v6 0/2] monitor: add memory search commands s, sp

2015-06-12 Thread Markus Armbruster
Luiz Capitulino writes: > On Thu, 28 May 2015 16:18:41 -0400 > Luiz Capitulino wrote: > >> On Mon, 18 May 2015 13:22:16 +0200 >> hw.clau...@gmail.com wrote: >> >> > From: Claudio Fontana >> > >> > This is the latest iteration of the memory search patch, >> > including a trivial replacement fo

Re: [Qemu-devel] [PATCH v2 1/2] monitor: Split mon_get_cpu fn to remove ENV_GET_CPU

2015-06-12 Thread Markus Armbruster
Markus Armbruster writes: > Peter Crosthwaite writes: > >> The monitor currently has one helper, mon_get_cpu() which will return >> an env pointer. The target specific users of this API want an env, but >> all the target agnostic users really just want the cpu pointer. These >> users then need t

Re: [Qemu-devel] [PATCH v2 1/2] monitor: Split mon_get_cpu fn to remove ENV_GET_CPU

2015-06-12 Thread Markus Armbruster
Peter Crosthwaite writes: > The monitor currently has one helper, mon_get_cpu() which will return > an env pointer. The target specific users of this API want an env, but > all the target agnostic users really just want the cpu pointer. These > users then need to use the target-specifically defin

Re: [Qemu-devel] where is the definition of cpu_ldub_code() for Softmmu mode?

2015-06-12 Thread Jun Koi
On Fri, Jun 12, 2015 at 3:59 PM, Peter Maydell wrote: > On 12 June 2015 at 08:29, Jun Koi wrote: > > On Mon, May 18, 2015 at 6:20 PM, Peter Maydell > > > wrote: > >> In cpu_ldst.h we #define MEMSUFFIX _code and then include > >> "exec/cpu_ldst_template.h" multiple times to define the > >> acces

Re: [Qemu-devel] [PULL 20/22] hw/arm/boot: arm_load_kernel implemented as a machine init done notifier

2015-06-12 Thread Eric Auger
Hi Peter, On 06/12/2015 04:54 AM, Peter Crosthwaite wrote: > On Tue, Jun 2, 2015 at 9:33 AM, Peter Maydell > wrote: >> From: Eric Auger >> >> Device tree nodes for the platform bus and its children dynamic sysbus >> devices are added in a machine init done notifier. To load the dtb once, >> afte

Re: [Qemu-devel] [PATCH 1/8] spec: add qcow2-dirty-bitmaps specification

2015-06-12 Thread Kevin Wolf
Am 11.06.2015 um 18:30 hat John Snow geschrieben: > On 06/11/2015 06:25 AM, Vladimir Sementsov-Ogievskiy wrote: > > On 10.06.2015 18:34, Kevin Wolf wrote: > >> Am 08.06.2015 um 17:21 hat Vladimir Sementsov-Ogievskiy geschrieben: > >>> +=== Bitmap table === > >>> + > >>> +A directory of all bitmaps

Re: [Qemu-devel] [RFC v6 0/2] monitor: add memory search commands s, sp

2015-06-12 Thread Claudio Fontana
On 12.06.2015 08:21, Markus Armbruster wrote: > Luiz Capitulino writes: > >> On Thu, 28 May 2015 16:18:41 -0400 >> Luiz Capitulino wrote: >> >>> On Mon, 18 May 2015 13:22:16 +0200 >>> hw.clau...@gmail.com wrote: >>> From: Claudio Fontana This is the latest iteration of the memory

[Qemu-devel] [PATCH v2 4/6] virtio-vga: add '-vga virtio' support

2015-06-12 Thread Gerd Hoffmann
Some convinience fluff: Add support for '-vga virtio', also add virtio-vga to the list of vga cards so '-device virtio-vga' will turn off the default vga. Written by Dave Airlie and Gerd Hoffmann. Signed-off-by: Dave Airlie Signed-off-by: Gerd Hoffmann --- hw/isa/isa-bus.c| 3 +++ hw

[Qemu-devel] [PATCH v2 5/6] virtio-vga: add vgabios configuration

2015-06-12 Thread Gerd Hoffmann
Add seavgabios configuration for virtio-vga, hook up the new vgabios in the makefiles. Signed-off-by: Gerd Hoffmann --- Makefile | 2 +- roms/Makefile | 2 +- roms/config.vga-virtio | 6 ++ 3 files changed, 8 insertions(+), 2 deletions(-) create mode 100644 roms/confi

[Qemu-devel] [PATCH v2 1/6] virtio-gpu: fix error message

2015-06-12 Thread Gerd Hoffmann
iov limit was raised, but the error message still has the old limit ... Signed-off-by: Gerd Hoffmann --- hw/display/virtio-gpu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/display/virtio-gpu.c b/hw/display/virtio-gpu.c index 4b10ca1..8c109b7 100644 --- a/hw/display/vi

[Qemu-devel] [PATCH v2 2/6] virtio-gpu-pci: add virtio pci support

2015-06-12 Thread Gerd Hoffmann
This patch adds virtio-gpu-pci, which is the pci proxy for the virtio gpu device. With this patch in place virtio-gpu is functional. You need a linux guest with a virtio-gpu driver though, and output will appear pretty late in boot, once the kernel initialized drm and fbcon. Written by Dave Airl

[Qemu-devel] [PATCH v2 0/6] virtio-gpu: pci support bits.

2015-06-12 Thread Gerd Hoffmann
Hi, Here is the code to add virtio-pci support for the virtio-gpu. This time it goes on top of master, all dependencies are merged upstream meanwhile. Yea! The only missing bit to make this fully functional is the seabios update which is needed for a working vgabios. I plan to send a pull req

[Qemu-devel] [PATCH v2 6/6] [testing-only] virtio-vga: add vgabios binary

2015-06-12 Thread Gerd Hoffmann
Add prebuilt vgabios-virtio.bin binary. Signed-off-by: Gerd Hoffmann --- pc-bios/vgabios-virtio.bin | Bin 0 -> 38912 bytes 1 file changed, 0 insertions(+), 0 deletions(-) create mode 100644 pc-bios/vgabios-virtio.bin diff --git a/pc-bios/vgabios-virtio.bin b/pc-bios/vgabios-virtio.bin new fil

[Qemu-devel] [PATCH v2 3/6] virtio-vga: add virtio gpu device with vga compatibility

2015-06-12 Thread Gerd Hoffmann
This patch adds a virtio-vga device. It is simliar to virtio-gpu-pci, but it also adds in vga compatibility, so guests without native virtio-gpu support can drive the device in vga mode. It is compatible with stdvga. Written by Dave Airlie and Gerd Hoffmann. Signed-off-by: Dave Airlie Signed-o

Re: [Qemu-devel] [PULL 20/22] hw/arm/boot: arm_load_kernel implemented as a machine init done notifier

2015-06-12 Thread Eric Auger
On 06/12/2015 10:25 AM, Eric Auger wrote: > Hi Peter, > On 06/12/2015 04:54 AM, Peter Crosthwaite wrote: >> On Tue, Jun 2, 2015 at 9:33 AM, Peter Maydell >> wrote: >>> From: Eric Auger >>> >>> Device tree nodes for the platform bus and its children dynamic sysbus >>> devices are added in a machi

[Qemu-devel] [RFC PATCH v1 0/4] Refactoring pc_dimm_plug and NUMA node lookup API

2015-06-12 Thread Bharata B Rao
Hi, This is the next version of the NUMA lookup API v0 that I posted earlier. In this version, I have added a patch to factor out generic code from pc_dimm_plug() so that the same can be used by other architectures. I combined NUMA lookup API and this patch together since they are related and touc

[Qemu-devel] [RFC PATCH v1 3/4] numa: Store boot memory address range in node_info

2015-06-12 Thread Bharata B Rao
Store memory address range information of boot memory in address range list of numa_info. This helps to have a common NUMA node lookup by address function that works for both boot time memory and hotplugged memory. Signed-off-by: Bharata B Rao --- numa.c | 22 ++ 1 file cha

[Qemu-devel] [RFC PATCH v1 1/4] pc, pc-dimm: Factor out reusable parts in pc_dimm_plug to a separate routine

2015-06-12 Thread Bharata B Rao
pc_dimm_plug() has code that will be needed for memory plug handlers in other archs too. Extract code from pc_dimm_plug() into a generic routine pc_dimm_memory_plug() that resides in pc-dimm.c. Also correspondingly refactor re-usable unplug code into pc_dimm_memory_unplug(). Signed-off-by: Bharata

[Qemu-devel] [RFC PATCH v1 4/4] numa: API to lookup NUMA node by address

2015-06-12 Thread Bharata B Rao
Introduce an API numa_get_node(ram_addr_t addr, Error **errp) that returns the NUMA node to which the given address belongs to. This API works uniformly for both boot time as well as hotplugged memory. This API is needed by sPAPR PowerPC to support ibm,dynamic-reconfiguration-memory device tree no

[Qemu-devel] [RFC PATCH v1 2/4] numa, pc-dimm: Store pc-dimm memory information in numa_info

2015-06-12 Thread Bharata B Rao
Start storing the (start_addr, size, nodeid) of the pc-dimm memory in numa_info so that this information can be used to lookup node by address. Signed-off-by: Bharata B Rao --- hw/mem/pc-dimm.c | 4 include/sysemu/numa.h | 10 ++ numa.c| 26

Re: [Qemu-devel] [PATCH v2] net:Enable vhost with vhostforce, vhost options for guests without MSI-X support

2015-06-12 Thread Pankaj Gupta
> > On 06/11/2015 07:49 PM, Pankaj Gupta wrote: > >> On 06/05/2015 10:32 PM, Pankaj Gupta wrote: > >>> We use vhostforce to enable vhost even if Guests don't have MSI-X > >>> support > >>> and we fall back to QEMU virtio-net. This patch will enable vhost > >>> unconditionally > >>> whenev

Re: [Qemu-devel] [PATCH V2] pci: fixes to allow booting from extra root pci buses.

2015-06-12 Thread Laszlo Ersek
On 06/11/15 21:24, Kevin O'Connor wrote: > On Thu, Jun 11, 2015 at 08:34:56PM +0200, Laszlo Ersek wrote: >> On 06/11/15 19:46, Marcel Apfelbaum wrote: >>> On 06/11/2015 07:54 PM, Kevin O'Connor wrote: On real machines, the firmware assigns the 4 - it's not a physical address; it's a logic

[Qemu-devel] [PULL 00/29] target-mips queue

2015-06-12 Thread Leon Alrae
llowing changes since commit 0e12e61ff9a3407d123d0dbc4d945aec98d60fdf: Merge remote-tracking branch 'remotes/kraxel/tags/pull-vga-20150610-1' into staging (2015-06-10 18:13:58 +0100) are available in the git repository at: git://github.com/lalrae/qemu.git tags/mips-20150612 for y

[Qemu-devel] [PULL 04/29] target-mips: Misaligned memory accesses for R6

2015-06-12 Thread Leon Alrae
From: Yongbok Kim Release 6 requires misaligned memory access support for all ordinary memory access instructions (for example, LW/SW, LWC1/SWC1). However misaligned support is not provided for certain special memory accesses such as atomics (for example, LL/SC). Signed-off-by: Yongbok Kim Revi

[Qemu-devel] [PULL 14/29] dma/rc4030: convert to QOM

2015-06-12 Thread Leon Alrae
From: Hervé Poussineau Signed-off-by: Hervé Poussineau Reviewed-by: Aurelien Jarno Signed-off-by: Leon Alrae --- hw/dma/rc4030.c| 115 ++--- hw/mips/mips_jazz.c| 37 ++-- include/hw/mips/mips.h | 4 +- 3 files changed, 113

[Qemu-devel] [PULL 05/29] softmmu: Add probe_write()

2015-06-12 Thread Leon Alrae
From: Yongbok Kim Probe for whether the specified guest write access is permitted. If it is not permitted then an exception will be taken in the same way as if this were a real write access (and we will not return). Otherwise the function will return, and there will be a valid entry in the TLB fo

[Qemu-devel] [PULL 01/29] target-mips: move group of functions above gen_load_fpr32()

2015-06-12 Thread Leon Alrae
Move the "Tests" group of functions so that gen_load_fpr32() and gen_store_fpr32() can use generate_exception(). Signed-off-by: Leon Alrae --- target-mips/translate.c | 118 1 file changed, 58 insertions(+), 60 deletions(-) diff --git a/target-mi

[Qemu-devel] [PULL 08/29] mips jazz: compile only in 64 bit

2015-06-12 Thread Leon Alrae
From: Hervé Poussineau Remove now useless device models from other MIPS configurations We're now compiling 12 files less than before. Signed-off-by: Hervé Poussineau Reviewed-by: Aurelien Jarno Signed-off-by: Leon Alrae --- default-configs/mips-softmmu.mak | 5 - default-configs/mip

[Qemu-devel] [PULL 16/29] net/dp8393x: do not use old_mmio accesses

2015-06-12 Thread Leon Alrae
From: Hervé Poussineau Signed-off-by: Hervé Poussineau Reviewed-by: Aurelien Jarno Signed-off-by: Leon Alrae --- hw/net/dp8393x.c | 114 ++- 1 file changed, 29 insertions(+), 85 deletions(-) diff --git a/hw/net/dp8393x.c b/hw/net/dp8393x.c

[Qemu-devel] [PULL 11/29] dma/rc4030: do not use old_mmio accesses

2015-06-12 Thread Leon Alrae
From: Hervé Poussineau Signed-off-by: Hervé Poussineau Reviewed-by: Aurelien Jarno Signed-off-by: Leon Alrae --- hw/dma/rc4030.c | 112 1 file changed, 16 insertions(+), 96 deletions(-) diff --git a/hw/dma/rc4030.c b/hw/dma/rc4030.c in

[Qemu-devel] [PULL 03/29] mips_malta: provide ememsize env variable to kernels

2015-06-12 Thread Leon Alrae
From: Paul Burton Commit 94c2b6aff43c (mips_malta: support up to 2GiB RAM) provided support for using over 256MB of RAM with the MIPS Malta board, including capping the memsize variable that QEMUs pseudo-bootloader provides to the kernel at 256MB in order to match YAMON. It didn't however provide

[Qemu-devel] [PULL 12/29] dma/rc4030: document register at offset 0x210

2015-06-12 Thread Leon Alrae
From: Hervé Poussineau Signed-off-by: Hervé Poussineau Reviewed-by: Aurelien Jarno Signed-off-by: Leon Alrae --- hw/dma/rc4030.c | 16 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/hw/dma/rc4030.c b/hw/dma/rc4030.c index 96f796b..bf82eed 100644 --- a/hw/dma/rc

[Qemu-devel] [PULL 25/29] target-mips: support Page Frame Number Extension field

2015-06-12 Thread Leon Alrae
Update tlb->PFN to contain PFN concatenated with PFNX. PFNX is 0 if large physical address is not supported. Signed-off-by: Leon Alrae Reviewed-by: Aurelien Jarno --- target-mips/op_helper.c | 32 ++-- 1 file changed, 26 insertions(+), 6 deletions(-) diff --git a/ta

[Qemu-devel] [PULL 02/29] target-mips: add Config5.FRE support allowing Status.FR=0 emulation

2015-06-12 Thread Leon Alrae
This relatively small architectural feature adds the following: FIR.FREP: Read-only. If FREP=1, then Config5.FRE and Config5.UFE are available. Config5.FRE: When enabled all single-precision FP arithmetic instructions, LWC1/LWXC1/MTC1, SWC1/SWXC1/MFC1 cause a Reserved Instr

[Qemu-devel] [PULL 07/29] target-mips: add ERETNC instruction and Config5.LLB bit

2015-06-12 Thread Leon Alrae
ERETNC is identical to ERET except that an ERETNC will not clear the LLbit that is set by execution of an LL instruction, and thus when placed between an LL and SC sequence, will never cause the SC to fail. Presence of ERETNC is denoted by the Config5.LLB. Signed-off-by: Leon Alrae Reviewed-by:

[Qemu-devel] [PULL 23/29] target-mips: correct MFC0 for CP0.EntryLo in MIPS64

2015-06-12 Thread Leon Alrae
CP0.EntryLo bits 31:30 have to be cleared. Signed-off-by: Leon Alrae Reviewed-by: Aurelien Jarno --- target-mips/translate.c | 12 ++-- 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/target-mips/translate.c b/target-mips/translate.c index f6ae0d3..2cc5875 100644 --- a/tar

[Qemu-devel] [PULL 15/29] net/dp8393x: always calculate proper checksums

2015-06-12 Thread Leon Alrae
From: Hervé Poussineau Signed-off-by: Hervé Poussineau Reviewed-by: Aurelien Jarno Signed-off-by: Leon Alrae --- hw/net/dp8393x.c | 12 +--- 1 file changed, 1 insertion(+), 11 deletions(-) diff --git a/hw/net/dp8393x.c b/hw/net/dp8393x.c index 2297231..093f0cc 100644 --- a/hw/net/dp8

[Qemu-devel] [PULL 21/29] net/dp8393x: correctly reset in_use field

2015-06-12 Thread Leon Alrae
From: Hervé Poussineau Don't write more than the field width, which is always 16 bit. Fixes network in NetBSD 5.1/arc Signed-off-by: Hervé Poussineau Reviewed-by: Aurelien Jarno Signed-off-by: Leon Alrae --- hw/net/dp8393x.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a

[Qemu-devel] [PULL 06/29] target-mips: Misaligned memory accesses for MSA

2015-06-12 Thread Leon Alrae
From: Yongbok Kim MIPS SIMD Architecture vector loads and stores require misalignment support. MSA Memory access should work as an atomic operation. Therefore, it has to check validity of all addresses for a vector store access if it is spanning into two pages. Separating helper functions for ea

[Qemu-devel] [PULL 13/29] dma/rc4030: use trace events instead of custom logging

2015-06-12 Thread Leon Alrae
From: Hervé Poussineau Remove also unneeded debug logs. Signed-off-by: Hervé Poussineau Reviewed-by: Aurelien Jarno Signed-off-by: Leon Alrae --- hw/dma/rc4030.c | 81 - trace-events| 6 + 2 files changed, 22 insertions(+), 65

[Qemu-devel] [PULL 18/29] net/dp8393x: QOM'ify

2015-06-12 Thread Leon Alrae
From: Hervé Poussineau Signed-off-by: Laurent Vivier Signed-off-by: Hervé Poussineau Reviewed-by: Aurelien Jarno Signed-off-by: Leon Alrae --- hw/mips/mips_jazz.c| 12 ++-- hw/net/dp8393x.c | 83 ++ include/hw/mips/mips.h | 5 ---

[Qemu-devel] [PULL 17/29] net/dp8393x: use dp8393x_ prefix for all functions

2015-06-12 Thread Leon Alrae
From: Hervé Poussineau Signed-off-by: Hervé Poussineau Reviewed-by: Aurelien Jarno Signed-off-by: Leon Alrae --- hw/net/dp8393x.c | 80 +--- 1 file changed, 41 insertions(+), 39 deletions(-) diff --git a/hw/net/dp8393x.c b/hw/net/dp8393x.c

[Qemu-devel] [PULL 22/29] net/dp8393x: fix hardware reset

2015-06-12 Thread Leon Alrae
From: Hervé Poussineau Documentation is not clear of what happens when doing a hardware reset, but firmware expect all registers to be zero unless specified otherwise. This fixes reboot on MIPS Magnum. Signed-off-by: Hervé Poussineau Reviewed-by: Aurelien Jarno Signed-off-by: Leon Alrae ---

[Qemu-devel] [PULL 29/29] target-mips: enable XPA and LPA features

2015-06-12 Thread Leon Alrae
Enable XPA in MIPS32R5-generic and LPA in MIPS64R6-generic. Signed-off-by: Leon Alrae Reviewed-by: Aurelien Jarno --- target-mips/translate_init.c | 16 ++-- 1 file changed, 10 insertions(+), 6 deletions(-) diff --git a/target-mips/translate_init.c b/target-mips/translate_init.c in

[Qemu-devel] [PULL 09/29] dma/rc4030: create custom DMA address space

2015-06-12 Thread Leon Alrae
From: Hervé Poussineau Add a new memory region in system address space where DMA address space definition (the 'translation table') belongs, so we can update on the fly the DMA address space. Signed-off-by: Hervé Poussineau Reviewed-by: Aurelien Jarno Signed-off-by: Leon Alrae --- hw/dma/rc4

[Qemu-devel] [PULL 24/29] target-mips: extend selected CP0 registers to 64-bits in MIPS32

2015-06-12 Thread Leon Alrae
Extend EntryLo0, EntryLo1, LLAddr and TagLo from 32 to 64 bits in MIPS32. Introduce gen_move_low32() function which moves low 32 bits from 64-bit temp to GPR; it sign extends 32-bit value on MIPS64 and truncates on MIPS32. Signed-off-by: Leon Alrae Reviewed-by: Aurelien Jarno --- target-mips/c

[Qemu-devel] [PULL 10/29] dma/rc4030: use AddressSpace and address_space_rw in users

2015-06-12 Thread Leon Alrae
From: Hervé Poussineau Now that rc4030 internally uses an AddressSpace for DMA handling, make its root memory region public. This is especially usefull for dp8393x netcard, which now uses well known QEMU types and methods. Signed-off-by: Hervé Poussineau Reviewed-by: Aurelien Jarno Signed-off-

[Qemu-devel] [PULL 28/29] target-mips: remove misleading comments in translate_init.c

2015-06-12 Thread Leon Alrae
PABITS are not hardcoded to 36 bits and we do not model 59 PABITS (which is the architectural limit) in QEMU. Signed-off-by: Leon Alrae Reviewed-by: Aurelien Jarno --- target-mips/translate_init.c | 9 - 1 file changed, 9 deletions(-) diff --git a/target-mips/translate_init.c b/target-

[Qemu-devel] [PULL 20/29] net/dp8393x: add load/save support

2015-06-12 Thread Leon Alrae
From: Hervé Poussineau Signed-off-by: Hervé Poussineau Reviewed-by: Aurelien Jarno Signed-off-by: Leon Alrae --- hw/net/dp8393x.c | 12 1 file changed, 12 insertions(+) diff --git a/hw/net/dp8393x.c b/hw/net/dp8393x.c index ef1fb0e..4184045 100644 --- a/hw/net/dp8393x.c +++ b/hw

[Qemu-devel] [PULL 27/29] target-mips: add MTHC0 and MFHC0 instructions

2015-06-12 Thread Leon Alrae
Implement MTHC0 and MFHC0 instructions. In MIPS32 they are used to access upper word of extended to 64-bits CP0 registers. In MIPS64, when CP0 destination register specified is the EntryLo0 or EntryLo1, bits 1:0 of the GPR appear at bits 31:30 of EntryLo0 or EntryLo1. This is to compensate for RI

[Qemu-devel] [PULL 26/29] target-mips: add CP0.PageGrain.ELPA support

2015-06-12 Thread Leon Alrae
CP0.PageGrain.ELPA enables support for large physical addresses. This field is encoded as follows: 0: Large physical address support is disabled. 1: Large physical address support is enabled. If this bit is a 1, the following changes occur to coprocessor 0 registers: - The PFNX field of the EntryL

[Qemu-devel] [PULL 19/29] net/dp8393x: add PROM to store MAC address

2015-06-12 Thread Leon Alrae
From: Hervé Poussineau Signed-off-by: Laurent Vivier Signed-off-by: Hervé Poussineau Reviewed-by: Aurelien Jarno Signed-off-by: Leon Alrae --- hw/mips/mips_jazz.c | 1 + hw/net/dp8393x.c| 18 ++ 2 files changed, 19 insertions(+) diff --git a/hw/mips/mips_jazz.c b/hw/mip

[Qemu-devel] [Bug 1463812] Re: qemu-system-ppc64 V2.30 cause RHEL5.9 disk corruption

2015-06-12 Thread wzis
I built 2.3.0 on CentOS 6.6 machine, and run the RHEL5.9 using the new qemu-system-64 ,and gets the same issue as 2.3.0 on RHEL5.3: Checking filesystems Checking all file systems. [/sbin/fsck.ext3 (1) -- /] fsck.ext3 -a /dev/sda5 /: Resize inode not valid. /: UNEXPECTED INCONSISTENCY; RUN fsck MA

Re: [Qemu-devel] [PATCH v2 RFC 0/8] block: persistent dirty bitmaps

2015-06-12 Thread Denis V. Lunev
On 11/06/15 23:06, Stefan Hajnoczi wrote: The load/store API is not scalable when bitmaps are 1 MB or larger. For example, a 500 GB disk image with 64 KB granularity requires a 1 MB bitmap. If a guest has several disk images of this size, then multiple megabytes must be read to start the guest

Re: [Qemu-devel] [PULL 20/22] hw/arm/boot: arm_load_kernel implemented as a machine init done notifier

2015-06-12 Thread Peter Maydell
On 12 June 2015 at 09:53, Eric Auger wrote: > On 06/12/2015 10:25 AM, Eric Auger wrote: >>> I think it is because this is now delaying >>> arm_load_kernel_notify call until after rom_load_all. From vl.c: >>> >>> if (rom_load_all() != 0) { >>> fprintf(stderr, "rom loading failed\n"); >

[Qemu-devel] [RFC 0/9] block: incremental backup transactions using BlockJobTxn

2015-06-12 Thread Stefan Hajnoczi
I stumbled on an idea for a simpler block job transactions implementation. This series uses patches from John Snow's "[PATCH v6 00/10] block: incremental backup transactions" series. I wasn't sure if the idea would work, hence this RFC instead of asking John to spend his time chasing the idea. Th

[Qemu-devel] [RFC 2/9] iotests: add transactional incremental backup test

2015-06-12 Thread Stefan Hajnoczi
From: John Snow Test simple usage cases for using transactions to create and synchronize incremental backups. Signed-off-by: John Snow Reviewed-by: Max Reitz Reviewed-by: Stefan Hajnoczi Signed-off-by: Stefan Hajnoczi --- tests/qemu-iotests/124 | 54 +

[Qemu-devel] [RFC 3/9] block: rename BlkTransactionState and BdrvActionOps

2015-06-12 Thread Stefan Hajnoczi
From: John Snow These structures are misnomers, somewhat. (1) BlockTransactionState is not state for a transaction, but is rather state for a single transaction action. Rename it "BlkActionState" to be more accurate. (2) The BdrvActionOps describes operations for the BlkActionState,

[Qemu-devel] [RFC 6/9] blockdev: make BlockJobTxn available to qmp 'transaction'

2015-06-12 Thread Stefan Hajnoczi
Provide a BlockJobTxn to actions executed in a qmp 'transaction' command. This allows actions to make their block jobs either complete as a group or fail/cancel together. The next patch adds the first user. Signed-off-by: Stefan Hajnoczi --- blockdev.c | 9 + 1 file changed, 9 insertio

[Qemu-devel] [RFC 8/9] iotests: 124 - transactional failure test

2015-06-12 Thread Stefan Hajnoczi
From: John Snow Use a transaction to request an incremental backup across two drives. Coerce one of the jobs to fail, and then re-run the transaction. Verify that no bitmap data was lost due to the partial transaction failure. Signed-off-by: John Snow Reviewed-by: Max Reitz Signed-off-by: Ste

[Qemu-devel] [RFC 1/9] qapi: Add transaction support to block-dirty-bitmap operations

2015-06-12 Thread Stefan Hajnoczi
From: John Snow This adds two qmp commands to transactions. block-dirty-bitmap-add allows you to create a bitmap simultaneously alongside a new full backup to accomplish a clean synchronization point. block-dirty-bitmap-clear allows you to reset a bitmap back to as-if it were new, which can als

[Qemu-devel] [RFC 9/9] qmp-commands.hx: Update the supported 'transaction' operations

2015-06-12 Thread Stefan Hajnoczi
From: Kashyap Chamarthy Although the canonical source of reference for QMP commands is qapi-schema.json, for consistency's sake, update qmp-commands.hx to state the list of supported transactionable operations, namely: drive-backup blockdev-backup blockdev-snapshot-internal-sync

[Qemu-devel] [RFC 4/9] block: keep bitmap if incremental backup job is cancelled

2015-06-12 Thread Stefan Hajnoczi
Reclaim the dirty bitmap if an incremental backup block job is cancelled. The ret variable may be 0 when the job is cancelled so it's not enough to check ret < 0. Signed-off-by: Stefan Hajnoczi --- block/backup.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/block/backup.c

[Qemu-devel] [RFC 7/9] block/backup: support block job transactions

2015-06-12 Thread Stefan Hajnoczi
Join the transaction when the backup block job is in incremental backup mode. This ensures that the sync bitmap is not thrown away if another block job in the transaction is cancelled or fails. This is critical so incremental backup with multiple disks can be retried in case of cancellation/failu

[Qemu-devel] [RFC 5/9] block: add block job transactions

2015-06-12 Thread Stefan Hajnoczi
Sometimes block jobs must execute as a transaction group. Finishing jobs wait until all other jobs are ready to complete successfully. Failure or cancellation of one job cancels the other jobs in the group. Signed-off-by: Stefan Hajnoczi --- blockjob.c| 160 +

Re: [Qemu-devel] [PATCH 1/8] spec: add qcow2-dirty-bitmaps specification

2015-06-12 Thread Stefan Hajnoczi
On Thu, Jun 11, 2015 at 12:21:31PM -0400, John Snow wrote: > -BEGIN PGP SIGNED MESSAGE- > Hash: SHA256 > > > > On 06/11/2015 09:03 AM, Stefan Hajnoczi wrote: > > On Thu, Jun 11, 2015 at 01:19:24PM +0300, Vladimir > > Sementsov-Ogievskiy wrote: > >> On 10.06.2015 16:24, Stefan Hajnoczi wr

Re: [Qemu-devel] [PATCH v2 RFC 0/8] block: persistent dirty bitmaps

2015-06-12 Thread Stefan Hajnoczi
On Fri, Jun 12, 2015 at 12:58:35PM +0300, Denis V. Lunev wrote: > On 11/06/15 23:06, Stefan Hajnoczi wrote: > >The load/store API is not scalable when bitmaps are 1 MB or larger. > > > >For example, a 500 GB disk image with 64 KB granularity requires a 1 MB > >bitmap. If a guest has several disk i

[Qemu-devel] [PULL 01/11] linux-user: Default sh4 to sh7785

2015-06-12 Thread Aurelien Jarno
From: Richard Henderson Signed-off-by: Richard Henderson Signed-off-by: Aurelien Jarno --- linux-user/main.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/linux-user/main.c b/linux-user/main.c index 6989b82..a0d3e58 100644 --- a/linux-user/main.c +++ b/linux-user/main.c @@ -3925,6 +392

[Qemu-devel] [PULL 07/11] target-sh4: optimize subc using sub2

2015-06-12 Thread Aurelien Jarno
Reviewed-by: Richard Henderson Signed-off-by: Aurelien Jarno --- target-sh4/translate.c | 18 +++--- 1 file changed, 7 insertions(+), 11 deletions(-) diff --git a/target-sh4/translate.c b/target-sh4/translate.c index 5c90fe3..b8abfd5 100644 --- a/target-sh4/translate.c +++ b/target-

[Qemu-devel] [PULL 00/11] sh4-next queue

2015-06-12 Thread Aurelien Jarno
The following changes since commit b0411142f482df92717f8b4a3b746081a62b724f: Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20150609' into staging (2015-06-09 15:29:34 +0100) are available in the git repository at: git://git.aurel32.net/qemu tags/pull-sh4-next-20150612

[Qemu-devel] [PULL 08/11] target-sh4: optimize negc using add2 and sub2

2015-06-12 Thread Aurelien Jarno
Reviewed-by: Richard Henderson Signed-off-by: Aurelien Jarno --- target-sh4/translate.c | 12 ++-- 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/target-sh4/translate.c b/target-sh4/translate.c index b8abfd5..9ab3ba0 100644 --- a/target-sh4/translate.c +++ b/target-sh4/tra

[Qemu-devel] [PULL 03/11] sh4/r2d: convert to new MMIO accessor style

2015-06-12 Thread Aurelien Jarno
The documentation is clear to use 16-bit accesses for all registers. Signed-off-by: Aurelien Jarno --- hw/sh4/r2d.c | 12 ++-- 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/hw/sh4/r2d.c b/hw/sh4/r2d.c index 4221060..5e22ed7 100644 --- a/hw/sh4/r2d.c +++ b/hw/sh4/r2d.c @@

[Qemu-devel] [PULL 02/11] linux-user: Add HWCAP for SH4

2015-06-12 Thread Aurelien Jarno
From: Richard Henderson Only exposing FPU and LLSC as the only features supported by the translator. Signed-off-by: Richard Henderson Signed-off-by: Aurelien Jarno --- linux-user/elfload.c | 29 + 1 file changed, 29 insertions(+) diff --git a/linux-user/elfload.c

[Qemu-devel] [PULL 11/11] target-sh4: remove dead code

2015-06-12 Thread Aurelien Jarno
Reviewed-by: Richard Henderson Signed-off-by: Aurelien Jarno --- target-sh4/translate.c | 1 - 1 file changed, 1 deletion(-) diff --git a/target-sh4/translate.c b/target-sh4/translate.c index e8b9217..28259f9 100644 --- a/target-sh4/translate.c +++ b/target-sh4/translate.c @@ -18,7 +18,6 @@ *

[Qemu-devel] [PULL 06/11] target-sh4: optimize addc using add2

2015-06-12 Thread Aurelien Jarno
Reviewed-by: Richard Henderson Signed-off-by: Aurelien Jarno --- target-sh4/translate.c | 11 --- 1 file changed, 4 insertions(+), 7 deletions(-) diff --git a/target-sh4/translate.c b/target-sh4/translate.c index bcdf4f3..5c90fe3 100644 --- a/target-sh4/translate.c +++ b/target-sh4/tran

[Qemu-devel] [PULL 10/11] target-sh4: factorize fmov implementation

2015-06-12 Thread Aurelien Jarno
Reviewed-by: Richard Henderson Signed-off-by: Aurelien Jarno --- target-sh4/translate.c | 13 - 1 file changed, 4 insertions(+), 9 deletions(-) diff --git a/target-sh4/translate.c b/target-sh4/translate.c index 44d0e94..e8b9217 100644 --- a/target-sh4/translate.c +++ b/target-sh4/tr

[Qemu-devel] [PULL 04/11] target-sh4: use bit number for SR constants

2015-06-12 Thread Aurelien Jarno
Use the bit number for SR constants instead of using a bit mask. This make possible to also use the constants for shifts. Reviewed-by: Richard Henderson Signed-off-by: Aurelien Jarno --- target-sh4/cpu.c | 3 +- target-sh4/cpu.h | 30 ++-- target-sh4/gdbstub.c |

[Qemu-devel] [PULL 09/11] target-sh4: split out Q and M from of SR and optimize div1

2015-06-12 Thread Aurelien Jarno
Splitting Q and M out of SR, it's possible to optimize div1 by using TCG code instead of an helper. At the same time removed the now unused gen_copy_bit_i32 function. Reviewed-by: Richard Henderson Signed-off-by: Aurelien Jarno --- target-sh4/cpu.h | 12 +++-- target-sh4/helper.h|

[Qemu-devel] USB pass through via usb-host

2015-06-12 Thread Alexey Kardashevskiy
Hi! I am trying usb-host with the root hub like this: -device nec-usb-xhci,id=id3 \ -device usb-host,id=id4,hostbus=1,hostaddr=1 In the guest I see emulated XHCI and 2 root hubs (and I see exactly the same picture if I do not pass anytning via usb-host): [root@localhost ~]# lsusb Bus 001 Dev

[Qemu-devel] [PULL 05/11] target-sh4: Split out T from SR

2015-06-12 Thread Aurelien Jarno
In preparation for more efficient setting of this field. Reviewed-by: Richard Henderson Signed-off-by: Aurelien Jarno --- target-sh4/cpu.h | 14 +++- target-sh4/gdbstub.c | 4 +- target-sh4/helper.c| 2 +- target-sh4/op_helper.c | 32 ++-- target-sh4/translate.c | 213

[Qemu-devel] [Bug 1464611] [NEW] 4 * redundant conditions

2015-06-12 Thread dcb
Public bug reported: 1. [qemu/hw/block/nvme.c:355]: (style) Redundant condition: sqid. 'A && (!A || B)' is equivalent to 'A || B' if (!sqid || (sqid && !nvme_check_sqid(n, sqid))) { 2. [qemu/hw/block/nvme.c:429]: (style) Redundant condition: cqid. 'A && (!A || B)' is equivalent to 'A || B'

Re: [Qemu-devel] USB pass through via usb-host

2015-06-12 Thread Gerd Hoffmann
> The questions are: > 1. can we really pass a root hub to a guest? No. You can't pass-through hubs (no matter whenever root or other). > What is expected to happen > there? Nothing. Hubs are ignored by usb-host. > 2. can we tell if the root hubs in the guest are emulated or from usb-host?

Re: [Qemu-devel] [Bug 1464611] [NEW] 4 * redundant conditions

2015-06-12 Thread Peter Maydell
On 12 June 2015 at 11:38, dcb <1464...@bugs.launchpad.net> wrote: > Public bug reported: > > > 1. > > [qemu/hw/block/nvme.c:355]: (style) Redundant condition: sqid. 'A && (!A > || B)' is equivalent to 'A || B' > > if (!sqid || (sqid && !nvme_check_sqid(n, sqid))) { > > 2. > > [qemu/hw/block/nvme.

[Qemu-devel] [RFC] QOM design - add instance data to Object

2015-06-12 Thread Liviu Ionescu
while implementing the cortex-m hierarchical objects I faced several problems that required some hack, and I wanted to know your comments on them. for convenience I'll explain the problem in C++ and then return to the issues of the C implementation. (the C++ syntax may not be very strict). one

Re: [Qemu-devel] [PULL v2 00/21] migration pull request

2015-06-12 Thread Peter Maydell
9c8669f1ec18158db29fd5a: > > Merge remote-tracking branch 'remotes/mst/tags/for_upstream' into staging > (2015-06-11 15:33:38 +0100) > > are available in the git repository at: > > git://github.com/juanquintela/qemu.git tags/migration/20150612 > > for you to fe

Re: [Qemu-devel] [PATCH v3 2/2] vhost user: Add RARP injection for legacy guest

2015-06-12 Thread Thibaut Collet
If I correctly understand how vhost user / virtio works the solution proposed by Michael is OK: - Rings to exchange data between host and guest are allocated by the guest. - As soon as the guest add rings in a queue (for RX or TX) a kick is done on the eventfd associated to the queue - On a live

Re: [Qemu-devel] [PATCH 1/1] balloon: add a feature bit to let Guest OS deflate balloon on oom

2015-06-12 Thread Christian Borntraeger
Am 10.06.2015 um 15:13 schrieb Michael S. Tsirkin: > On Wed, Jun 10, 2015 at 03:02:21PM +0300, Denis V. Lunev wrote: >> On 09/06/15 13:37, Christian Borntraeger wrote: >>> Am 09.06.2015 um 12:19 schrieb Denis V. Lunev: Excessive virtio_balloon inflation can cause invocation of OOM-killer,

Re: [Qemu-devel] [PATCH V2] pci: fixes to allow booting from extra root pci buses.

2015-06-12 Thread Marcel Apfelbaum
On 06/12/2015 09:00 AM, Gerd Hoffmann wrote: Hi, On each boot, coreboot might decide to assign a different bus id to the extra roots (for example, if a device with a PCI bridge is inserted and it's bus allocation causes bus ids to shift). Technically, coreboot could even change the order ext

[Qemu-devel] [PATCH] hw/arm/boot: fix rom_reset notifier registration order

2015-06-12 Thread Eric Auger
commit ac9d32e39664e060cd1b538ff190980d57ad69e4 had the consequence to register the do_cpu_reset after the rom_reset one. Hence they get executed in the wrong order. This commit restores the registration of do_cpu_reset in arm_load_kernel. Signed-off-by: Eric Auger --- hw/arm/boot.c | 20 +++

Re: [Qemu-devel] [PATCH] hw/arm/boot: fix rom_reset notifier registration order

2015-06-12 Thread Eric Auger
Hi Peter, Please can you test whether this patch fixes the issue on xlnx-ep108 board. I acknowledge I do not feel comfortable with that piece of code and meanwhile I continue looking at boot.c & loader.c files. Thank you in advance Best Regards Eric On 06/12/2015 02:19 PM, Eric Auger wrote: >

Re: [Qemu-devel] [PATCH v4 0/4] rocker device updates

2015-06-12 Thread Stefan Hajnoczi
On Wed, Jun 10, 2015 at 06:21:17PM -0700, sfel...@gmail.com wrote: > From: Scott Feldman > > v4: > > Address review comments from Stefan Hajnoczi: > > - hmp.c: change flow->hits printing to PRIu64 since it's uint64_t > > Address review comments from Eric Blake: > > - qapi/rocker.txt: fix co

[Qemu-devel] [PATCH 02/12] audio: remove plive

2015-06-12 Thread Kővágó, Zoltán
It was useless even 3 years ago, so it can probably safely go away: https://lists.nongnu.org/archive/html/qemu-devel/2012-03/msg02427.html Signed-off-by: Kővágó, Zoltán --- audio/audio.c | 12 audio/audio_template.h | 41 - 2 files ch

[Qemu-devel] [PATCH 00/12] -audiodev option

2015-06-12 Thread Kővágó, Zoltán
Note: this patch depends on my not-yet-merged audio cleanup patches: https://lists.nongnu.org/archive/html/qemu-devel/2015-06/msg02558.html This series of patches adds a new -audiodev command line option to specify audio subsytem parameters instead of environment variables. This will later allow u

[Qemu-devel] [PATCH 01/12] audio: remove LOG_TO_MONITOR along with default_mon

2015-06-12 Thread Kővágó, Zoltán
Setting QEMU_AUDIO_LOG_TO_MONITOR=1 can crash qemu (if qemu tries to log to the monitor before it's being initialized), and also nothing else in qemu logs to the monitor. This log to monitor feature was the last thing that used the default_mon variable, so I removed it too (as using it can cause p

[Qemu-devel] [PATCH 10/12] qapi: AllocVisitor

2015-06-12 Thread Kővágó, Zoltán
Simple visitor that recursively allocates structures with only optional variables. Unions are initialized to the first type specified. Other non optional types are not supported. Signed-off-by: Kővágó, Zoltán --- include/qapi/alloc-visitor.h | 18 + qapi/Makefile.objs | 1

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