Keep track of start and end address of each NUMA node in numa_info
structure so that lookup of node by address becomes easier. Add
an API numa_get_node() to lookup a node by address.
This is needed by sPAPR PowerPC to support
ibm,dynamic-reconfiguration-memory device tree node which is needed for
The changelog is:
> version: update to 20150429
> pci: Use QEMU created PCI device nodes
> usb: support 64-bit pci bars
> pci: Support 64-bit address translation
> pci: program correct bridge limit registers during probe
> scsi: handle report-luns failure
> Fix "key?" Forth word when
The patch series creates PCI device tree(DT) nodes in QEMU. The new
hotplug code needs the device node creation in QEMU. While during
boot, nodes were created in SLOF. It makes more sense to consolidate
the code to one place for better maintainability.
Based on David's spapr-next
https://github.c
The properties reg/assigned-resources need to encode 64-bit memory
address space as part of phys.hi dword.
00 if configuration space
01 if IO region,
10 if 32-bit MEM region
11 if 64-bit MEM region
Signed-off-by: Nikunj A Dadhania
Reviewed-by: Thomas Huth
---
hw/ppc/spapr_pci.c | 10 ++
Current code missed the Prog IF register. All Class Code, Subclass,
and Prog IF registers are needed to identify the accurate device type.
For example: USB controllers use the PROG IF for denoting: USB
FullSpeed, HighSpeed or SuperSpeed.
Signed-off-by: Nikunj A Dadhania
Reviewed-by: Thomas Huth
All the PCI enumeration and device node creation was off-loaded to
SLOF. With PCI hotplug support, code needed to be added to add device
node. This creates multiple copy of the code one in SLOF and other in
hotplug code. To unify this, the patch adds the pci device node
creation in Qemu. For backwa
Each hardware instance has a platform unique location code. The OF
device tree that describes a part of a hardware entity must include
the “ibm,loc-code” property with a value that represents the location
code for that hardware entity.
Populate ibm,loc-code.
1) PCI passthru devices need to ident
... and the status register should say so.
Fixes "usbus0: controller did not stop" error printed by freebsd.
Signed-off-by: Gerd Hoffmann
---
hw/usb/hcd-uhci.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/usb/hcd-uhci.c b/hw/usb/hcd-uhci.c
index 64a7d87..3f0ed62 100644
On Wed, 6 May 2015 14:06:16 -0300
Eduardo Habkost wrote:
> On Wed, May 06, 2015 at 06:23:05PM +0200, Michael Mueller wrote:
> > On Wed, 6 May 2015 08:23:32 -0300
> > Eduardo Habkost wrote:
> [...]
> > > > > >cpudef_init();
> > > > > >
> > > > > >if (cpu_model && cpu_desc_avail() && is_h
On Thursday, May 7, 2015, Pavel Fedin wrote:
> Hello!
>
> Why do we need 'virt2' ? I am currently working on testing your
> implementation, and i try to use different approach. I see this as
> '-machine
> virt,gicv=N' option, where N is 2 or 3. Isn't it better than duplicating
> the
> whole vir
On Wed, 6 May 2015 09:42:26 -0300
Eduardo Habkost wrote:
> On Mon, Apr 27, 2015 at 04:53:19PM +0200, Michael Mueller wrote:
> [...]
> > diff --git a/qapi-schema.json b/qapi-schema.json
> > index 215a7bc..285b2d3 100644
> > --- a/qapi-schema.json
> > +++ b/qapi-schema.json
> > @@ -2536,21 +2536,43
Eric Blake writes:
> Now that the two functions are identical, we only need one of them,
> and we might as well give it a more descriptive name. Basically,
> the function serves as the translation from a QAPI name into a
> (portion of a) C identifier, without regards to whether it is a
> variabl
Eric Blake writes:
> Continuing the string of cleanups for supporting downstream names
> containing '.', this patch focuses on ensuring c_type() can
> handle a downstream name. This patch alone does not fix the
> places where generator output should be calling this function
> but was open-coding
Eric Blake writes:
> Enhance the testsuite to cover a downstream enum type and enum
> string. Update the generator to mangle the enum name in the
> appropriate places. The code for generating list visitors must
> be careful how it mangles names for enum lists differently than
> code for builtin
Eric Blake writes:
> Enhance the testsuite to cover downstream structs, including struct
> members and base structs. Update the generator to mangle the
> struct names in the appropriate places.
>
> Signed-off-by: Eric Blake
Reviewed-by: Markus Armbruster
Eric Blake writes:
> Enhance the testsuite to cover downstream simple unions, including
> when a union branch is a downstream name. Update the generator to
> mangle the union names in the appropriate places.
>
> Signed-off-by: Eric Blake
Reviewed-by: Markus Armbruster
Eric Blake writes:
> Enhance the testsuite to cover downstream alternates, including
> whether the branch name or type is downstream. Update the
> generator to mangle alternate names in the appropriate places.
>
> Signed-off-by: Eric Blake
Reviewed-by: Markus Armbruster
Eric Blake writes:
> Enhance the testsuite to cover downstream flat unions, including
> the base type, discriminator name and type, and branch name and
> type. Update the generator to mangle the union names in the
> appropriate places.
>
> Signed-off-by: Eric Blake
Reviewed-by: Markus Armbrust
From: Xiao Guang Chen
There is no 'ide-cd' device defined on s390 platform, so
test_medium_not_found() test should be skipped.
Reviewed-by: Max Reitz
Reviewed-by: Michael Mueller
Signed-off-by: Xiao Guang Chen
---
tests/qemu-iotests/041 | 6 ++
1 file changed, 6 insertions(+)
diff --git
The default device id of hard disk on the s390 platform is "virtio0"
which differs to the "ide0-hd0" for the x86 platform. Setting id in
the drive definition, ie:"qemu -drive id=testdisk", will be the same
on all platforms.
Signed-off-by: Bo Tu
---
tests/qemu-iotests/130 | 8
tests/
From: Xiao Guang Chen
This patch adds qemu machine type support to the io test suite.
Based on the qemu default machine type and alias of the default machine type
the reference output file can now vary from the default to a machine specific
output file if necessary. When using a machine specific
when creating an image qemu-img enable us specifying the size of the
image using -o size=xx options. But when we specify an invalid size
such as a negtive size then different platform gives different result.
parse_option_size() function in util/qemu-option.c will be called to
parse the size, a cas
From: Xiao Guang Chen
This patch fixes an io test suite issue that was introduced with the
commit c88930a6866e74953e931ae749781e98e486e5c8 'qemu-char: Permit only
a single "stdio" character device'. The option supresses the creation of
default devices such as the floopy and cdrom. Output files fo
From: Xiao Guang Chen
There is no 'ide-cd' device defined on s390 platform, so
test_medium_not_found() test should be skipped.
Reviewed-by: Max Reitz
Reviewed-by: Michael Mueller
Signed-off-by: Xiao Guang Chen
---
tests/qemu-iotests/055 | 9 +
1 file changed, 9 insertions(+)
diff --
On Wed, 6 May 2015 08:41:50 -0300
Eduardo Habkost wrote:
> On Wed, May 06, 2015 at 11:59:38AM +0200, Michael Mueller wrote:
> > On Tue, 5 May 2015 10:26:02 -0300
> > Eduardo Habkost wrote:
> >
> > > On Mon, Apr 27, 2015 at 04:53:16PM +0200, Michael Mueller wrote:
> > > > The patch defines ids p
The tests for device type "ide_cd" should only be tested for the pc
platform.
The default device id of hard disk on the s390 platform differs to that
of the x86 platform. A new variable device_id is defined and "virtio0"
set for the s390 platform. A x86 platform specific output file is also
needed.
v8.
1.Modify error message in qemu-option.c when image size is invalid
2.Remove Reviewed-by statements if any functional changes in a new patch version
for test 049,051,130
3.Change patch subject for test 130
4.Add id definition for a drive which will work for all platforms in test 130
5.Disable vi
Eric Blake writes:
> Enhance the testsuite to cover downstream events and commands.
> Events worked without more tweaks, but commands needed a few final
> updates in the generator to mangle names in the appropriate places.
> In making those tweaks, it was easier to drop type_visitor() and
> inlin
* Li, Liang Z (liang.z...@intel.com) wrote:
> > > > > Thanks Dave, I will retry according to your suggestion.
> > > >
> > > > Did that work for you?
> > > >
> > >
> > > Yes, it works.
> >
> > Great.
> >
> > > Bye the way, I found that the source guest will resume after about 15
> > > minuets if t
Hello!
➢ Thank you for your comment, I might do it after solving the stability issues.
What kind of stability issues do you have ?
You know, i was testing 64-bit qemu in TCG mode, and i have also seen weird
behavior. The kernel just stops and waits until you hit any key on the console,
then
On Thu, 7 May 2015 13:57:01 +1000
David Gibson wrote:
> The code for -machine pseries maintains a global sPAPREnvironment structure
> which keeps track of general state information about the guest platform.
> This predates the existence of the MachineState structure, but performs
> basically the
On Wed 06 May 2015 06:42:30 PM CEST, Stefan Hajnoczi wrote:
>> By using a hash of the offset as the starting point, lookups are
>> faster and independent from the array size.
>>
>> The hash is computed using the cluster number of the table, multiplied
>> by 4 to make it perform better when there
On Thursday, May 7, 2015, Pavel Fedin wrote:
> Hello!
>
> ➢ Thank you for your comment, I might do it after solving the stability
> issues.
>
> What kind of stability issues do you have ?
> You know, i was testing 64-bit qemu in TCG mode, and i have also seen
> weird behavior. The kernel just
From: Shannon Zhao
This patch series generate seven ACPI tables for machine virt on ARM.
The set of generated tables are:
- RSDP
- RSDT
- MADT
- GTDT
- FADT
- DSDT
- MCFG (For PCIe host bridge)
These tables are created dynamically using the function of aml-build.c,
taking into account the needed
From: Shannon Zhao
MADT describes GIC enabled ARM platforms. The GICC and GICD
subtables are used to define the GIC regions.
Signed-off-by: Shannon Zhao
Signed-off-by: Shannon Zhao
Reviewed-by: Alex Bennée
---
hw/arm/virt-acpi-build.c | 57
in
From: Shannon Zhao
ACPI v5.1 defines GTDT for ARM devices as a place to describe timer
related information in the system. The Arch Timer interrupts must
be provided for GTDT.
Signed-off-by: Shannon Zhao
Signed-off-by: Shannon Zhao
---
hw/arm/virt-acpi-build.c| 30 +
From: Shannon Zhao
Signed-off-by: Shannon Zhao
Signed-off-by: Shannon Zhao
---
hw/acpi/aml-build.c | 10 ++
include/hw/acpi/aml-build.h | 1 +
2 files changed, 11 insertions(+)
diff --git a/hw/acpi/aml-build.c b/hw/acpi/aml-build.c
index d9c9876..bda99bf 100644
--- a/hw/acpi/
From: Shannon Zhao
Add aml_memory32_fixed() for describing device mmio region in resource template.
These can be used to generating DSDT table for ACPI on ARM.
Signed-off-by: Shannon Zhao
Signed-off-by: Shannon Zhao
---
hw/acpi/aml-build.c | 27 +++
include/hw/
From: Shannon Zhao
Move generic acpi building helpers into dedictated file and this
can be shared with other machines.
Signed-off-by: Shannon Zhao
Signed-off-by: Shannon Zhao
---
hw/acpi/aml-build.c | 58 ++
hw/i386/acpi-build.c| 77
From: Shannon Zhao
RSDT points to other tables FADT, MADT, GTDT. This code is shared with x86.
Here we still use RSDT as UEFI puts ACPI tables below 4G address space,
and UEFI ignore the RSDT or XSDT.
Signed-off-by: Shannon Zhao
Signed-off-by: Shannon Zhao
---
hw/acpi/aml-build.c | 2
From: Shannon Zhao
Introduce a preliminary framework in virt-acpi-build.c with the main
ACPI build functions. It exposes the generated ACPI contents to
guest over fw_cfg.
The required ACPI v5.1 tables for ARM are:
- RSDP: Initial table that points to XSDT
- RSDT: Points to FADT GTDT MADT tables
From: Shannon Zhao
In the case of mach virt, it is used to set the Hardware Reduced bit
and enable PSCI SMP booting through HVC. So ignore FACS and FADT
points to DSDT.
Update the header definitions for FADT taking into account the new
additions of ACPI v5.1 in `include/hw/acpi/acpi-defs.h`
Sig
From: Shannon Zhao
Signed-off-by: Shannon Zhao
Signed-off-by: Shannon Zhao
Reviewed-by: Alex Bennée
---
hw/acpi/aml-build.c | 11 +++
include/hw/acpi/aml-build.h | 1 +
2 files changed, 12 insertions(+)
diff --git a/hw/acpi/aml-build.c b/hw/acpi/aml-build.c
index f5d74a4..2e
From: Shannon Zhao
Signed-off-by: Shannon Zhao
Signed-off-by: Shannon Zhao
Reviewed-by: Alex Bennée
---
hw/acpi/aml-build.c | 18 ++
include/hw/acpi/aml-build.h | 5 +
2 files changed, 23 insertions(+)
diff --git a/hw/acpi/aml-build.c b/hw/acpi/aml-build.c
index
From: Shannon Zhao
The ACPI related header file acpi-defs.h, includes definitions that
apply on other architectures as well. Move it in `include/hw/acpi/`
to sanely include it from other architectures.
Signed-off-by: Alvise Rigo
Signed-off-by: Shannon Zhao
Signed-off-by: Shannon Zhao
---
hw/
From: Shannon Zhao
Add aml_interrupt() for describing device interrupt in resource template.
These can be used to generating DSDT table for ACPI on ARM.
Signed-off-by: Shannon Zhao
Signed-off-by: Shannon Zhao
---
hw/acpi/aml-build.c | 28 +
include/hw/acpi/aml-
From: Shannon Zhao
Signed-off-by: Shannon Zhao
Signed-off-by: Shannon Zhao
Reviewed-by: Alex Bennée
---
hw/acpi/aml-build.c | 7 +++
include/hw/acpi/aml-build.h | 1 +
2 files changed, 8 insertions(+)
diff --git a/hw/acpi/aml-build.c b/hw/acpi/aml-build.c
index b03740d..f5d74a4 1
From: Shannon Zhao
According to ACPI spec, DefBuffer can take two parameters: BufferSize
and ByteList. Make it consistent with the spec. If we want to request
uninitialized buffer, pass ByteList as NULL to aml_buffer() to
reserve spaces.
Signed-off-by: Shannon Zhao
Signed-off-by: Shannon Zhao
From: Shannon Zhao
Add ToUUID macro, this is useful for generating PCIe ACPI table.
Signed-off-by: Shannon Zhao
Signed-off-by: Shannon Zhao
---
hw/acpi/aml-build.c | 46 +
include/hw/acpi/aml-build.h | 1 +
2 files changed, 47 insertions(+)
From: Shannon Zhao
DSDT consists of the usual common table header plus a definition
block in AML encoding which describes all devices in the platform.
After initializing DSDT with header information the namespace is
created which is followed by the device encodings. The devices are
described usi
From: Shannon Zhao
Expose the needed device information to the table generation
insfrastructure and register a machine_init_done notify to
call virt_acpi_build().
Add CONFIG_ACPI to arm-softmmu.mak.
Signed-off-by: Shannon Zhao
Signed-off-by: Shannon Zhao
---
default-configs/arm-softmmu.mak
From: Shannon Zhao
Signed-off-by: Shannon Zhao
Signed-off-by: Shannon Zhao
---
hw/acpi/aml-build.c | 18 ++
include/hw/acpi/aml-build.h | 1 +
2 files changed, 19 insertions(+)
diff --git a/hw/acpi/aml-build.c b/hw/acpi/aml-build.c
index 67b7719..06f9d37 100644
--- a/
From: Shannon Zhao
RSDP points to RSDT which in turn points to other tables.
Signed-off-by: Shannon Zhao
Signed-off-by: Shannon Zhao
Reviewed-by: Alex Bennée
---
hw/arm/virt-acpi-build.c | 35 ++-
1 file changed, 34 insertions(+), 1 deletion(-)
diff --git a/h
From: Shannon Zhao
Signed-off-by: Shannon Zhao
Signed-off-by: Shannon Zhao
Reviewed-by: Alex Bennée
---
hw/acpi/aml-build.c | 8
include/hw/acpi/aml-build.h | 1 +
2 files changed, 9 insertions(+)
diff --git a/hw/acpi/aml-build.c b/hw/acpi/aml-build.c
index bda99bf..b03740d
From: Shannon Zhao
Add PCIe info struct, prepare for building PCIe table.
And generate MCFG table.
Signed-off-by: Shannon Zhao
Signed-off-by: Shannon Zhao
---
hw/arm/virt-acpi-build.c | 21 +
include/hw/arm/virt-acpi-build.h | 9 +
2 files changed, 30 inse
From: Shannon Zhao
Add PCIe controller in ACPI DSDT table, so the guest can detect
the PCIe.
Signed-off-by: Shannon Zhao
Signed-off-by: Shannon Zhao
---
hw/arm/virt-acpi-build.c | 152 +++
1 file changed, 152 insertions(+)
diff --git a/hw/arm/virt-
On Wed, Mar 18, 2015 at 11:50:04AM +0530, Bharata B Rao wrote:
> On Tue, Mar 17, 2015 at 11:56:04AM +0100, Andreas Färber wrote:
> > Am 17.03.2015 um 09:39 schrieb Bharata B Rao:
> > > On Tue, Mar 17, 2015 at 07:56:41AM +0100, Alexander Graf wrote:
> > >>
> > >>
> > >> On 13.03.15 12:56, Bharata B
On 07/05/2015 07:51, Liviu Ionescu wrote:
>
>> On 06 May 2015, at 17:57, Leon Alrae wrote:
>>
>> +static int add_semihosting_arg(const char *name, const char *val, void
>> *opaque)
>> +{
>> +SemihostingConfig *s = opaque;
>> +if (strcmp(name, "arg") == 0) {
>> +s->argc++;
>> +
07.05.2015 09:47, Michael Tokarev wrote:
> 07.05.2015 09:12, Michael Tokarev wrote:
>> 07.05.2015 04:11, G 3 wrote:
>>> Did you boot Windows XP to the desktop? I have tested Windows 95, Windows
>>> 2000, and Windows XP. All of them fail to boot to the desktop.
>>
>> Yes, booted to desktop and did
On Thu, May 07, 2015 at 12:04:56PM +0800, Zhe Qiu wrote:
> From: phoeagon
>
> In reference to
> b0ad5a455d7e5352d4c86ba945112011dbeadfb8~078a458e077d6b0db262c4b05fee51d01de2d1d2,
> metadata writes to qcow2/cow/qcow/vpc/vmdk are all synced prior to
> succeeding writes.
>
> Only when write is s
On Wed, May 06, 2015 at 04:39:25PM +0300, Alberto Garcia wrote:
> The qcow2 L2/refcount cache contains one separate table for each cache
> entry. Doing one allocation per table adds unnecessary overhead and it
> also requires us to store the address of each table separately.
>
> Since the size of
On Wed, May 06, 2015 at 04:39:26PM +0300, Alberto Garcia wrote:
> Since all tables are now stored together, it is possible to obtain
> the position of a particular table directly from its address, so the
> operation becomes O(1).
>
> Signed-off-by: Alberto Garcia
> ---
> block/qcow2-cache.c | 32
On Wed, May 06, 2015 at 04:39:27PM +0300, Alberto Garcia wrote:
> The current algorithm to evict entries from the cache gives always
> preference to those in the lowest positions. As the size of the cache
> increases, the chances of the later elements of being removed decrease
> exponentially.
>
>
On Wed, May 06, 2015 at 04:39:28PM +0300, Alberto Garcia wrote:
> A cache miss means that the whole array was traversed and the entry
> we were looking for was not found, so there's no need to traverse it
> again in order to select an entry to replace.
>
> Signed-off-by: Alberto Garcia
> ---
> b
On Wed, May 06, 2015 at 04:39:29PM +0300, Alberto Garcia wrote:
> The current cache algorithm traverses the array starting always from
> the beginning, so the average number of comparisons needed to perform
> a lookup is proportional to the size of the array.
>
> By using a hash of the offset as t
On Wed, May 06, 2015 at 04:39:30PM +0300, Alberto Garcia wrote:
> This function never receives an invalid table pointer, so we can make
> it void and remove all the error checking code.
>
> Signed-off-by: Alberto Garcia
> ---
> block/qcow2-cache.c| 7 +--
> block/qcow2-cluster.c | 50
On Wed, May 06, 2015 at 04:39:31PM +0300, Alberto Garcia wrote:
> Fix pointer declaration to make it consistent with the rest of the
> code.
>
> Signed-off-by: Alberto Garcia
> ---
> block/qcow2-cache.c | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
Reviewed-by: Stefan Hajnoczi
Hello!
This is updated version of my eventfd for virtio-mmio patch. Style notes
have been considered, hopefully it's OK now.
It's now 3 parts instead of 4, because the last one was actually a small
fix, i decided to merge it with no 3.
Kind regards,
Pavel Fedin
Expert Engineer
Samsung Electron
set_host_notifier() is introduced into virtio-mmio now. Most of codes came
from virtio-pci.
Signed-off-by: Ying-Shiuan Pan
Signed-off-by: Pavel Fedin
---
hw/virtio/virtio-mmio.c | 72
+
1 file changed, 72 insertions(+)
diff --git a/hw/virtio/virt
Shannon Zhao writes:
> From: Shannon Zhao
>
> Introduce a preliminary framework in virt-acpi-build.c with the main
> ACPI build functions. It exposes the generated ACPI contents to
> guest over fw_cfg.
>
> The required ACPI v5.1 tables for ARM are:
> - RSDP: Initial table that points to XSDT
>
Same as host notifier of virtio-mmio, most of codes came from virtio-pci.
The kvm-arm does not yet support irqfd, need to fix the hard-coded part
after
kvm-arm gets irqfd support.
Signed-off-by: Ying-Shiuan Pan
Signed-off-by: Pavel Fedin
---
hw/virtio/virtio-mmio.c | 61
On Wed, May 6, 2015 at 4:12 PM, Christoffer Dall
wrote:
> Hi Jérémy,
>
> On Tue, May 05, 2015 at 11:13:11AM +0200, Jérémy Fanguède wrote:
>> To maintain cache coherency on ARM, we may need a mechanism to flush
>> the data cache.
>
> In addition to generally just making this functionality available
Signed-off-by: Ying-Shiuan Pan
Signed-off-by: Pavel Fedin
---
hw/virtio/virtio-mmio.c | 47
+++
1 file changed, 47 insertions(+)
diff --git a/hw/virtio/virtio-mmio.c b/hw/virtio/virtio-mmio.c
index 8756240..0ab270d 100644
--- a/hw/virtio/virtio-mmio.c
Hi Pavel,
Have you noticed below thread? This thread is based on the patchset from
Ying-Shiuan Pan.
http://lists.gnu.org/archive/html/qemu-devel/2014-11/msg00594.html
On 2015/5/7 18:46, Pavel Fedin wrote:
> Hello!
>
> This is updated version of my eventfd for virtio-mmio patch. Style notes
>
include/glib-compat.h defines a bunch of functions based on glib primitives,
and uses assert() without including assert.h. Replace assert() with
g_assert() to make the file more self-contained, and to fix compilation
breakage after 28507a415a9b1e.
Reported-by: Laurent Desnogues
Signed-off-by: Mi
On Thu, May 07, 2015 at 12:50:50PM +0200, Jérémy Fanguède wrote:
> On Wed, May 6, 2015 at 4:12 PM, Christoffer Dall
> wrote:
> > Hi Jérémy,
> >
> > On Tue, May 05, 2015 at 11:13:11AM +0200, Jérémy Fanguède wrote:
> >> To maintain cache coherency on ARM, we may need a mechanism to flush
> >> the da
This series implements a bare-metal test payload for the ARM and AARCH64 virt
machine models. With the new direction of TCG to finally get multi-threaded
capabilities, simple and easily deployed tests are needed, to reproduce race
conditions and intuitively debug QEMU's TCG internals.
The goal of
Sample spinlock test case with the option to implement the spinlock
by means of GCC atomic instructions or unsafe memory operations.
Additionally, printf is wrapped around a spinlock to avoid concurrent
access to the serial device.
Suggested-by: Jani Kokkonen
Suggested-by: Claudio Fontana
Signed
Minimal payload initialization for the virt machine model.
Setup a stack and jump to C code, where CPU0 will boot any
discovered secondary cores through PSCI. Immediately after
all cores are turned-off and the guest is powered down.
Added printf functionality is based on the multiboot test. In a
s
Eric Blake wrote:
> On 05/06/2015 12:37 PM, Peter Maydell wrote:
>> On 6 May 2015 at 18:49, Juan Quintela wrote:
>>> Hi
>>>
>
>>
>> Fails to build on 32 bit, I'm afraid:
>>
>> /root/qemu/arch_init.c: In function ‘do_data_decompress’:
>> /root/qemu/arch_init.c:1486:28: error: passing argument 2
* Liang Li (liang.z...@intel.com) wrote:
> If live migration is very fast and can be completed in 1 second,
> the dirty_sync_count of MigrationState will not be updated.
> Then you will see "dirty sync count: 0" in qemu monitor even if
> the actual dirty sync count is not 0.
>
> Signed-off-by: Lia
Liang Li wrote:
> If live migration is very fast and can be completed in 1 second,
> the dirty_sync_count of MigrationState will not be updated.
> Then you will see "dirty sync count: 0" in qemu monitor even if
> the actual dirty sync count is not 0.
>
> Signed-off-by: Liang Li
Reviewed-by: Juan
Hello!
> Have you noticed below thread? This thread is based on the patchset from
Ying-
> Shiuan Pan.
>
> http://lists.gnu.org/archive/html/qemu-devel/2014-11/msg00594.html
Yes, of course. Actually my set is based on that one, it's just updated
against current master and improved a little bit.
Add new "arg" sub-argument to the --semihosting-config allowing to pass
multiple input argument separately. It is required for example by UHI
semihosting to construct argc and argv.
Signed-off-by: Leon Alrae
---
include/exec/semihost.h | 12
qemu-options.hx | 8 +---
vl
Remove semihosting_enabled and semihosting_target and replace them with
SemihostingConfig structure containing equivalent fields. The structure
is defined in vl.c where it is actually set.
Also introduce separate header file include/exec/semihost.h allowing to
access semihosting config related stu
From: Liang Li
Give some details about the multiple thread (de)compression and
how to use it in live migration.
Signed-off-by: Liang Li
Signed-off-by: Yang Zhang
Reviewed-by: Dr.David Alan Gilbert
Reviewed-by: Juan Quintela
Signed-off-by: Juan Quintela
---
docs/multi-thread-compression.txt
From: Liang Li
Add the code to create and destroy the multiple threads those will be
used to do data decompression. Left some functions empty just to keep
clearness, and the code will be added later.
Signed-off-by: Liang Li
Signed-off-by: Yang Zhang
Reviewed-by: Dr.David Alan Gilbert
Reviewed
> On 07 May 2015, at 12:52, Leon Alrae wrote:
>
>> is it that difficult to count the "arg"s and correctly alloc the array?
>
> This probably would require going through the list twice
the code to iterate is already there, for other options, you just need to add a
branch to the existing case.
From: Liang Li
Define the data structure and variables used to do multiple thread
compression, and add the code to initialize and free them.
Signed-off-by: Liang Li
Signed-off-by: Yang Zhang
Reviewed-by: Dr.David Alan Gilbert
Reviewed-by: Juan Quintela
Signed-off-by: Juan Quintela
---
arch
From: Liang Li
Define the data structure and variables used to do multiple thread
decompression, and add the code to initialize and free them.
Signed-off-by: Liang Li
Signed-off-by: Yang Zhang
Reviewed-by: Dr.David Alan Gilbert
Reviewed-by: Juan Quintela
Signed-off-by: Juan Quintela
---
ar
From: Liang Li
Add the code to create and destroy the multiple threads those will
be used to do data compression. Left some functions empty to keep
clearness, and the code will be added later.
Signed-off-by: Liang Li
Signed-off-by: Yang Zhang
Reviewed-by: Dr.David Alan Gilbert
Reviewed-by: Ju
wing changes since commit 38003aee196a96edccd4d64471beb1b67e9b2b17:
Merge remote-tracking branch 'remotes/rth/tags/tcg-next-20150505' into
staging (2015-05-06 11:16:35 +0100)
are available in the git repository at:
git://github.com/juanquintela/qemu.git tags/migration/20150
From: Liang Li
Implement the core logic of the multiple thread compression. At this
point, multiple thread compression can't co-work with xbzrle yet.
Signed-off-by: Liang Li
Signed-off-by: Yang Zhang
Signed-off-by: Juan Quintela
---
arch_init.c | 184 +
From: Liang Li
The multiple compression threads can be turned on/off through
qmp and hmp interface before doing live migration.
Signed-off-by: Liang Li
Signed-off-by: Yang Zhang
Reviewed-by: Dr.David Alan Gilbert
Reviewed-by: Eric Blake
Signed-off-by: Juan Quintela
---
migration/migration.
From: Liang Li
qemu_put_compression_data() compress the data and put it to QEMUFile.
qemu_put_qemu_file() put the data in the buffer of source QEMUFile to
destination QEMUFile.
Signed-off-by: Liang Li
Signed-off-by: Yang Zhang
Reviewed-by: Juan Quintela
Signed-off-by: Juan Quintela
---
incl
From: Liang Li
Add the qmp commands to tune and query the parameters used in live
migration.
Signed-off-by: Liang Li
Signed-off-by: Yang Zhang
Signed-off-by: Juan Quintela
---
migration/migration.c | 56 ++
qapi-schema.json | 45 ++
From: Liang Li
Implement the core logic of multiple thread decompression,
the decompression can work now.
Signed-off-by: Liang Li
Signed-off-by: Yang Zhang
Signed-off-by: Juan Quintela
---
arch_init.c | 50 --
1 file changed, 48 insertions(+),
Hi,
This patch series adds "arg=" sub-option to --semihosting-config group. It
allows building up a list of input arguments as it can appear multiple
times in the command line. This is a flexible solution for creating
argc/argv for the guest program (needed by UHI semihosting for example).
RFC pat
From: Liang Li
Split the function save_zero_page from ram_save_page so that we can
reuse it later.
Signed-off-by: Liang Li
Signed-off-by: Yang Zhang
Reviewed-by: Juan Quintela
Signed-off-by: Juan Quintela
---
arch_init.c | 61 +++--
1
From: Liang Li
Now, multiple thread compression can co-work with xbzrle. when
xbzrle is on, multiple thread compression will only work at the
first round of RAM data sync.
Signed-off-by: Liang Li
Signed-off-by: Yang Zhang
Reviewed-by: Dr.David Alan Gilbert
Signed-off-by: Juan Quintela
---
a
1 - 100 of 257 matches
Mail list logo
