Re: [Qemu-devel] [PATCH target-arm v6 05/14] arm: xlnx-zynqmp: Connect CPU Timers to GIC

2015-05-04 Thread Edgar E. Iglesias
On Fri, Apr 24, 2015 at 01:28:44PM -0700, Peter Crosthwaite wrote: > Connect the GPIO outputs from the individual CPUs for the timers to the > GIC. > > Tested-by: Alistair Francis > Signed-off-by: Peter Crosthwaite Reviewed-by: Edgar E. Iglesias > --- > changed since v4: > Use macro for GIC_

Re: [Qemu-devel] [PATCH target-arm v6 12/14] arm: Add xlnx-ep108 machine

2015-05-04 Thread Peter Crosthwaite
On Mon, May 4, 2015 at 8:26 PM, Edgar E. Iglesias wrote: > On Fri, Apr 24, 2015 at 01:28:48PM -0700, Peter Crosthwaite wrote: >> Add a machine model for the Xilinx ZynqMP SoC EP108 board. > > hmm, I think xlnx-ep108 is quite cryptic as user input. Can't we just > name this xilinx-ep108? > So I wa

Re: [Qemu-devel] [PATCH target-arm v6 12/14] arm: Add xlnx-ep108 machine

2015-05-04 Thread Edgar E. Iglesias
On Mon, May 04, 2015 at 09:00:46PM -0700, Peter Crosthwaite wrote: > On Mon, May 4, 2015 at 8:26 PM, Edgar E. Iglesias > wrote: > > On Fri, Apr 24, 2015 at 01:28:48PM -0700, Peter Crosthwaite wrote: > >> Add a machine model for the Xilinx ZynqMP SoC EP108 board. > > > > hmm, I think xlnx-ep108 is

[Qemu-devel] [PATCH 2/7] disas: microblaze: Migrate setup to common code

2015-05-04 Thread Peter Crosthwaite
Migrate the target_disas TARGET_MICROBLAZE code to common code, so that the disassambly works for the monitor (as well the log). E.g. (qemu) xp 0x9000 9000: 0x94208001 And before this patch: (qemu) xp/i 0x9000 0x9000: Asm output not supported on this arch After: (qemu) xp

[Qemu-devel] [PATCH 4/7] disas: cris: Migrate setup to common code

2015-05-04 Thread Peter Crosthwaite
Migrate the target_disas TARGET_CRIS code to common code, so that the disassambly works for the monitor (as well the log). E.g. (qemu) xp 0x40004000 40004000: 0x1e6f25f0 And before this patch: (qemu) xp/i 0x40004000 0x40004000: Asm output not supported on this arch After: (qemu) xp/i 0x4

[Qemu-devel] [PATCH 0/7] disas: Unify target_disas and monitor_disas

2015-05-04 Thread Peter Crosthwaite
There two functions are mostly trying to do the same thing, which is disassemble a target instruction (sequence) for printfing. The architecture specific setup is largely duped between the two functions. Most architectures are carbon copy and can be factored out without issue (P1). Three architectu

[Qemu-devel] [PATCH 1/7] disas: Create factored out fn for monitor and target disas

2015-05-04 Thread Peter Crosthwaite
The monitor_ and target_ disas function do mostly the same thing. One dissambles target instructions on behalf of the log, the other for the monitor command "xp/i" and friends. There is a #if defined TARGET_FOO switch duplicated between both functions and arch-specific setup for disas is copied be

[Qemu-devel] [PATCH 3/7] disas: cris: Fix 0 buffer length case

2015-05-04 Thread Peter Crosthwaite
Cris has the complication of variable length instructions and has a check in place to clamp memory reads in case the disas request doesn't have enough bytes for the instruction being disas'd. This breaks down in the case where disassembling for the monitor where the buffer length is defaulted to 0.

[Qemu-devel] [PATCH 5/7] disas: arm-a64: Make printfer and stream variable

2015-05-04 Thread Peter Crosthwaite
In a normal disassembly flow, the printf and stream being used varies from disas job to job. In particular it varies if mixing monitor_disas and target_disas. Make both the printfer function and target stream settable in the QEMUDisassmbler class. Remove the stream_ initialisation from the constru

[Qemu-devel] [PATCH 6/7] monitor: "i": Add ARM specifics

2015-05-04 Thread Peter Crosthwaite
Add the ARM specific disassembly flags setup, so ARM can be correctly disassembled from the monitor. Signed-off-by: Peter Crosthwaite --- monitor.c | 11 +++ 1 file changed, 11 insertions(+) diff --git a/monitor.c b/monitor.c index d831d98..9d9f1e2 100644 --- a/monitor.c +++ b/monitor.c

[Qemu-devel] [PATCH 7/7] disas: arm: Use target_disas impl for monitor

2015-05-04 Thread Peter Crosthwaite
As it is more fully featured. It has multi-endian, thumb and AArch64 support whereas the existing monitor disas support only has vanilla AA32 support. E.G. Running an AA64 linux kernel the follow -d in_asm disas happens (taget_disas()): IN: 0x4000: 58c0 ldr x0, pc+24 (addr 0

Re: [Qemu-devel] [PATCH target-arm v6 07/14] net: cadence_gem: Split state struct and type into header

2015-05-04 Thread Edgar E. Iglesias
On Fri, Apr 24, 2015 at 01:28:45PM -0700, Peter Crosthwaite wrote: > Create a new header for Cadence GEM to allow using the device with > modern SoC programming conventions. The state struct needs to be > visible to embed the device in SoC containers. > > Reviewed-by: Alistair Francis > Reviewed-

Re: [Qemu-devel] [PATCH] pseries: Enable in-kernel H_LOGICAL_CI_{LOAD, STORE} implementations

2015-05-04 Thread Thomas Huth
On Tue, 5 May 2015 11:00:01 +1000 David Gibson wrote: > qemu currently implements the hypercalls H_LOGICAL_CI_LOAD and > H_LOGICAL_CI_STORE as PAPR extensions. These are used by the SLOF firmware > for IO, because performing cache inhibited MMIO accesses with the MMU off > (real mode) is very a

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