Hi
Please, send any topic that you are interested in covering.
Call details:
By popular demand, a google calendar public entry with it
https://www.google.com/calendar/embed?src=dG9iMXRqcXAzN3Y4ZXZwNzRoMHE4a3BqcXNAZ3JvdXAuY2FsZW5kYXIuZ29vZ2xlLmNvbQ
(Let me know if you have any problems w
Paolo Bonzini writes:
> monitor_fdset_add_fd returns an AddfdInfo struct (used by the QMP
> command add_fd). Free it.
>
> Signed-off-by: Paolo Bonzini
> ---
> v1->v2: line length [Fam], pass &error_abort [Shannon]
> v2->v3: use "!!" instead of "? true : false" [Markus]
> ---
> vl
Paolo Bonzini writes:
> On 15/03/2015 11:23, Michael Tokarev wrote:
>> Or, alternatively, to keep this `data' pointer in sdp to use it in
>> bt_l2cap_sdp_close_ch().
>
> Yes.
>
>>> > In any case, it seems simpler to just leave this code aside.
>> How many times this code is called?
>>
>> We have
On 16/03/2015 06:31, Fam Zheng wrote:
> There could be a race condition when two processes call
> address_space_map concurrently and both want to use the bounce buffer.
>
> Add an in_use flag in BounceBuffer to sync it.
>
> Signed-off-by: Fam Zheng
> ---
> exec.c | 5 -
> 1 file changed,
On 16/03/2015 06:31, Fam Zheng wrote:
> So that accesses from multiple threads are safe.
>
> Signed-off-by: Fam Zheng
> ---
> exec.c | 24 +++-
> 1 file changed, 15 insertions(+), 9 deletions(-)
>
> diff --git a/exec.c b/exec.c
> index 4080044..3e54580 100644
> --- a/exec.
On 16/03/2015 06:31, Fam Zheng wrote:
> The caller's workflow is like
>
> if (!address_space_map()) {
> ...
> cpu_register_map_client();
> }
>
> If bounce buffer became available after address_space_map() but before
> cpu_register_map_client(), the caller could miss it a
On 16/03/2015 06:31, Fam Zheng wrote:
> If DMA's owning thread cancels the IO while the bounce buffer's owning thread
> is notifying the "cpu client list", a use-after-free happens:
>
> continue_after_map_failure dma_aio_cancel
> --
On Mon, 03/16 08:30, Paolo Bonzini wrote:
>
>
> On 16/03/2015 06:31, Fam Zheng wrote:
> > There could be a race condition when two processes call
> > address_space_map concurrently and both want to use the bounce buffer.
> >
> > Add an in_use flag in BounceBuffer to sync it.
> >
> > Signed-off-
On 03/16/2015 11:52 AM, Alex Williamson wrote:
On Mon, 2015-03-16 at 11:05 +0800, Chen Fan wrote:
On 03/14/2015 06:34 AM, Alex Williamson wrote:
On Thu, 2015-03-12 at 18:23 +0800, Chen Fan wrote:
when the vfio device encounters an uncorrectable error in host,
the vfio_pci driver will signal t
On Mon, 03/16 08:34, Paolo Bonzini wrote:
>
>
> On 16/03/2015 06:31, Fam Zheng wrote:
> > The caller's workflow is like
> >
> > if (!address_space_map()) {
> > ...
> > cpu_register_map_client();
> > }
> >
> > If bounce buffer became available after address_space_map() bu
On Mon, 03/16 08:33, Paolo Bonzini wrote:
>
>
> On 16/03/2015 06:31, Fam Zheng wrote:
> > So that accesses from multiple threads are safe.
> >
> > Signed-off-by: Fam Zheng
> > ---
> > exec.c | 24 +++-
> > 1 file changed, 15 insertions(+), 9 deletions(-)
> >
> > diff --git
Hi,
> Branch created, three patches (2x pvscsi + 1x multiple pci root)
> cherry-picked from master, pushed.
>
> The smp race fix will follow as soon as it hits master.
Was cherry-picked friday.
> I plan to tag 1.8.1 tomorrow or next monday, so the release will be
> ready in time for qemu 2.3-
Shannon Zhao writes:
> It's detected by coverity. As max of sockaddr_un.sun_path is
> sizeof(helper.sun_path), should check the length of source
> and use strncpy instead of strcpy.
>
> Signed-off-by: Shannon Zhao
> Signed-off-by: Shannon Zhao
> ---
> hw/9pfs/virtio-9p-proxy.c | 3 ++-
> 1 fil
On 16/03/2015 08:29, Markus Armbruster wrote:
> > Well, in this case the bug in bt_l2cap_sdp_close_ch is much worse than a
> > resource leak. But bluetooth is not the utmost priority in QEMU
> > development...
>
> To put it more bluntly: it's rotting in peace.
>
> Occasional drive-by fixes won
changes since commit 7ccfb495c64e1eef5886dcc4d48523ed6d1d22a4:
user-exec.c: fix build on NetBSD/sparc64 and NetBSD/arm (2015-03-13 15:57:00
+)
are available in the git repository at:
git://git.kraxel.org/qemu tags/pull-seabios-1.8.1-20150316-1
for you to fetch changes up to
Carries two bugfixes and support for multiple pci root buses.
git shortlog rel-1.8.0..rel-1.8.1
=
Ameya Palande (1):
x86: add barrier to read{b,w,l} and write{b,w,l} functions
Kevin O'Connor (1):
smp: Fix smp race introduced in 0673b787
Marcel Apfelba
Stefan Weil writes:
> All four leaks are similar, so fix them in one patch.
Ok had to spent some time to figure out which was the path that was not
freeing memory. So added extra information to commit message.
Success path was not doing memory free.
Applied.
>
> Signed-off-by: Stefan Weil
>
Memory hot unplug are both asynchronous procedures.
When the unplug operation happens, unplug request cb is called first.
And when guest OS finished handling unplug, unplug cb will be called
to do the real removal of device.
v4:
-reorganize the patchset
-drop the new API acpi_send_gpe_event()
-
From: Tang Chen
Add a new API named acpi_memory_slot_status() to obtain a single memory
slot status. Doing this is because this procedure will be used by other
functions in the next coming patches.
Signed-off-by: Tang Chen
Signed-off-by: Zhu Guihua
---
hw/acpi/memory_hotplug.c | 24 ++
From: Tang Chen
Memory hot unplug are both asynchronous procedures.
When the unplug operation happens, unplug request cb is called first.
And when guest OS finished handling unplug, unplug cb will be called
to do the real removal of device.
This patch adds unplug request cb for memory device, an
From: Tang Chen
This patch adds unplug cb for memory device. It resets some memory status
in acpi_memory_unplug_cb().
Signed-off-by: Tang Chen
Signed-off-by: Zhu Guihua
---
hw/acpi/ich9.c | 9 +++--
hw/acpi/memory_hotplug.c | 14 ++
hw/acpi/piix4.c
From: Tang Chen
Implement unplug cb for pc-dimm. It calls memory unplug cb to reset
some memory status, removes the corresponding memory region, and
unregisters vmstate.
Signed-off-by: Tang Chen
Signed-off-by: Zhu Guihua
---
hw/i386/pc.c | 26 --
1 file changed, 24 ins
From: Tang Chen
Implement memory unplug request cb for pc-dimm, and call it in
pc_machine_device_unplug_request_cb().
Signed-off-by: Tang Chen
Signed-off-by: Zhu Guihua
---
hw/i386/pc.c | 28 ++--
1 file changed, 26 insertions(+), 2 deletions(-)
diff --git a/hw/i386/p
This patch adds a new bit to memory hotplug IO port indicating that
EJ0 has been evaluated by guest OS. And call pc-dimm unplug cb to do
the real removal.
Signed-off-by: Zhu Guihua
---
docs/specs/acpi_mem_hotplug.txt | 11 +--
hw/acpi/memory_hotplug.c | 21 +++-
The caller's workflow is like
if (!address_space_map()) {
...
cpu_register_map_client();
}
If bounce buffer became available after address_space_map() but before
cpu_register_map_client(), the caller could miss it and has to wait for the
next bounce buffer notify, which ma
v4: Remove smp_mb() in patch 1.
Remove two cpu_exec_init_all() calls.
Rename cpu_notify_map_clients_unlocked -> cpu_notify_map_clients_locked.
Add Paolo's rev-by in patch 5.
v3: Address Paolo's comments:
Use atomic_xchg for bounce buffer.
Use mutex and BH for map_client_list.
So that accesses from multiple threads are safe.
Signed-off-by: Fam Zheng
---
exec.c | 24 +++-
1 file changed, 15 insertions(+), 9 deletions(-)
diff --git a/exec.c b/exec.c
index 8d21eff..9f6c4f8 100644
--- a/exec.c
+++ b/exec.c
@@ -429,15 +429,6 @@ address_space_translate_
If DMA's owning thread cancels the IO while the bounce buffer's owning thread
is notifying the "cpu client list", a use-after-free happens:
continue_after_map_failure dma_aio_cancel
--
aio_bh_new
There could be a race condition when two processes call
address_space_map concurrently and both want to use the bounce buffer.
Add an in_use flag in BounceBuffer to sync it.
Signed-off-by: Fam Zheng
---
exec.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/exec.c b/exec.
The function is a nop for user mode, so just remove them.
Signed-off-by: Fam Zheng
---
bsd-user/main.c | 1 -
linux-user/main.c | 1 -
2 files changed, 2 deletions(-)
diff --git a/bsd-user/main.c b/bsd-user/main.c
index 1bb2754..5bfaf5c 100644
--- a/bsd-user/main.c
+++ b/bsd-user/main.c
@@ -9
Re-add the glx compile test to configure. We can't use pkg-config to
probe for glx, and as long as milkymist-tmu2 privately uses glx (due to
opengl infrastructure in qemu not being ready yet) we must continue to
test for glx to avoid build failures.
Reported-by: Juan Quintela
Signed-off-by: Gerd
On Thu, Mar 5, 2015 at 10:11 AM, Alistair Francis
wrote:
> On Tue, Mar 3, 2015 at 10:28 AM, Peter Crosthwaite
> wrote:
>> With quad Cortex-A53 CPUs.
>>
>> Signed-off-by: Peter Crosthwaite
>> ---
>> changed since v1:
>> Add &error_abort to CPU child adder call.
>>
>> default-configs/aarch64-soft
On 2015/3/16 15:58, Aneesh Kumar K.V wrote:
> Shannon Zhao writes:
>
>> It's detected by coverity. As max of sockaddr_un.sun_path is
>> sizeof(helper.sun_path), should check the length of source
>> and use strncpy instead of strcpy.
>>
>> Signed-off-by: Shannon Zhao
>> Signed-off-by: Shannon Zha
Add a new API named acpi_send_gpe_event() to send hotplug SCI.
This API can be used by pci, cpu and memory hotplug.
Signed-off-by: Zhu Guihua
---
hw/acpi/core.c | 7 +++
hw/acpi/cpu_hotplug.c| 3 +--
hw/acpi/memory_hotplug.c | 3 +--
hw/acpi/pcihp.c
On 14 March 2015 at 04:19, Scott Feldman wrote:
> On Thu, Mar 12, 2015 at 12:58 PM, Stefan Hajnoczi wrote:
>> On Thu, Mar 12, 2015 at 03:03:45PM +, Peter Maydell wrote:
>>> Also fails to build with our minimum glib version
> I verified on glibc 2.13 for the second issue.
Note that "glib" an
On 13 March 2015 at 20:23, Richard Henderson wrote:
>
> I should have sent the pull somewhat before now, I imagine, but if
> there's still room in the schedule before the rc0 hardfreeze I'd
> like to clear my backlog of 5-6 patchsets which all depend on this.
Well, we can probably put this patchs
On Sat, 14 Mar 2015 16:42:01 +0100
Stefan Weil wrote:
> This fixes a warning from Coverity.
>
> Signed-off-by: Stefan Weil
> ---
> include/hw/elf_ops.h |4 +++-
> 1 file changed, 3 insertions(+), 1 deletion(-)
>
> diff --git a/include/hw/elf_ops.h b/include/hw/elf_ops.h
> index 16a627b..b
From: Shannon Zhao
It's detected by coverity. The socket name specified
should fit in the sockadd_un.sun_path. If not abort.
Signed-off-by: Shannon Zhao
Signed-off-by: Shannon Zhao
Signed-off-by: Aneesh Kumar K.V
---
fsdev/virtfs-proxy-helper.c | 1 +
hw/9pfs/virtio-9p-proxy.c | 4
2
Hi,
Please pull the below update for VirtFS
The following changes since commit ee74801035b0b5f1fdfd4e31d3a53f511f91c804:
Merge remote-tracking branch 'remotes/lalrae/tags/mips-20150311' into staging
(2015-03-11 18:22:15 +)
are available in the git repository at:
https://github.com/kv
From: Shannon Zhao
It's detected by coverity. Check the return value of proxy_marshal.
Signed-off-by: Shannon Zhao
Signed-off-by: Shannon Zhao
Signed-off-by: Aneesh Kumar K.V
---
fsdev/virtfs-proxy-helper.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/fsdev/virtfs-proxy-helper.c b/
From: Stefan Weil
All four leaks are similar, so fix them in one patch.
Success path was not doing memory free.
Signed-off-by: Stefan Weil
Signed-off-by: Aneesh Kumar K.V
---
hw/9pfs/virtio-9p-local.c | 28
1 file changed, 8 insertions(+), 20 deletions(-)
diff --
From: Shannon Zhao
It's detected by coverity. Fix out-of-bounds access of the function
mp_dacl_listxattr.
Signed-off-by: Shannon Zhao
Signed-off-by: Shannon Zhao
Signed-off-by: Aneesh Kumar K.V
---
hw/9pfs/virtio-9p-posix-acl.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --g
From: Markus Armbruster
s390_flic_init() is a helper to create and realize either
"s390-flic-kvm" or "s390-flic-qemu". When qdev_init() fails, it
complains to stderr and succeeds.
Except it can't actually fail, because the "s390-flic-qemu" is a dummy
without a realize method, and "s390-flic-kvm
From: Michael Tokarev
Don't compare syscall return with -1, use "<0" condition.
Don't introduce useless local variables when we already
have similar variable
Rename local variable to be consistent with other usages
Finally make the two methods, read and write, to be similar to each other
Signed-
From: Michael Tokarev
Omit one unnecessary memory allocation for components
of the path and create the resulting path directly given
lengths of the components.
Do not use basename(3) because there are 2 versions of
this function which differs when argument ends with
slash character, use strrchr(
On Fri, 13 Mar 2015, Konrad Rzeszutek Wilk wrote:
> As the libxc library follows (mostly) the return negative
> for failure and stashes the error value in errno.
>
> Signed-off-by: Konrad Rzeszutek Wilk
Acked-by: Stefano Stabellini
I'll add it to my queue
> hw/xen/xen_pt.c | 4 ++--
> h
On Fri, 13 Mar 2015, Konrad Rzeszutek Wilk wrote:
> .errors - as it will most likely have the proper error value.
>
> Signed-off-by: Konrad Rzeszutek Wilk
Acked-by: Stefano Stabellini
> xen-hvm.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/xen-hvm.c b/xen-hv
From: Thomas Huth
The function s390_virtio_bus_console() is completely unused and thus
can be removed safely.
Signed-off-by: Thomas Huth
Reviewed-by: Jens Freimann
Signed-off-by: Jens Freimann
Message-Id: <1426164834-38648-5-git-send-email-jf...@linux.vnet.ibm.com>
Signed-off-by: Cornelia Huc
The following changes since commit 7ccfb495c64e1eef5886dcc4d48523ed6d1d22a4:
user-exec.c: fix build on NetBSD/sparc64 and NetBSD/arm (2015-03-13 15:57:00
+)
are available in the git repository at:
git://github.com/cohuck/qemu tags/s390x-20150316
for you to fetch changes up to
All fields in structures transmitted by ccws are big endian; assure
we handle them as such.
Reviewed-by: Thomas Huth
Reviewed-by: David Hildenbrand
Signed-off-by: Cornelia Huck
Message-Id: <1426067871-17693-2-git-send-email-cornelia.h...@de.ibm.com>
---
hw/s390x/virtio-ccw.c | 22 +
From: Dominik Dingel
load_image_targphys already checks the max size and will return
an error code. So the follow-on check will never trigger.
Signed-off-by: Dominik Dingel
Reviewed-by: Cornelia Huck
Reviewed-by: Thomas Huth
Signed-off-by: Jens Freimann
Message-Id: <1426164834-38648-6-git-se
On 16/03/2015 10:03, Fam Zheng wrote:
> +void cpu_exec_init_all(void)
> +{
> +#if !defined(CONFIG_USER_ONLY)
> +qemu_mutex_init(&ram_list.mutex);
> +memory_map_init();
> +io_mem_init();
> +#endif
The #if is now unnecessary, but I can fix this. I'll queue the patch
for 2.4.
Paolo
>
From: Tony Krowiak
Check for the aes_key_wrap and dea_key_wrap machine options and set the
appropriate KVM device attribute(s) to tell the kernel to enable or disable
the AES/DEA protected key functions for the guest domain.
This patch introduces two new machine options for indicating the state
From: Dominik Dingel
By using the new introduced generic interface we
can remove redundancies and clean up.
Reviewed-by: Thomas Huth
Suggested-by: Thomas Huth
Signed-off-by: Dominik Dingel
Signed-off-by: Jens Freimann
Message-Id: <1426164834-38648-3-git-send-email-jf...@linux.vnet.ibm.com>
S
On Fri, Mar 13, 2015 at 04:09:56PM -0300, Eduardo Habkost wrote:
> This reverts commit 13704e4c455770d500d6b87b117e32f0d01252c9.
>
> With the Intel microcode update that removed HLE and RTM, there will be
> different kinds of Haswell and Broadwell CPUs out there: some that still
> have the HLE and
From: "Jason J. Herne"
Synchronizes the guest TOD clock across a migration by sending the guest TOD
clock value to the destination system. If the guest TOD clock is not preserved
across a migration then the guest's view of time will snap backwards if the
destination host clock is behind the sourc
On Fri, Mar 13, 2015 at 04:09:57PM -0300, Eduardo Habkost wrote:
> With the Intel microcode update that removed HLE and RTM, there will be
> different kinds of Haswell and Broadwell CPUs out there: some that still
> have the HLE and RTM features, and some that don't have the HLE and RTM
> features.
From: Dominik Dingel
More and more virtual machine specifics between kvm and qemu will be
transferred with vm attributes.
So we encapsulate the common logic in a generic function.
Additionally we need only to check during initialization if kvm supports
virtual machine attributes.
Cc: Paolo Bonz
From: Frank Blaschka
The sei_nt2 event must contain the length of the event.
Signed-off-by: Frank Blaschka
Signed-off-by: Jens Freimann
Message-Id: <1426164834-38648-7-git-send-email-jf...@linux.vnet.ibm.com>
Signed-off-by: Cornelia Huck
---
hw/s390x/s390-pci-bus.c | 1 +
1 file changed, 1 i
From: Thomas Huth
pci.mak includes a lot of devices - and most of them do not make
sense on s390x, like USB controllers or audio cards. These devices
also show up when running "qemu-system-s390x -device help" and thus
could raise the hope for the users that they could use these kind
of devices wi
On Fri, Mar 13, 2015 at 09:09:40PM +0100, Markus Armbruster wrote:
> We've steered users away from QCOW/QCOW2 encryption for a while,
> because it's a flawed design (commit 136cd19 Describe flaws in
> qcow/qcow2 encryption in the docs).
>
> In addition to flawed crypto, we have comically bad usabi
From: Claudio Fontana
usage is similar to the commands x, xp.
Example with string: looking for "ELF" header in memory:
(qemu) s/100cb 0x40001000 "ELF"
searching memory area [40001000-400f5240]
40090001
(qemu) x/20b 0x4009
4009: '\x7f' 'E' 'L' 'F' '\x0
Simplifies multiseat configuration, see
docs/multiseat.txt update for details.
Signed-off-by: Gerd Hoffmann
---
docs/multiseat.txt | 19 +++
docs/specs/pci-ids.txt | 1 +
hw/pci-bridge/pci_bridge_dev.c | 25 -
include/hw/pci/pci.h
This series failed Patchew automatic testing.
Find the log fragments below (grepped lines around keywords "error" and
"warning"), or open the following URL to see the full log:
http://qemu.patchew.org/testing/log/<1426501911-1402-1-git-send-email-hw.clau...@gmail.com>
--8<-
C
Am 16.03.2015 um 05:58 schrieb Alexey Kardashevskiy:
> On 03/06/2015 12:17 AM, Alexander Graf wrote:
>> On 05.03.15 02:56, Alexey Kardashevskiy wrote:
>>> At the moment when running in KVM mode, QEMU registers "host" class to
>>> match the current CPU PVR value. It also registers another CPU class
> From: Paolo Bonzini [mailto:pbonz...@redhat.com]
> On 27/02/2015 14:11, Pavel Dovgalyuk wrote:
> > This patch adds identifier to aio requests. ID is used for creating bottom
> > halves and identifying them while replaying.
> > The patch also introduces several functions that make possible replayi
On 13 March 2015 at 20:23, Richard Henderson wrote:
>
> I should have sent the pull somewhat before now, I imagine, but if
> there's still room in the schedule before the rc0 hardfreeze I'd
> like to clear my backlog of 5-6 patchsets which all depend on this.
>
>
> r~
>
>
> The following changes s
As there is logic to deal with the difference between edge and level
triggered interrupts in the kernel we must ensure it knows the
configuration of the IRQs before we restore the pending state.
Signed-off-by: Alex Bennée
Acked-by: Christoffer Dall
diff --git a/hw/intc/arm_gic_kvm.c b/hw/intc/a
This is hopefully the final update to the series. I've skipped v3 for
the purposes of having a sane relationship to the branch name ;-)
v4
- Dropped the pl011 IRQ fiddling patch
- Save/Restore MP STATE
- moved into kvm.c
- changed MP_STATE to STOPPED
- Sync FP State
- Removed sup
For migration to work we need to sync all of the register state. This is
especially noticeable when GCC starts using FP registers as spill
registers even with integer programs.
Signed-off-by: Alex Bennée
---
v4:
- fixed merge conflicts
- rm superfluous reg.id++
diff --git a/target-arm/kvm6
This adds the saving and restore of the current Multi-Processing state
of the machine. While the KVM_GET/SET_MP_STATE API exposes a number of
potential states for x86 we only use two for ARM. Either the process is
running or not. We then save this state into the cpu_powered TCG state
to avoid chang
I was getting very confused about the duplication of state so wanted to
make it explicit.
Signed-off-by: Alex Bennée
diff --git a/target-arm/cpu.h b/target-arm/cpu.h
index 083211c..6dc1799 100644
--- a/target-arm/cpu.h
+++ b/target-arm/cpu.h
@@ -155,6 +155,11 @@ typedef struct CPUARMState {
From: Christoffer Dall
The current code was negatively indexing the cpu state array and not
synchronizing banked spsr register state with the current mode's spsr
state, causing occasional failures with migration.
Some munging is done to take care of the aarch64 mapping and also to
ensure the mos
On Mon, Mar 16, 2015 at 11:01:53AM +, Alex Bennée wrote:
> As there is logic to deal with the difference between edge and level
> triggered interrupts in the kernel we must ensure it knows the
> configuration of the IRQs before we restore the pending state.
>
> Signed-off-by: Alex Bennée
> Ac
From: Mikhail Ilyin
At present there are two copies of TPIDRURO register for secure and unsecure
access. TLS is set via a system call __ARM_NR_set_tls and its handler
(cpu_set_tls) always assigns a provided value to unsecure register
tpidrro_el[0]/tpidruro_ns. But during execution for cortex-a15
Here is a sample to prove the issue
$ echo "int main() { return 0; }" > /tmp/prog.c
$ arm-linux-gnueabi-gcc -g -o /tmp/prog /tmp/prog.c
$ qemu-arm -cpu cortex-a15 -L
/home/michail/arm/arm-linux-gnueabi/sys-root /tmp/prog
qemu: uncaught target signal 11 (Segmentation fault) - core dumped
Segmen
able in the git repository at:
>
> git://git.kraxel.org/qemu tags/pull-seabios-1.8.1-20150316-1
>
> for you to fetch changes up to 93f7c4f09f6957244d5af0a35309b8ad4ffb64ed:
>
> seabios: update to 1.8.1 stable release (2015-03-16 09:07:15 +0100)
>
> -
On Sat, 14 Mar 2015 09:37:08 +0100
Stefan Weil wrote:
> Coverity reports a truncation due to cast operation on operand
> reltab->sh_size from 64 bits to 32 bits for calls of load_at.
>
> Fix the types of the function arguments to match their use in
> function load_at: the offset is used for lsee
Am 14.03.2015 um 10:23 hat Markus Armbruster geschrieben:
> "check -T -qcow2" now passes again. Sorry for the mess I made.
>
> Markus Armbruster (2):
> iotests: Update 051's reference output
> qemu-img: Fix convert, amend error messages for unknown options
Thanks, applied to the block branch
On 16 March 2015 at 11:26, Mikhail Ilyin wrote:
> From: Mikhail Ilyin
>
> At present there are two copies of TPIDRURO register for secure and unsecure
> access. TLS is set via a system call __ARM_NR_set_tls and its handler
> (cpu_set_tls) always assigns a provided value to unsecure register
> tpi
Am 13.03.2015 um 21:09 hat Markus Armbruster geschrieben:
> We've steered users away from QCOW/QCOW2 encryption for a while,
> because it's a flawed design (commit 136cd19 Describe flaws in
> qcow/qcow2 encryption in the docs).
>
> In addition to flawed crypto, we have comically bad usability, and
On 03/10/2015 06:43 PM, Michael S. Tsirkin wrote:
On Tue, Mar 10, 2015 at 05:32:09PM +0200, Marcel Apfelbaum wrote:
The bios does not index the pxb slot number when
it computes the IRQ because it resides on bus 0
and not on the current bus.
However Qemu routes the irq through bus 0 and adds
the
Connect the GPIO outputs from the individual CPUs for the timers to the
GIC.
Signed-off-by: Peter Crosthwaite
---
hw/arm/xlnx-zynqmp.c | 16
1 file changed, 16 insertions(+)
diff --git a/hw/arm/xlnx-zynqmp.c b/hw/arm/xlnx-zynqmp.c
index 9465185..29954f5 100644
--- a/hw/arm/xlnx
To allow using the device with modern SoC programming conventions. The
state struct needs to be visible to embed the device in SoC containers.
Reviewed-by: Alistair Francis
Signed-off-by: Peter Crosthwaite
---
changed since v1:
Fix /* Public */ comment spacing (Alistair review)
hw/net/cadence_
To allow using the device with modern SoC programming conventions. The
state struct needs to be visible to embed the device in SoC containers.
Reviewed-by: Alistair Francis
Signed-off-by: Peter Crosthwaite
---
changed since v1:
Fix /* Public */ comment spacing (Alistair review)
hw/char/cadence
In preparation for migrating the state struct and type cast macro to a public
header. The acronym "UART" on it's own is not specific enough to be used in a
more global namespace so preface with "cadence". Fix the capitalisation of
"uart" in the state type while touching the typename. Preface macros
Hi Peter and all,
Xilinx's next gen SoC has been announced. This series adds a SoC and
board.
Series start with addition of ARM cortex A53 support (P1 and P2). The
Soc skeleton is then added with GIC, EMACs and UARTs are added. The
pre-existing models for GEM and UART are not SoC friendly (no vis
Similar to a53, but with different L1 I cache policy, phys addr size and
different cache geometries. The cache sizes is implementation
configurable, but use these values (from Xilinx MPSoC) as a default
until cache size configurability is added.
Reviewed-by: Alex Bennée
Signed-off-by: Peter Crost
Use SMC PSCI, with the standard policy of secondaries starting in
power-off.
Signed-off-by: Peter Crosthwaite
---
changed since v1:
Add &error_abort to property setter calls
hw/arm/xlnx-zynqmp.c | 8
1 file changed, 8 insertions(+)
diff --git a/hw/arm/xlnx-zynqmp.c b/hw/arm/xlnx-zynqm
With quad Cortex-A53 CPUs.
Signed-off-by: Peter Crosthwaite
---
changed since v2:
Added [*] to cpu child property name.
changed since v1:
Add &error_abort to CPU child adder call.
default-configs/aarch64-softmmu.mak | 2 +-
hw/arm/Makefile.objs| 1 +
hw/arm/xlnx-zynqmp.c
In preparation for support for Cortex a53. Use "axx" to describe the
shareable features. Some of the CP15 registers (such as ACTLR) are
specific to implementation, but we currently just RAZ them so continue
with that as the policy for all cortex A processors under a shared
definition.
The cache si
And connect IRQ outputs to the CPUs.
Reviewed-by: Alistair Francis
Signed-off-by: Peter Crosthwaite
---
hw/arm/xlnx-zynqmp.c | 19 +++
include/hw/arm/xlnx-zynqmp.h | 2 ++
2 files changed, 21 insertions(+)
diff --git a/hw/arm/xlnx-zynqmp.c b/hw/arm/xlnx-zynqmp.c
index
In preparation for migrating the state struct and type cast macro to a public
header. The acronym "GEM" on it's own is not specific enough to be used in a
more global namespace so preface with "cadence". Fix the capitalisation of
"gem" in the state type while touching the typename. Also preface the
Zynq MPSoC supports external DDR RAM. Add a RAM at 0 to the model.
Signed-off-by: Peter Crosthwaite
---
changed since v1:
Add ram size clamps and warnings
hw/arm/xlnx-ep108.c | 21 +
1 file changed, 21 insertions(+)
diff --git a/hw/arm/xlnx-ep108.c b/hw/arm/xlnx-ep108.c
ind
On 13/03/2015 21:43, Programmingkid wrote:
>> How do you do that in a terminal?
>
> I'm not sure what exactly you're asking. I will say past Apple laptop
> did have the ability to page up or down by using the function key +
> the up or down arrow keys. It looks like Apple removed that ability.
>
On 16.03.2015 15:05, Peter Maydell wrote:
I took the liberty of rewriting the commit message a bit to better
fit in with QEMU's usual style; hope that's OK:
Sure, it is fine :)
-- Mikhail
Add a machine model for the Xilinx ZynqMP SoC EP108 board.
Signed-off-by: Peter Crosthwaite
---
Chaned since v1:
Change board name to ep108
hw/arm/Makefile.objs | 2 +-
hw/arm/xlnx-ep108.c | 52
2 files changed, 53 insertions(+), 1 deletion
On Mon, Mar 16, 2015 at 11:36:43AM +0100, Gerd Hoffmann wrote:
> Simplifies multiseat configuration, see
> docs/multiseat.txt update for details.
>
> Signed-off-by: Gerd Hoffmann
> ---
> docs/multiseat.txt | 19 +++
> docs/specs/pci-ids.txt | 1 +
> hw/pci-br
On 03/10/2015 07:42 PM, Michael S. Tsirkin wrote:
On Tue, Mar 10, 2015 at 06:21:14PM +0200, Marcel Apfelbaum wrote:
On 03/10/2015 05:47 PM, Michael S. Tsirkin wrote:
On Tue, Mar 10, 2015 at 05:32:14PM +0200, Marcel Apfelbaum wrote:
Signed-off-by: Marcel Apfelbaum
---
docs/pci_expander_bridg
On Mon, 2015-03-16 at 09:07 +0800, Chen, Tiejun wrote:
> On 2015/3/13 18:11, Ian Campbell wrote:
> > On Fri, 2015-03-13 at 09:39 +0800, Chen, Tiejun wrote:
> >>> I don't think you can abort here, since a user can set
> >>> b_info->u.hvm.gfx_passthru_kind to default. You would need to
> >>> return a
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