On 18 February 2015 at 04:33, Waldemar Brodkorb wrote:
> I am regulary using qemu with arm.
> Since Linux 3.19 my system no longer boots.
> I am using Qemu 2.2.0 on Linux/amd64.
>
> System is started via:
> qemu-system-arm -nographic -M vexpress-a9 -cpu cortex-a9 -net user
> -net nic,model=lan9118
On Tue, Feb 17, 2015 at 01:36:38PM +1100, Alexey Kardashevskiy wrote:
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> On 02/05/2015 03:49 PM, David Gibson wrote:
> > On Thu, Jan 29, 2015 at 08:27:30PM +1100, Alexey Kardashevskiy wrote:
> >> TCE hypercalls (H_PUT_TCE, H_PUT_TCE_INDIRECT, H_ST
On Tue, Feb 17, 2015 at 11:34:27AM +1100, Alexey Kardashevskiy wrote:
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> On 02/05/2015 03:19 PM, David Gibson wrote:
> > On Thu, Jan 29, 2015 at 08:27:27PM +1100, Alexey Kardashevskiy wrote:
> >> This enables multiple IOMMU groups in one VFIO cont
On Tue, Feb 17, 2015 at 01:14:33PM +1100, Alexey Kardashevskiy wrote:
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> On 02/02/2015 06:04 PM, David Gibson wrote:
> > On Thu, Jan 29, 2015 at 08:27:20PM +1100, Alexey Kardashevskiy
> wrote:
[snip]
> >> +vfio_mem_unregister(container, vaddr,
On Tue, Feb 10, 2015 at 4:45 PM, Peter Crosthwaite
wrote:
> On Wed, Jan 21, 2015 at 5:06 PM, Alistair Francis
> wrote:
>> This patch removes the initialisation of the ARM Cortex-A9
>> in Zynq and instead allows the a9mpcore device to init the
>> CPU. This also updates components that rely on the
On Tue, Feb 10, 2015 at 4:44 PM, Peter Crosthwaite
wrote:
> On Wed, Jan 21, 2015 at 5:06 PM, Alistair Francis
> wrote:
>> This patch adds the Cortex-A9 ARM CPU to the A9MPCore.
>>
>> The CPU is only created if the num-cpu property is set.
>>
>> This patch relies on Stefan Hajnoczi's v3 'virtio-bl
On Mon, Feb 16, 2015 at 12:56:04PM +0100, Kevin Wolf wrote:
> Am 13.02.2015 um 04:45 hat Liu Yuan geschrieben:
> > From: Liu Yuan
> >
> > These functions mix up -1 and -errno in return values and would might cause
> > trouble error handling in the call chain.
> >
> > This patch let them return -
From: Liu Yuan
These functions mix up -1 and -errno in return values and would might cause
trouble error handling in the call chain.
This patch let them return -errno and add some comments.
Cc: qemu-devel@nongnu.org
Cc: Markus Armbruster
Cc: Kevin Wolf
Cc: Stefan Hajnoczi
Reported-by: Markus
This patch removes the initialisation of the ARM Cortex-A9
in Zynq and instead allows the a9mpcore device to init the
CPU. This also updates components that rely on the CPU
and GIC, as they are now initialised in a slightly different
way
Signed-off-by: Alistair Francis
---
V2:
- Reoder the qdev
This patch adds the Cortex-A9 ARM CPU to the A9MPCore.
The CPU is only created if the num-cpu property is set.
This patch allows the midr and reset-cbar properties to be set
Signed-off-by: Alistair Francis
---
V2:
- Rename num_cpus function to match QOM style
- Connect all CPUs to the GIC
Cha
As PCI devices, the i82801b11 and ioh3420 devices could theoretically exist
on any platform with a PCI bus. However in practice, they're Intel
specific devices, that are very unlikely to appear on anything other than
an x86. Therefore this patch gives them their own config options, enabled
only f
A number of ARM embedded boards include EHCI USB host controllers which
appear as directly mapped devices, rather than sitting on a PCI bus.
At present code to emulate such devices is included whenever EHCI support
is included. This patch adjusts teh config options to only include them
in builds
Despite the name, "platform-bus" is used only by PPC E500 targets. This
patch alters the default config to include it in the build only when E500
is enabled.
Signed-off-by: David Gibson
---
hw/core/Makefile.objs | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/core/Makefil
On (Tue) 17 Feb 2015 [09:14:27], Eric Blake wrote:
> On 02/17/2015 07:59 AM, Amit Shah wrote:
> >>>
> >>> So the only comment I have is with the 'pause' name.
> >>>
> >>> 'pause' to me means there's a time period for which a pause has to be
> >>> done; or pausing an activity which is already in pro
On (Tue) 17 Feb 2015 [20:13:25], Dr. David Alan Gilbert wrote:
> * Eric Blake (ebl...@redhat.com) wrote:
> > On 02/17/2015 07:59 AM, Amit Shah wrote:
> > >>>
> > >>> So the only comment I have is with the 'pause' name.
> > >>>
> > >>> 'pause' to me means there's a time period for which a pause has
On Wed, Feb 18, 2015 at 03:59:56PM +1100, David Gibson wrote:
> As PCI devices, the i82801b11 and ioh3420 devices could theoretically exist
> on any platform with a PCI bus. However in practice, they're Intel
> specific devices, that are very unlikely to appear on anything other than
> an x86. Th
> Am 18.02.2015 um 06:28 schrieb David Gibson :
>
> Despite the name, "platform-bus" is used only by PPC E500 targets. This
> patch alters the default config to include it in the build only when E500
> is enabled.
>
> Signed-off-by: David Gibson
It's not e500 specific though. I'm hoping to
On 17/02/2015 22:33, Max Reitz wrote:
> Concurrently modifying the bmap is not a good idea; this patch adds a
> lock for it. See https://bugs.launchpad.net/qemu/+bug/1422307 for what
> can go wrong without.
>
> Signed-off-by: Max Reitz
> ---
> block/vdi.c | 23 ---
> 1 file
On 18/02/2015 06:28, David Gibson wrote:
> Despite the name, "platform-bus" is used only by PPC E500 targets. This
> patch alters the default config to include it in the build only when E500
> is enabled.
>
> Signed-off-by: David Gibson
> ---
> hw/core/Makefile.objs | 2 +-
> 1 file changed,
On 18/02/2015 05:59, David Gibson wrote:
> As PCI devices, the i82801b11 and ioh3420 devices could theoretically exist
> on any platform with a PCI bus. However in practice, they're Intel
> specific devices,
They can be used as a generic PCIe root port and PCIe-to-PCI bridge,
they're not Intel-
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