Refcount structures are placed in clusters randomly selected from all
unallocated host clusters.
Reviewed-by: Stefan Hajnoczi
Signed-off-by: Maria Kustova
---
tests/image-fuzzer/qcow2/layout.py | 138 -
1 file changed, 137 insertions(+), 1 deletion(-)
diff -
Am 19.08.2014 um 14:06 hat Eric Blake geschrieben:
> On 08/19/2014 05:58 AM, Kevin Wolf wrote:
> > Am 18.08.2014 um 13:41 hat Michael Tokarev geschrieben:
> >> Just log to stderr unconditionally, like other similar code does.
> >>
>
> >>
> >> -DLOG(if (stderr == NULL) {
> >> -stderr = fopen(
This patch series was created for the 'block-next' branch and based on the next
series:
[PATCH V3] layout: Reduce number of generator functions in __init__
v0 -> v1 (based on the review of Fam Zheng):
* Fixed typos
* Made calculation of a refcount block size clearer.
Maria Kustova (3):
Reviewed-by: Fam Zheng
Reviewed-by: Stefan Hajnoczi
Signed-off-by: Maria Kustova
---
tests/image-fuzzer/qcow2/fuzz.py | 16 +++-
1 file changed, 15 insertions(+), 1 deletion(-)
diff --git a/tests/image-fuzzer/qcow2/fuzz.py b/tests/image-fuzzer/qcow2/fuzz.py
index 57527f9..5852b4d 1
Reviewed-by: Fam Zheng
Reviewed-by: Stefan Hajnoczi
Signed-off-by: Maria Kustova
---
docs/image-fuzzer.txt | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/docs/image-fuzzer.txt b/docs/image-fuzzer.txt
index 0d0005d..3e23ebe 100644
--- a/docs/image-fuzzer.txt
+++ b/docs/ima
On Mon, Aug 18, 2014 at 04:32:42PM +0800, zhanghailiang wrote:
> On 2014/8/18 14:55, Jason Wang wrote:
> >On 08/18/2014 12:46 PM, zhanghailiang wrote:
> >>diff --git a/net/net.c b/net/net.c
> >>index 6d930ea..21f0d48 100644
> >>--- a/net/net.c
> >>+++ b/net/net.c
> >>@@ -242,6 +242,29 @@ NetClientS
I am running a simple bare metal program with only the above specified
instruction
[Instrn]
fcvt h16 s25
[register values]
SIMD register [25] = 0x9EA82A22AB98FBA8L
FPCR = 0x40ae2f54 [with according mask removing the UFE and other
unnecessary bit]
The FPCR will set the rounding mode to negative i
On Fri, Aug 15, 2014 at 8:07 PM, Hu Tao wrote:
> When using monitor command object_add to add a memory backend file
> but failed to preallocate memory for it, qemu exits silently. In
> the case we'd better give an error message and keep guest running.
>
> The problem can be reproduced as follows:
Peter Maydell writes:
> Convert the socket char backend to the new style QAPI framework;
> this allows it to return an Error ** to callers who might not
> want it to print directly about socket failures.
>
> Signed-off-by: Peter Maydell
> ---
> qemu-char.c | 114
> +
Peter Maydell writes:
> Convert the socket char backend to the new style QAPI framework;
> this allows it to return an Error ** to callers who might not
> want it to print directly about socket failures.
>
> Signed-off-by: Peter Maydell
Forgot to mention: if you should respin, consider changing
On Mon, 18 Aug 2014 22:03:31 +0200
"Michael S. Tsirkin" wrote:
> On Mon, Aug 18, 2014 at 02:05:46PM -0400, Luiz Capitulino wrote:
> > On Sun, 17 Aug 2014 11:45:17 +0200
> > "Michael S. Tsirkin" wrote:
> >
> > > The function monitor_fdset_dup_fd_find_remove() references member of
> > > 'mon_fdse
On Fri, Aug 15, 2014 at 8:07 PM, Hu Tao wrote:
> Report an error when memory < hpagesize in file_ram_alloc() so callers
> can handle the error.
>
> If user adds a memory-backend-file object using object_add command,
> specifying a size that is less than huge page size, qemu will core dump
> with m
Hello,
there seems to be a regression in QEMU 2.1.0 which demonstrates itself
when running the mainline HelenOS Integrator/CP (i.e. ARMv5) image. The
offending instruction seems to be:
vmrs r0, fpsid
Upon its execution, HelenOS kernel receives an Undefined instruction
exception (which it does
On Aug19 11:40, Jason Wang wrote:
> What's the qemu command line for your testing? I try simple command line
> with 3 mq cards in qemu 2.1. Everything works fine.
I'm using readconfig option to read the three vif interfaces.
thanks for testing I will re-triple test to see what's wrong
> Is this a
On 11 August 2014 17:50, Martin Galvan
wrote:
> When calling qemu_system_reset after startup on a Cortex-M CPU, the initial
> values of PC, MSP and the Thumb bit weren't set correctly. In particular,
> since Thumb was 0, an Usage Fault would arise immediately after trying to
> excecute any instruc
From: Gonglei
We need to use qbus's parent and get its name.
Signed-off-by: Gonglei
---
hw/core/qdev.c | 7 +++
include/hw/qdev-core.h | 1 +
2 files changed, 8 insertions(+)
diff --git a/hw/core/qdev.c b/hw/core/qdev.c
index da1ba48..5c49e08 100644
--- a/hw/core/qdev.c
+++ b/hw/c
From: Gonglei
Right now, ARI Forwarding dose not support in QEMU.
According to PCIe spec section 7.3.1, only slot 0 with
the device attached to logic bus representing the link from
downstream ports and root ports.
So, adding check about slot 0 for PCIe downstream ports and
root ports, which avoi
From: Gonglei
Root ports and downstream ports of switches are the hot
pluggable ports in a PCI Express hierarchy.
PCI Express supports chip-to-chip interconnect, a PCIe link can
only connect one pci device/Switch/EndPoint or PCI-bridge.
7.3. Configuration Transaction Rules (PCI Express specifi
On 8 August 2014 14:28, Christoffer Dall wrote:
> The function IDs for PSCI v0.1 are exported by KVM and defined as
> KVM_PSCI_FN_. To build using these defines in non-KVM code,
> QEMU defines these IDs locally and check their correctness against the
> KVM headers when those are available.
>
> Ho
On 8 August 2014 14:28, Christoffer Dall wrote:
> The current code supplies the PSCI v0.1 function IDs in the DT even when
> KVM uses PSCI v0.2.
>
> This will break guest kernels that only support PSCI v0.1 as they will
> use the IDs provided in the DT. Guest kernels with PSCI v0.2 support
> are
Peter Maydell writes:
> Convert the udp char backend to the new style QAPI framework.
>
> Signed-off-by: Peter Maydell
> ---
> qemu-char.c | 69
> +++--
> 1 file changed, 54 insertions(+), 15 deletions(-)
>
> diff --git a/qemu-char.c b/qe
Peter Maydell writes:
> Now that all the char backends have been converted to the QAPI
> framework we can remove the machinery for handling old style
> backends.
>
> Signed-off-by: Peter Maydell
> ---
> include/sysemu/char.h | 1 -
> qemu-char.c | 126
> +++-
From: Greg Ungerer
Fill out the code support for the move to/from usp instructions. They are
being decoded, but there is no code to support there actions. So add it.
Current versions of Linux running on the ColdFire 5208 use these instructions.
Signed-off-by: Greg Ungerer
Reviewed-by: Richard
From: Greg Ungerer
Implement the SIMR and CIMR registers of the 5208 interrupt controller.
These are used by modern versions of Linux running on ColdFire (not sure
of the exact version they were introduced, but they have been in for quite
a while now).
Without this change when attempting to run
On 08/18/14 05:54, Peter Maydell wrote:
Ping for review, anybody? (Also I forgot to cc RTH first time
around, I see.)
thanks
-- PMM
I've been using this for some ARM v8 kprobes testing. As far as I can
tell it's working correctly for this use.
-dl
From: Greg Ungerer
The action to potentially switch sp register is not occurring at the correct
point in the interrupt entry or exception exit sequences.
For the interrupt entry case the sp on entry is used to create the stack
exception frame - but this may well be the user stack pointer, since
Peter Maydell writes:
> This patchset converts the two remaining legacy chardevs
> ('socket' and 'udp') to use the new-style parse/kind
> mechanisms, and removes all the no-longer-required
> legacy machinery.
>
> Patch 1 was posted to the list back in June
> (https://patches.linaro.org/32298/). I
Public bug reported:
--Version: qemu 2.1.0 public release
--OS: CentOS release 6.4
--gcc: 4.4.7
Hi:
I found problems when doing some tests on qemu migration and savevm/loadvm.
On my experiment, a quest is migrated between two same host back and forth.
Source host would sa
Public bug reported:
qemu release 2.1.0
Hi,
I've found a regression on MacOSX guest (10.9.4) after merging the following
commits
18045fb9f457a0f0cba2bd113c748a2dcb4ed39e pc: future-proof
migration-compatibility of ACPI tables
868270f23d8db2cce83e4f082fe75e8625a5fbf9 acpi-build: tweak acpi mig
Some small issues are causing problems with running modern versions of
Linux on the m68k-system ColdFire targets. These 3 patches fix those
problems.
This is a repost of these patches rebased onto the current git tree:
http://lists.nongnu.org/archive/html/qemu-devel/2012-09/msg01954.html
htt
On Tue, Aug 19, 2014 at 10:06 AM, Peter Maydell
wrote:
>
> On 11 August 2014 17:50, Martin Galvan
> wrote:
> > When calling qemu_system_reset after startup on a Cortex-M CPU, the initial
> > values of PC, MSP and the Thumb bit weren't set correctly. In particular,
> > since Thumb was 0, an Usage
Am 18.08.2014 um 22:07 hat Max Reitz geschrieben:
> Specifying the metadata cache sizes in clusters results in less clusters
> (and much less bytes) covered for small cluster sizes and vice versa.
> Using a constant byte size reduces this difference, and makes it
> possible to manually specify the
On 18 August 2014 08:17, Peter Crosthwaite wrote:
> For A9, The cache associativity is 4 and the lines size is 32B.
> Self identify in CCSIDR accordingly. Cache size remains at 16k.
>
> QEMU doesn't emulate caches, but we should still report the correct
> cache-line size to the guest. Some guests
On 19 August 2014 14:59, Peter Maydell wrote:
> Hi. I'm afraid this doesn't build on my ARM board:
>
> /root/qemu/linux-user/syscall.c: In function 'do_open_by_handle_at':
> /root/qemu/linux-user/syscall.c:5475:16: error: 'p' may be used
> uninitialized in this function [-Werror=uninitialized]
>
On 12 August 2014 09:14, Richard W.M. Jones wrote:
> Changes since v7:
>
> - Rebase against current head & retest.
>
> - Don't use `allow_compressed_kernel' boolean, but use arm_feature test
>at point of use instead.
>
> - Added Reviewed-by tags (thanks Peter Crosthwaite).
Thanks; applied
On 18 August 2014 08:45, Peter Crosthwaite wrote:
>
> Hi Peter,
>
> A few trivial cleanup renamings to ARMv7 while auditing code.
>
> Regards,
> Peter
Thanks; applied to target-arm.next.
-- PMM
On Tue, Aug 19, 2014 at 7:41 PM, wrote:
> From: Gonglei
>
> At present, the local variable local_err is reused at multi-places,
> Which will cause resource leak in some scenarios.
>
The problem isn't really the local_err reusage. It's the fact that
this function doesn't have partial cleanup imp
On Tue, Aug 19, 2014 at 7:41 PM, wrote:
> From: Gonglei
>
> If local_err is not null, the next code logic is useless.
>
> Signed-off-by: Gonglei
> ---
> hw/core/qdev.c | 5 +
> 1 file changed, 5 insertions(+)
>
> diff --git a/hw/core/qdev.c b/hw/core/qdev.c
> index da1ba48..3e7085e 100644
Add "hotplug" to the subject line somewhere.
On Tue, Aug 19, 2014 at 7:41 PM, wrote:
> From: Gonglei
>
> It's enough of reporting an error. Assert() is not acceptable
"It's enough to report an error".
Regards,
Peter
> because the error is not a fatal error.
>
> Signed-off-by: Gonglei
> ---
Hi Guys,
On Wed, Aug 13, 2014 at 6:08 PM, Ming Lei wrote:
> This test runs dummy function with coroutine by using
> two enter and one yield since which is a common usage.
>
> So we can see the cost introduced by corouting for running
> one function, for example:
>
> Run operation 2000
Am 18.08.2014 um 22:07 hat Max Reitz geschrieben:
> Currently, the metadata cache size is only tunable on compile time
> through macros. However, some users may want to use the minimal cache
> size (for whatever reason) and others may want to increase the cache
> size because they have enough memor
Il 19/08/2014 15:50, Peter Crosthwaite ha scritto:
> So I'm curious to know if and how this manifested for you as a bug?
> Can you reproduce this as a bug somehow even as a memory leak? as the
> only way I can see local_err getting populated is a fail of:
>
> object_property_add_child(
On 17 August 2014 15:24, Fabian Aggeler wrote:
> This adds a device model for the PrimeXsys System Controller (SP810)
> which is present in the Versatile Express motherboards. It is
> so far read-only but allows to read the SCCTRL register.
>
> Signed-off-by: Fabian Aggeler
> ---
> default-confi
On 19 August 2014 11:42, Paolo Bonzini wrote:
> The following changes since commit 5a7348045091a2bc15d85bb177e5956aa6114e5a:
>
> Update version for v2.1.0-rc2 release (2014-07-15 18:55:37 +0100)
>
> are available in the git repository at:
>
> git://github.com/bonzini/qemu.git tags/for-upstream
Am 13.08.2014 um 12:08 hat Ming Lei geschrieben:
> This test runs dummy function with coroutine by using
> two enter and one yield since which is a common usage.
>
> So we can see the cost introduced by corouting for running
> one function, for example:
>
> Run operation 2000 iterations
Hi,
Can I just check, when you do the incoming migrate, do you wait for the
incoming migrate to finish before you do the loadvm, or do you do the loadvm
during the incoming migrate?
--
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
On 19 August 2014 14:25, Martin Galvan
wrote:
> On Tue, Aug 19, 2014 at 10:06 AM, Peter Maydell
> wrote:
>> I'm afraid this looks like the wrong fix for the problem you're seeing.
>> The bug you need to fix is that the ROM contents got zeroed.
>> The reset code is correct to reload SP and PC from
>> For the index [2*i],[2*i+1], etc is clearly a bug as when i = 1 it will
>> overwrite two of the values. Changing that to [4*i],[4*i+1],etc fixes it.
>>
>> I think you are right on the size. I also wonder if the user doesn't
>> pass in a dtb if qemu should try to recreate the device-tree entry
On 08/19/2014 08:00 AM, Kevin Wolf wrote:
> Am 18.08.2014 um 22:07 hat Max Reitz geschrieben:
>> Currently, the metadata cache size is only tunable on compile time
>> through macros. However, some users may want to use the minimal cache
>> size (for whatever reason) and others may want to increase
The following wiki page contains a list of proposed tasks for the QEMU
block layer:
http://qemu-project.org/Features/Block/Todo
Benoit requested that we make the todo list viewable/editable. This
is a good idea as it helps us focus and see what other developers are
thinking about.
There is no r
On 19.08.14 16:15, Joel Schopp wrote:
>
>>> For the index [2*i],[2*i+1], etc is clearly a bug as when i = 1 it will
>>> overwrite two of the values. Changing that to [4*i],[4*i+1],etc fixes it.
>>>
>>> I think you are right on the size. I also wonder if the user doesn't
>>> pass in a dtb if qe
On Tue, 2014-08-19 at 21:08 +0800, arei.gong...@huawei.com wrote:
> From: Gonglei
Hi,
>
> Right now, ARI Forwarding dose not support in QEMU.
I would replace the above sentence with "ARI Forwarding is not supported".
By the way, there is some support for ARI, I don't know if
is enabled yet. I'l
Am 19.08.2014 um 16:18 hat Eric Blake geschrieben:
> On 08/19/2014 08:00 AM, Kevin Wolf wrote:
> > Am 18.08.2014 um 22:07 hat Max Reitz geschrieben:
> >> Currently, the metadata cache size is only tunable on compile time
> >> through macros. However, some users may want to use the minimal cache
> >
On Sat, Aug 16, 2014 at 12:23:52AM +0800, Amos Kong wrote:
> This reverts commit 57d3e1b3f52d07d215ed96df946ee01f8d9f9526.
>
> The commit introduced a regression bug, the initialization order of virtio-rng
> backend was changed.
>
> # x86_64-softmmu/qemu-system-x86_64 -monitor stdio -vnc :0 \
>
On 19 August 2014 01:48, Peter Crosthwaite wrote:
> It's very useful when debugging SMP to know who disassembly or a CPU
> state dump is being done on behalf of.
>
> Signed-off-by: Peter Crosthwaite
> ---
>
> target-arm/translate-a64.c | 5 +++--
> 1 file changed, 3 insertions(+), 2 deletions(-)
Hi,
I'm trying to trace the execution of an ARM (32 bit) guest, with
qemu-system-arm. v2.1.0
I've enabled the -singlestep and -d exec options.
It seems that some guest instructions are not traced once they have
been traced on the first call, as if the translation blocks were
preventing from traci
On 18 August 2014 10:40, Edgar E. Iglesias wrote:
> From: "Edgar E. Iglesias"
>
> Signed-off-by: Edgar E. Iglesias
> ---
Reviewed-by: Peter Maydell
-- PMM
On Fri, Aug 15, 2014 at 03:18:15PM -0500, Andrew Martin wrote:
> Hello,
>
> I am running several qemu-kvm VM servers on Ubuntu 12.04 with qemu-kvm 1.4.0.
> Most of the guests are also running Ubuntu 12.04. I am using qcow2 disk images
> with the virtio driver in almost all cases, and am storing th
On Tue, 2014-08-19 at 15:18 +0800, arei.gong...@huawei.com wrote:
> From: Gonglei
>
> When 'bsel == ACPI_PCIHP_MAX_HOTPLUG_BUS', the
> s->acpi_pcihp_pci_status[bsel] array will out of bounds.
I would change the commit message to something like
"Prevent out-of-bounds array access on acpi_pcihp_pci
Il 19/08/2014 16:37, Marcel Apfelbaum ha scritto:
>> > +static int pci_check_pcie_port(PCIBus *bus, PCIDevice *dev)
>> > +{
>> > +Object *obj = OBJECT(bus);
>> > +
>> > +if (!strcmp(object_get_typename(obj), TYPE_PCIE_BUS)) {
> Maybe there is another way to check that this is a PCIe bus?
>
On Tue, Aug 19, 2014 at 5:18 PM, wrote:
> From: Gonglei
>
> When 'bsel == ACPI_PCIHP_MAX_HOTPLUG_BUS', the
> s->acpi_pcihp_pci_status[bsel] array will out of bounds.
>
> Add check for this.
>
> Signed-off-by: Gonglei
Reviewed-by: Peter Crosthwaite
> ---
> hw/acpi/pcihp.c | 2 +-
> 1 file ch
On 18 August 2014 10:40, Edgar E. Iglesias wrote:
> From: "Edgar E. Iglesias"
>
> Signed-off-by: Edgar E. Iglesias
> ---
> target-arm/cpu.h| 17 -
> target-arm/helper.c | 35 +--
> 2 files changed, 49 insertions(+), 3 deletions(-)
>
> diff --g
Andreas Färber writes:
> Am 04.08.2014 13:45, schrieb Amit Shah:
>> On (Mon) 04 Aug 2014 [13:33:56], Markus Armbruster wrote:
>>> Amit Shah writes:
>>>
To ensure two virtserialports don't get added to the system with the
same 'name' parameter, we need to access all the ports on all the
On 08/19/2014 04:05 AM, Markus Armbruster wrote:
John Snow writes:
Currently, the drive definitions created by drive_new() when using
the -drive file=...[,if=ide] or -cdrom or -hd[abcd] options are not
picked up by the Q35 initialization routine.
To fix this, we have to add hooks to search f
On Tue, Aug 19, 2014 at 2:57 PM, Markus Armbruster wrote:
> "M.Kustova" writes:
>
>> On Tue, Aug 19, 2014 at 1:44 PM, Fam Zheng wrote:
>>> On Tue, 08/19 02:00, Maria Kustova wrote:
> [...]
diff --git a/tests/image-fuzzer/runner.py b/tests/image-fuzzer/runner.py
index fd97c40..b142577 1
* John Snow (js...@redhat.com) wrote:
> The changes appear to work well, but where I'd like some feedback
> is what should happen if people do something like:
>
> qemu -M q35 -drive if=ide,file=fedora.qcow2
>
> The code as presented here is not going to look for or attempt to
> connect IDE dev
Am 19.08.2014 17:45, schrieb Markus Armbruster:
> Andreas Färber writes:
>
>> Am 04.08.2014 13:45, schrieb Amit Shah:
>>> On (Mon) 04 Aug 2014 [13:33:56], Markus Armbruster wrote:
Amit Shah writes:
> To ensure two virtserialports don't get added to the system with the
> same 'n
On 08/19/2014 12:12 PM, Dr. David Alan Gilbert wrote:
* John Snow (js...@redhat.com) wrote:
The changes appear to work well, but where I'd like some feedback
is what should happen if people do something like:
qemu -M q35 -drive if=ide,file=fedora.qcow2
The code as presented here is not go
On 08/05/2014 05:46 AM, Stefan Hajnoczi wrote:
On Fri, Aug 01, 2014 at 11:38:55AM -0400, John Snow wrote:
This set collects two patches by Marc Marí already on the mailing list,
but goes further by adding a simple memory allocator that allows us to
track and debug freed memory, and optionally
I execute incoming migration command and wait there. Then I do loadvm.
After finishing loadvm, type migration command on source host to start
migration.
In fact, This action is useless for vm status before migration. I just
modify some codes and then found this bug.
--
You received this bug noti
Hi Peter,
On 08/18/2014 08:54 PM, Peter Crosthwaite wrote:
> Linux should boot in EL2 or EL1. If in EL3, jump down before handing
> off to Linux.
>
> Signed-off-by: Peter Crosthwaite
> ---
>
> hw/arm/boot.c | 21 +
> 1 file changed, 21 insertions(+)
>
> diff --git a/hw/arm
On Mon, Aug 18, 2014 at 06:29:42PM +0200, Michal Privoznik wrote:
> On 18.08.2014 17:28, Eric Blake wrote:
> >On 08/14/2014 02:24 AM, Michal Privoznik wrote:
> >>https://bugzilla.redhat.com/show_bug.cgi?id=1103245
> >>
> >>An advice appeared there on the qemu-devel list [1]. When a domain is
> >>su
On 08/19/2014 10:57 AM, Marcelo Tosatti wrote:
>
> rtc-reset-reinjection has been introduced because certain Windows
> versions will advance the guest system time (via rtc interrupt
> reinjection).
>
> So if libvirt adjusts the guest system time via guest-set-time,
> allowing rtc interrupt reinj
On Tue, Aug 19, 2014 at 11:00:26AM -0600, Eric Blake wrote:
> On 08/19/2014 10:57 AM, Marcelo Tosatti wrote:
> >
> > rtc-reset-reinjection has been introduced because certain Windows
> > versions will advance the guest system time (via rtc interrupt
> > reinjection).
> >
> > So if libvirt adjusts
We need to filter out driver-specific options in the "Formatting..."
string printed by qemu when creating the backup image.
Reported-by: Peter Wu
Signed-off-by: Kevin Wolf
---
tests/qemu-iotests/028 | 1 +
tests/qemu-iotests/028.out | 3 ++-
tests/qemu-iotests/common.filter |
On Tuesday 19 August 2014 19:33:55 Kevin Wolf wrote:
> We need to filter out driver-specific options in the "Formatting..."
> string printed by qemu when creating the backup image.
>
> Reported-by: Peter Wu
> Signed-off-by: Kevin Wolf
Tested-by: Peter Wu
It works (./check -qed 028), thanks!
-
John Snow writes:
> On 08/19/2014 04:05 AM, Markus Armbruster wrote:
>> John Snow writes:
>>
>>> Currently, the drive definitions created by drive_new() when using
>>> the -drive file=...[,if=ide] or -cdrom or -hd[abcd] options are not
>>> picked up by the Q35 initialization routine.
>>>
>>> To
From: Peter Crosthwaite
For A9, The cache associativity is 4 and the lines size is 32B.
Self identify in CCSIDR accordingly. Cache size remains at 16k.
QEMU doesn't emulate caches, but we should still report the correct
cache-line size to the guest. Some guests (like u-boot) complain if
the cach
From: "Richard W.M. Jones"
As the name suggests this lets you load a ROM/disk image that is
gzipped. It is uncompressed before storing it in guest memory.
Signed-off-by: Richard W.M. Jones
Reviewed-by: Alex Bennée
Reviewed-by: Peter Crosthwaite
Reviewed-by: Alex Bennée
Message-id: 140783125
to staging
(2014-08-19 13:00:57 +0100)
are available in the git repository at:
git://git.linaro.org/people/pmaydell/qemu-arm.git
tags/pull-target-arm-20140819
for you to fetch changes up to 14a906f755f77b325666d67e071c572478d06067:
arm: stellaris: Remove misleading address_space_mem var (201
Now that all the new code to support single-stepping is in
place, wire up the guest-visible MDSCR_EL1, so the guest
can enable single-stepping.
Signed-off-by: Peter Maydell
Reviewed-by: Edgar E. Iglesias
---
target-arm/helper.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --gi
From: Peter Crosthwaite
This argument is a MemoryRegion and not an AddressSpace.
"Address space" means something quite different to "memory region"
in QEMU parlance so rename the variable to reduce confusion.
Signed-off-by: Peter Crosthwaite
Message-id:
f666cf7f2318d9b461b1e320a45bf0d82da9b7d
From: Christoffer Dall
The function IDs for PSCI v0.1 are exported by KVM and defined as
KVM_PSCI_FN_. To build using these defines in non-KVM code,
QEMU defines these IDs locally and check their correctness against the
KVM headers when those are available.
However, the naming scheme used for Q
ARMv8 single-stepping requires the exception level that controls
the single-stepping to be in AArch64 execution state, but the
code being stepped may be in AArch64 or AArch32. Implement the
necessary support code for single-stepping AArch32 code.
Signed-off-by: Peter Maydell
Reviewed-by: Edgar E.
Set the PSTATE.SS bit correctly on exception returns from AArch64,
as required by the debug single-step functionality.
Signed-off-by: Peter Maydell
Reviewed-by: Edgar E. Iglesias
---
target-arm/cpu.h | 61 ++
target-arm/op_helper.c | 20
From: "Richard W.M. Jones"
On aarch64 it is the bootloader's job to uncompress the kernel. UEFI
and u-boot bootloaders do this automatically when the kernel is
gzip-compressed.
However the qemu -kernel option does not do this. The following
command does not work:
qemu-system-aarch64 [...] -
Implement ARMv8 software single-step handling for A64 code:
correctly update the single-step state machine and generate
debug exceptions when stepping A64 code.
This patch has no behavioural change since MDSCR_EL1.SS can't
be set by the guest yet.
Signed-off-by: Peter Maydell
Reviewed-by: Edgar
If gen_goto_tb() decides not to link the two TBs, then the
fallback path generates unnecessary code:
* if singlestep is enabled then we generate unreachable code
after the gen_exception_internal(EXCP_DEBUG)
* if singlestep is disabled then we will generate exit_tb(0)
twice, once in gen_goto
From: Peter Crosthwaite
It's a MemoryRegion and not an AddressSpace. But since it's single use,
just inline the get_system_memory() call to the only usage to remove it.
Signed-off-by: Peter Crosthwaite
Message-id:
d6914047e10b956514cfaa5f391ef56c7d851b34.1408347860.git.peter.crosthwa...@xilinx
From: Christoffer Dall
The current code supplies the PSCI v0.1 function IDs in the DT even when
KVM uses PSCI v0.2.
This will break guest kernels that only support PSCI v0.1 as they will
use the IDs provided in the DT. Guest kernels with PSCI v0.2 support
are not affected by this patch, because
The CPSR has a new-in-v8 execution state bit (IL), and
also some state which has effects in AArch32 but appears
only in the SPSR format (SS) but is RES0 in the CPSR.
Add the IL bit to CPSR_EXEC, and enforce that guest direct
reads and writes to CPSR can't read or write the RES0
bits, so the guest
Bring the 32 bit and 64 bit views of the debug registers into
line by providing the same set of registers in both cases.
(This still isn't a complete set, but it is consistent.)
Signed-off-by: Peter Maydell
Reviewed-by: Edgar E. Iglesias
---
target-arm/helper.c | 34
When an exception is taken to AArch32, we must clear the PSTATE.SS
bit for the exception handler, and must also ensure that the SS bit
is not set in the value saved to SPSR_. Achieve both of these
aims by clearing the bit in uncached_cpsr before saving it to the SPSR.
Signed-off-by: Peter Maydell
Allow each CPU type to specify the value for the debug ID
registers, by putting them in the ARMCPU struct, and use
the resulting information to only expose the correct number
of watchpoint and breakpoint registers for the CPU.
Signed-off-by: Peter Maydell
Reviewed-by: Edgar E. Iglesias
---
targ
Currently the STATE_BOTH shorthand for allowing a single reginfo struct
to define handling for both AArch32 and AArch64 views of a register
only permits this where the AArch32 view is in cp15. It turns out that
the debug registers in cp14 also have neatly lined up encodings;
allow these also to sha
When we take an exception resulting from a BRK instruction,
the architecture requires that the "preferred return address"
reported to the exception handler is the address of the BRK
itself, not the following instruction (like undefined
insns, and in contrast with SVC, HVC and SMC). Follow this,
rat
At the moment we have a mixed set of mostly dummy register
definitions for various debug related registers which have
been added piecemeal in order to get Linux kernels to boot.
In preparation for actually implementing debug support,
bring them all together into one place.
This commit doesn't chan
On Tue, Aug 19, 2014 at 11:16 AM, Peter Maydell
wrote:
> On 19 August 2014 14:25, Martin Galvan
> wrote:
>> On Tue, Aug 19, 2014 at 10:06 AM, Peter Maydell
>> wrote:
>>> I'm afraid this looks like the wrong fix for the problem you're seeing.
>>> The bug you need to fix is that the ROM contents g
On 19 August 2014 11:43, Paolo Bonzini wrote:
> From: Peter Crosthwaite
>
> Rather than having the name as separate state. This prepares support
> for creating a MemoryRegion dynamically (i.e. without
> memory_region_init() and friends) and the MemoryRegion still getting
> a usable name.
>
> Sign
Although it is possible to specify the wwn
property for cdrom devices on the command line,
the underlying driver fails to relay this information
to the guest operating system via IDENTIFY.
This is a simple patch to correct that.
See ATA8-ACS, Table 22 parts 5, 6, and 9.
Signed-off-by: John Snow
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