From: Jan Kiszka
According to ICH9 spec, the MSI capability is located at 0x60. This is
important for guest drivers that do not parse the capability chain and
use absolute addresses instead.
Signed-off-by: Jan Kiszka
---
hw/audio/intel-hda.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-
From: Jan Kiszka
The spec says (and real HW confirms this) that, if the bus master bit
is 0, the device will not generate any PCI accesses. MSI and MSI-X
messages fall among these, so we should use the corresponding address
space to deliver them. This will prevent delivery if bus master support
i
Hi,
These patches are intended to introduce Intel IOMMU (VT-d) emulation to q35
chipset. The major job in these patches is to add support for emulating Intel
IOMMU according to the VT-d specification, including basic responses to CSRs
accesses, the logic of DMAR (DMA remapping) and DMA memory addr
Add support for emulating Intel IOMMU according to the VT-d specification for
the q35 chipset machine. Implement the logic for DMAR (DMA remapping) without
PASID support. Use register-based invalidation for context-cache invalidation
and IOTLB invalidation.
Basic fault reporting and caching are not
Expose Intel IOMMU to the BIOS. If object of TYPE_INTEL_IOMMU_DEVICE exists,
add DMAR table to ACPI RSDT table. For now the DMAR table indicates that there
is only one hardware unit without INTR_REMAP capability on the platform.
Signed-off-by: Le Tan
---
hw/i386/acpi-build.c | 41 +++
Add Intel IOMMU emulation to q35 chipset and expose it to the guest.
1. Add a machine option. Users can use "-machine iommu=on|off" in the command
line to enable/disable Intel IOMMU. The default is off.
2. Accroding to the machine option, q35 will initialize the Intel IOMMU and
use pci_setup_iommu(
On 22 Jul 2014, at 19:43, Alex Bligh wrote:
> I have not (yet) brought forward the qxl rom size (and possibly
> video ram) changes in Cole's patches as I'd prefer an assessment
> of whether this is the right approach first.
Whilst vga=cirrus, and vga=none I appear to be able to get to work,
I s
Hi Alex,
+ quintela, mst, libvirt
Am 22.07.2014 20:43, schrieb Alex Bligh:
> Add a machine type pc-1.0-qemu-kvm for live migrate compatibility
> with qemu-kvm version 1.0.
>
> Signed-off-by: Alex Bligh
> ---
> hw/acpi/piix4.c | 49
> --
>
Andreas,
On 27 Jul 2014, at 15:10, Andreas Färber wrote:
> Hi Alex,
>
> + quintela, mst, libvirt
Thanks for your comments!
> This sounds like a really cool feature that SUSE would probably be
> interested in extending back to 0.14 and 0.15, but I see a fundamental
> flaw: libvirt on those old
On 22 Jul 2014, at 19:43, Alex Bligh wrote:
> Testing has been light to date (i.e.
> can I migrate it inbound with -S without anything complaining).
I've given this quite a bit more testing today.
It works fine qemu-kvm 1.0 -> qemu-2.0+patch (cirrus vga)
It works fine qemu-2.0+patch -> qemu-2.
> -Original Message-
> From: 陈梁 [mailto:chenliang0...@icloud.com]
> Sent: Sunday, July 27, 2014 11:51 AM
> Subject: Re: [Qemu-devel] [PATCH v3 1/7] bootindex: add
> modify_boot_device_path function
>
> Hi
> > +if (bootindex >= 0) {
> > +node = g_malloc0(sizeof(FWBootEntry));
>
Hello,
I need to optimize a Linux program running under qemu-system-i386. qemu is
compiled with KVM support. File /proc/cpuinfo in the guest shows that SSE2
is supported.
If SSE2 is backed with host hardware, using SSE2 may improve my program's
performance significantly. The host is x86_64 Linux.
Hi,
Should be easy to fix though. Does the following help?
(Cc'ing Stefan & Kevin)
-->
xen_disk: fix possible null-ptr dereference
Signed-off-by: Gonglei
---
hw/block/xen_disk.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/hw/block/xen_disk.c b/hw/block/xen_disk.c
index aed5b5b..a221d0b
On 07/24/2014 11:15 PM, Alexander Graf wrote:
>
> On 18.07.14 06:31, cyril...@gmail.com wrote:
>> It may prove useful know which Linux distribution version the host machine
>> is running when an issue in the guest arises but a user cannot access
>> the host.
>>
>> Signed-off-by: Cyril Bur
>> ---
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