On Tue, Jun 24, 2014 at 02:32:46PM -0700, Richard Henderson wrote:
> On 06/24/2014 02:24 PM, Al Viro wrote:
> > Al, off to figure out the black magic TCG is using to generate calls...
>
> If you've a helper
>
> DEF_HELPER_1(halt, void, i64)
>
> then
>
> gen_helper_halt(...)
>
> will generate
Il 25/06/2014 08:06, Stefan Weil ha scritto:
Am 18.06.2014 08:43, schrieb Paolo Bonzini:
This will let threads other than the I/O thread raise QMP events.
GIOChannel is thread-safe, and send and receive state is usually
well-separated. The only driver that requires some care is the
pty driver,
On Wed, Jun 25, 2014 at 10:17:19AM +0800, Tiejun Chen wrote:
> Some registers of Intel IGD are mapped in host bridge, so it needs to
> passthrough these registers of physical host bridge to guest because
> emulated host bridge in guest doesn't have these mappings.
>
> The original patch is from We
Otherwise, Windows fails with a deadlock.
Reported-by: Stefan Weil
Signed-off-by: Paolo Bonzini
---
qemu-char.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/qemu-char.c b/qemu-char.c
index 2e50a10..17bd360 100644
--- a/qemu-char.c
+++ b/qemu-char.c
@@ -94,6 +94,7 @@ static QTAILQ_HEAD(Ch
On Wed, Jun 25, 2014 at 10:17:21AM +0800, Tiejun Chen wrote:
> The OpRegion shouldn't be mapped 1:1 because the address in the host
> can't be used in the guest directly.
>
> This patch traps read and write access to the opregion of the Intel
> GPU config space (offset 0xfc).
>
> The original pat
On Wed, Jun 25, 2014 at 08:19:19AM +0200, Paolo Bonzini wrote:
> Il 25/06/2014 04:17, Tiejun Chen ha scritto:
> >* Don't set that ISA class property, instead, just fake this ISA bridge
> > with 00:1f.0.
>
> How are you going to make this work for Q35 or another PCIe machine that
> already has an
I applied the patch manually on qemu releases 1.7.1 and 2.0.0.
Configuration
* Host system is Lenovo ThinkPad T520 (windows 7)
* qemu built with --disable-sdl and --disable-gtk
* GCC version is 4.6.1 (MinGW win32)
Test (same steps/results for both 1.7.1 and 2.0.0)
* Created qcow2 disk image usi
On Wed, Jun 25, 2014 at 09:46:40AM +0300, Marcel Apfelbaum wrote:
> On Wed, 2014-06-25 at 08:20 +0300, Michael S. Tsirkin wrote:
> > On Tue, Jun 24, 2014 at 03:02:03PM -0300, Eduardo Habkost wrote:
> > > The QEMU_COMPAT_* macros will contain compat properties that are not
> > > specific to PC, and
On Wed, 2014-06-25 at 10:18 +0300, Michael S. Tsirkin wrote:
> On Wed, Jun 25, 2014 at 09:46:40AM +0300, Marcel Apfelbaum wrote:
> > On Wed, 2014-06-25 at 08:20 +0300, Michael S. Tsirkin wrote:
> > > On Tue, Jun 24, 2014 at 03:02:03PM -0300, Eduardo Habkost wrote:
> > > > The QEMU_COMPAT_* macros w
On Tue, Jun 24, 2014 at 03:02:00PM -0300, Eduardo Habkost wrote:
> This series is an attempt to make the compat_props lists from the PC code
> reusable by other machine-types. All the compat bits that are on those lists
> are
> not tied to a specific machine-type, but instead to the device code th
On 2014/6/25 14:48, Paolo Bonzini wrote:
Il 22/06/2014 10:25, Chen, Tiejun ha scritto:
In qemu-upstream, as you commented we can't create this as a ISA class
type explicitly.
Note I didn't say that QEMU doesn't like having two ISA bridges.
I commented that the firmware will see two ISA bridge
On 2014/6/25 14:19, Paolo Bonzini wrote:
Il 25/06/2014 04:17, Tiejun Chen ha scritto:
* Don't set that ISA class property, instead, just fake this ISA bridge
with 00:1f.0.
How are you going to make this work for Q35 or another PCIe machine that
already has an ISA bridge at 00:1f.0?
Could
On Wed, Jun 25, 2014 at 03:35:51PM +0800, Chen, Tiejun wrote:
> On 2014/6/25 14:19, Paolo Bonzini wrote:
> >Il 25/06/2014 04:17, Tiejun Chen ha scritto:
> >>* Don't set that ISA class property, instead, just fake this ISA bridge
> >> with 00:1f.0.
> >
> >How are you going to make this work for Q35
At the moment QEMU knows about one version of POWER8 CPU with
PVR 0x4B.. This CPU class is defined as "POWER8". The linux
kernel names it as "POWER8E" which is different from the name QEMU uses.
Now we get another version of POWER8 which is architecturally equivalent
to POWER8E but has differe
Il 25/06/2014 09:35, Chen, Tiejun ha scritto:
How are you going to make this work for Q35 or another PCIe machine that
already has an ISA bridge at 00:1f.0?
Could we simply pass the vendor/device ids of the host ISA bridge here?
No, because the firmware then would not recognize the host ISA
On 2014/6/25 14:21, Paolo Bonzini wrote:
Il 25/06/2014 04:17, Tiejun Chen ha scritto:
+static int get_vgabios(unsigned char *buf, XenHostPCIDevice *dev)
+{
+char rom_file[64];
+FILE *fp;
+uint8_t val;
+struct stat st;
+uint16_t magic = 0;
+int ret = 0;
+
+snprintf(r
On 2014/6/25 14:22, Paolo Bonzini wrote:
Il 25/06/2014 04:17, Tiejun Chen ha scritto:
+static int create_pseudo_pch_isa_bridge(PCIBus *bus, XenHostPCIDevice
*hdev)
+{
+struct PCIDevice *dev;
+
+char rid;
+
+/* We havt to use a simple PCI device to fake this ISA bridge
+ * to avoi
On 2014/6/25 14:25, Paolo Bonzini wrote:
Il 25/06/2014 04:17, Tiejun Chen ha scritto:
+int pci_create_pch(PCIBus *bus)
+{
+XenHostPCIDevice hdev;
+int r = 0;
+
+if (!xen_has_gfx_passthru) {
+return r;
+}
+
You could make this an assertion, since the function is never ca
Il 25/06/2014 09:34, Chen, Tiejun ha scritto:
On 2014/6/25 14:48, Paolo Bonzini wrote:
Second problem. Your IGD passthrough code currently works with QEMU's
PIIX4-based machine. But what happens if you try to extend it, so that
Yes, current xen machine, xenpv, is based on pii4, and also I do
Il 25/06/2014 09:15, Michael S. Tsirkin ha scritto:
Maybe it just works?
Is tweaking vendor/device/revision id to match host really necessary?
Yes, the driver inspects the fields and tweaks its behavior according to
them. It also pokes at configuration space of the host bridge. It's
quite d
Signed-off-by: Igor Mammedov
---
qemu-char.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/qemu-char.c b/qemu-char.c
index 2e50a10..f6bdf2f 100644
--- a/qemu-char.c
+++ b/qemu-char.c
@@ -132,7 +132,7 @@ int qemu_chr_fe_write(CharDriverState *s, const uint8_t
*buf, int
On Tue, Jun 24, 2014 at 06:55:11PM -0300, Marcelo Tosatti wrote:
>
> It is necessary to reset RTC interrupt reinjection backlog if
> guest time is synchronized via a different mechanism, such as
> QGA's guest-set-time command.
>
> Failing to do so causes both corrections to be applied (summed),
>
On 2014/6/25 14:45, Michael S. Tsirkin wrote:
On Wed, Jun 25, 2014 at 10:17:18AM +0800, Tiejun Chen wrote:
ISA bridge is needed since Intel gfx drive will probe with Dev31:Fun0
to make graphics device passthrough work well for VMM, that only need
to expose this pseudo ISA bridge to let driver kn
In multiple places there is a node0_size variable calculation
which assumes that NUMA node #0 and memory node #0 are the same
things which they are not. Since we are going to change it and
do not want to change it in multiple places, let's make a helper.
This adds a spapr_node0_size() helper and m
24.06.2014 22:54, Riku Voipio wrote:
> On Tue, Jun 24, 2014 at 07:58:36PM +0400, Michael Tokarev wrote:
>> 20.06.2014 15:13, Hunter Laux wrote:
>>> OABI arm used a software interrupt(0xef9f0001) for breakpoints.
>>> Since 2005 gdb has used the break instruction(0xe7f001f0) for EABI.
>>> Apparently
From: KONRAD Frederic
This makes qemu_savevm_state public for reverse-execution.
Signed-off-by: KONRAD Frederic
Reviewed-by: Amit Shah
---
include/sysemu/sysemu.h | 1 +
savevm.c| 2 +-
2 files changed, 2 insertions(+), 1 deletion(-)
diff --git a/include/sysemu/sysemu.h b/inc
From: KONRAD Frederic
Hi everybody,
This is the fourth version of this RFC (see the changes below).
Those are the two first patch-set we have been worked on for reverse execution.
The first part is fully reviewed except the "icount: introduce icount timer"
patch maybe we can merge them?
The f
From: KONRAD Frederic
Notify events on icount clock when CPU loop exits.
Signed-off-by: KONRAD Frederic
Reviewed-by: Paolo Bonzini
---
cpus.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/cpus.c b/cpus.c
index 7f99d5e..76de504 100644
--- a/cpus.c
+++ b/cpus.c
@@ -993,6 +993,11 @@ s
From: KONRAD Frederic
This puts qemu_icount and qemu_icount_bias into TimerState structure to allow
them to be migrated.
Signed-off-by: KONRAD Frederic
Reviewed-by: Paolo Bonzini
---
cpus.c | 29 -
1 file changed, 16 insertions(+), 13 deletions(-)
diff --git a/cpu
From: KONRAD Frederic
This fixes a bug where qemu_icount and qemu_icount_bias are not migrated.
It adds a subsection "timer/icount" to vmstate_timers so icount is migrated only
when needed.
Signed-off-by: KONRAD Frederic
Reviewed-by: Amit Shah
---
cpus.c | 28
1 f
From: KONRAD Frederic
This takes icount clock in account for icount extra computation so icount
clock's timers will be triggered at the exact time.
Signed-off-by: KONRAD Frederic
Reviewed-by: Paolo Bonzini
---
cpus.c | 10 ++
1 file changed, 10 insertions(+)
diff --git a/cpus.c b/cpu
From: KONRAD Frederic
This introduces a new timer based only on instruction counter and without any
compensation.
Signed-off-by: KONRAD Frederic
---
cpus.c | 19 ---
include/qemu/timer.h | 9 -
qemu-timer.c | 8 +++-
stubs/cpu-get-icoun
From: KONRAD Frederic
This allows QEMU to trigger a debug exception when cexe_dbg_requested
is set.
Signed-off-by: KONRAD Frederic
---
cpu-exec.c | 13 +
1 file changed, 13 insertions(+)
diff --git a/cpu-exec.c b/cpu-exec.c
index 38e5f02..c92cfd1 100644
--- a/cpu-exec.c
+++ b/cpu-
From: KONRAD Frederic
This introduces the basic reverse-execution mechanism.
Signed-off-by: KONRAD Frederic
---
Makefile.target | 1 +
cpus.c | 6 +
include/reverse-execution.h | 41 ++
reverse-execution.c | 306
From: KONRAD Frederic
This adds cpu_icount_to_ns function which is needed for reverse execution.
It returns the time for a specific instruction.
Signed-off-by: KONRAD Frederic
Reviewed-by: Paolo Bonzini
---
cpus.c | 9 +++--
include/qemu/timer.h | 1 +
2 files changed, 8 in
From: KONRAD Frederic
We don't want to warp on host clock as it is not deterministic for replay.
So this patch warp icount on the next QEMU_VIRTUAL_CLOCK event if reverse
execution is enabled.
The normal behaviour is kept when reverse execution is disabled.
Signed-off-by: KONRAD Frederic
---
From: KONRAD Frederic
This adds some trace-events for reverse execution.
Signed-off-by: KONRAD Frederic
---
trace-events | 6 ++
1 file changed, 6 insertions(+)
diff --git a/trace-events b/trace-events
index ba01ad5..c1423e0 100644
--- a/trace-events
+++ b/trace-events
@@ -1292,3 +1292,9
From: KONRAD Frederic
This creates QEMU options for reverse execution.
Signed-off-by: KONRAD Frederic
---
qemu-options.hx | 9 +
vl.c| 16
2 files changed, 25 insertions(+)
diff --git a/qemu-options.hx b/qemu-options.hx
index ff76ad4..2afb85d 100644
--- a
From: KONRAD Frederic
This allows gdb to reverse step QEMU: reverse-stepi and reverse-cont commands
are allowed.
When step_backward is called, QEMU restores a snapshot before the actual
instruction and stops (with a debug exit) when the previous instruction is
reached.
Signed-off-by: KONRAD Fre
Am 25.06.2014 um 00:05 hat Peter Lieven geschrieben:
> upcoming libnfs will feature internal readahead support.
> Add a knob to pass the optional readahead value as a URL
> parameter.
>
> This series fixes also the incorrect usage of strncmp and
> atoi.
Thanks, applied to the block branch.
Kevin
On Wed, Jun 25, 2014 at 04:10:44PM +0800, Chen, Tiejun wrote:
> On 2014/6/25 14:45, Michael S. Tsirkin wrote:
> >On Wed, Jun 25, 2014 at 10:17:18AM +0800, Tiejun Chen wrote:
> >>ISA bridge is needed since Intel gfx drive will probe with Dev31:Fun0
> >>to make graphics device passthrough work well f
On Wed, Jun 25, 2014 at 09:44:14AM +0200, Paolo Bonzini wrote:
> Il 25/06/2014 09:35, Chen, Tiejun ha scritto:
> >>How are you going to make this work for Q35 or another PCIe machine that
> >>already has an ISA bridge at 00:1f.0?
> >>
> >
> >Could we simply pass the vendor/device ids of the host IS
On 2014/6/25 16:28, Michael S. Tsirkin wrote:
On Wed, Jun 25, 2014 at 04:10:44PM +0800, Chen, Tiejun wrote:
On 2014/6/25 14:45, Michael S. Tsirkin wrote:
On Wed, Jun 25, 2014 at 10:17:18AM +0800, Tiejun Chen wrote:
ISA bridge is needed since Intel gfx drive will probe with Dev31:Fun0
to make g
Il 25/06/2014 10:31, Michael S. Tsirkin ha scritto:
It might be possible to move the Q35 bridge elsewhere.
seabios doesn't care where the host bridge is.
ACPI tables in QEMU can be adjusted.
But why? It's always in 00:1f.0 on real hardware. If the i915 driver
wants to run under virtual machi
On Wed, Jun 25, 2014 at 04:39:07PM +0800, Chen, Tiejun wrote:
> >In fact it's exactly what passthrough does.
> >I wonder if more bits from ./hw/i386/kvm/pci-assign.c
> >can be reused. How do you poke at the host device? sysfs?
>
> Yes, sysfs.
>
> Thanks
> Tiejun
Then you should be able to re-use
On Wed, Jun 25, 2014 at 10:39:43AM +0200, Paolo Bonzini wrote:
> Il 25/06/2014 10:31, Michael S. Tsirkin ha scritto:
> >It might be possible to move the Q35 bridge elsewhere.
> >seabios doesn't care where the host bridge is.
> >ACPI tables in QEMU can be adjusted.
>
> But why? It's always in 00:1
On 2014/6/25 16:43, Michael S. Tsirkin wrote:
On Wed, Jun 25, 2014 at 04:39:07PM +0800, Chen, Tiejun wrote:
In fact it's exactly what passthrough does.
I wonder if more bits from ./hw/i386/kvm/pci-assign.c
can be reused. How do you poke at the host device? sysfs?
Yes, sysfs.
Thanks
Tiejun
T
When running a libvirt test suite I've noticed the qemu-img is
crashing occasionally. Tracing the problem down led me to the
following valgrind output:
qemu.git $ valgrind -q ./qemu-img create -f qed
-obacking_file=/dev/null,backing_fmt=raw qed
==14881== Invalid write of size 8
==14881==at 0x
On 2014/6/25 16:48, Michael S. Tsirkin wrote:
On Wed, Jun 25, 2014 at 10:39:43AM +0200, Paolo Bonzini wrote:
Il 25/06/2014 10:31, Michael S. Tsirkin ha scritto:
It might be possible to move the Q35 bridge elsewhere.
seabios doesn't care where the host bridge is.
ACPI tables in QEMU can be adjus
If pc-dimm is specified on qemu command line, but only with
-m size (aka not -m size,maxmem,slots) then qemu will core dump.
This patch fixes the problem.
Signed-off-by: Hu Tao
---
hw/i386/pc.c | 5 +
hw/mem/pc-dimm.c | 5 +
2 files changed, 10 insertions(+)
diff --git a/hw/i386/pc
On Wed, Jun 25, 2014 at 04:48:02PM +0800, Chen, Tiejun wrote:
> On 2014/6/25 16:43, Michael S. Tsirkin wrote:
> >On Wed, Jun 25, 2014 at 04:39:07PM +0800, Chen, Tiejun wrote:
> >>>In fact it's exactly what passthrough does.
> >>>I wonder if more bits from ./hw/i386/kvm/pci-assign.c
> >>>can be reus
..to prevent one memory backend from being used by more than one numa
node.
Signed-off-by: Hu Tao
---
numa.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/numa.c b/numa.c
index e471afe..6c1c554 100644
--- a/numa.c
+++ b/numa.c
@@ -279,6 +279,13 @@ void memory_region_allocate_system_
On 2014/6/25 14:35, Michael S. Tsirkin wrote:
On Wed, Jun 25, 2014 at 10:17:17AM +0800, Tiejun Chen wrote:
basic gfx passthrough support:
- add a vga type for gfx passthrough
- retrieve VGA bios from sysfs, then load it to guest at 0xC
- register/unregister legacy VGA I/O ports and MMIOs for
Igor Mammedov writes:
> Signed-off-by: Igor Mammedov
Broken in commit 9005b2a (author cc'ed). Bites only when passed zero
len, which seems unlikely.
Reviewed-by: Markus Armbruster
On Wed, Jun 25, 2014 at 04:55:25PM +0800, Chen, Tiejun wrote:
> On 2014/6/25 16:48, Michael S. Tsirkin wrote:
> >On Wed, Jun 25, 2014 at 10:39:43AM +0200, Paolo Bonzini wrote:
> >>Il 25/06/2014 10:31, Michael S. Tsirkin ha scritto:
> >>>It might be possible to move the Q35 bridge elsewhere.
> >>>se
On 2014/6/25 17:04, Michael S. Tsirkin wrote:
On Wed, Jun 25, 2014 at 04:48:02PM +0800, Chen, Tiejun wrote:
On 2014/6/25 16:43, Michael S. Tsirkin wrote:
On Wed, Jun 25, 2014 at 04:39:07PM +0800, Chen, Tiejun wrote:
In fact it's exactly what passthrough does.
I wonder if more bits from ./hw/i3
On Wed, Jun 25, 2014 at 05:01:04PM +0800, Hu Tao wrote:
> If pc-dimm is specified on qemu command line, but only with
> -m size (aka not -m size,maxmem,slots) then qemu will core dump.
>
> This patch fixes the problem.
>
> Signed-off-by: Hu Tao
> ---
> hw/i386/pc.c | 5 +
> hw/mem/pc-di
On 25 June 2014 05:08, Hunter Laux wrote:
> This instruction space is guaranteed to be undefined.
> ARM: 0111
> Thumb: 1101 1110
>
> The breakpoint instructions were selected from this instruction space.
> Linux traps the illegal instruction and sends
On 2014/6/25 17:09, Michael S. Tsirkin wrote:
On Wed, Jun 25, 2014 at 04:55:25PM +0800, Chen, Tiejun wrote:
On 2014/6/25 16:48, Michael S. Tsirkin wrote:
On Wed, Jun 25, 2014 at 10:39:43AM +0200, Paolo Bonzini wrote:
Il 25/06/2014 10:31, Michael S. Tsirkin ha scritto:
It might be possible to
On Wed, Jun 25, 2014 at 05:14:30PM +0800, Chen, Tiejun wrote:
> On 2014/6/25 17:04, Michael S. Tsirkin wrote:
> >On Wed, Jun 25, 2014 at 04:48:02PM +0800, Chen, Tiejun wrote:
> >>On 2014/6/25 16:43, Michael S. Tsirkin wrote:
> >>>On Wed, Jun 25, 2014 at 04:39:07PM +0800, Chen, Tiejun wrote:
> >
On Wed, Jun 18, 2014 at 7:58 PM, Stefan Hajnoczi wrote:
> object_initialize() leaves the object with a refcount of 1.
> object_property_add_child() adds its own reference which is dropped
> again when the property is deleted.
>
> The upshot of this is that we always have a refcount >= 1. Upon hot
On 25 June 2014 08:01, Al Viro wrote:
> Could we steal bit 1 in float_exception_flags for IOV? It is (currently?)
> unused -
> enum {
> float_flag_invalid = 1,
> float_flag_divbyzero = 4,
> float_flag_overflow = 8,
> float_flag_underflow = 16,
> float_flag_inexact = 32
On 2014/6/25 17:21, Michael S. Tsirkin wrote:
On Wed, Jun 25, 2014 at 05:14:30PM +0800, Chen, Tiejun wrote:
On 2014/6/25 17:04, Michael S. Tsirkin wrote:
On Wed, Jun 25, 2014 at 04:48:02PM +0800, Chen, Tiejun wrote:
On 2014/6/25 16:43, Michael S. Tsirkin wrote:
On Wed, Jun 25, 2014 at 04:39:0
Since fe069d9d5946 the qmp-events.txt does not exist anymore. This is
unhappy as users still may want to know what events they can await
from qemu.
Signed-off-by: Michal Privoznik
---
Makefile | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/Makefile b/Makefile
index 145a
Il 25/06/2014 11:21, Chen, Tiejun ha scritto:
Adding a vendor-specific capability or BAR
in an existing device is painful - hard to find
free space for it.
Yes, this is a potential risk as well since we can't guarantee current
free space is always valid for ever.
For past devices, we know whi
On Tue, Jun 24, 2014 at 7:36 PM, Kevin Wolf wrote:
> Am 24.06.2014 um 15:19 hat M.Kustova geschrieben:
>> On Mon, Jun 23, 2014 at 12:02 PM, Stefan Hajnoczi wrote:
>> > On Thu, Jun 19, 2014 at 07:19:55PM -, Maria Kustova wrote:
>> >> The bug description missed qemu-img error:
>> >>
>> >> (proc
Il 25/06/2014 11:30, Michal Privoznik ha scritto:
Since fe069d9d5946 the qmp-events.txt does not exist anymore. This is
unhappy as users still may want to know what events they can await
from qemu.
hxtool however doesn't understand the json format. :( I guess for now
we could just revert the
On Wed, Jun 25, 2014 at 12:17:57PM +0300, Michael S. Tsirkin wrote:
> On Wed, Jun 25, 2014 at 05:01:04PM +0800, Hu Tao wrote:
> > If pc-dimm is specified on qemu command line, but only with
> > -m size (aka not -m size,maxmem,slots) then qemu will core dump.
> >
> > This patch fixes the problem.
>
On 25.06.2014 11:34, Paolo Bonzini wrote:
Il 25/06/2014 11:30, Michal Privoznik ha scritto:
Since fe069d9d5946 the qmp-events.txt does not exist anymore. This is
unhappy as users still may want to know what events they can await
from qemu.
hxtool however doesn't understand the json format. :(
Ping!
This is fully reviewed and should be rdy for a merge. I'd like to see
this through for 2.1.
Regards,
Peter
On Wed, Jun 18, 2014 at 5:53 PM, Peter Crosthwaite
wrote:
> Hi Andreas and all,
>
> I have done some cleanup of your WIP IRQ QOMification and have it in a
> hopefully ready state. It
Am 25.06.2014 um 11:32 hat M.Kustova geschrieben:
> On Tue, Jun 24, 2014 at 7:36 PM, Kevin Wolf wrote:
> > Am 24.06.2014 um 15:19 hat M.Kustova geschrieben:
> >> On Mon, Jun 23, 2014 at 12:02 PM, Stefan Hajnoczi
> >> wrote:
> >> > On Thu, Jun 19, 2014 at 07:19:55PM -, Maria Kustova wrote:
>
On Wed, Jun 25, 2014 at 05:28:48PM +0800, Chen, Tiejun wrote:
> On 2014/6/25 17:21, Michael S. Tsirkin wrote:
> >On Wed, Jun 25, 2014 at 05:14:30PM +0800, Chen, Tiejun wrote:
> >>On 2014/6/25 17:04, Michael S. Tsirkin wrote:
> >>>On Wed, Jun 25, 2014 at 04:48:02PM +0800, Chen, Tiejun wrote:
> O
On Tue, Jun 17, 2014 at 10:35 PM, Paolo Bonzini wrote:
> Il 17/06/2014 14:27, Peter Crosthwaite ha scritto:
>
>> This looks good to me, the only change I see worth making pre-merge is
>> moving object_property_add_child_array to the QOM core. All other
>> review discussions have been shelved or cl
Il 25/06/2014 11:45, Peter Crosthwaite ha scritto:
Where we at with this? Is it possible to get this through in some form
inside 2.1 window and should I respin it? I think we are largely in
agreement on this series.
I'm waiting for Andreas to review Stefan's object_property_add_alias
series,
On 2014/6/25 17:31, Paolo Bonzini wrote:
Il 25/06/2014 11:21, Chen, Tiejun ha scritto:
Adding a vendor-specific capability or BAR
in an existing device is painful - hard to find
free space for it.
Yes, this is a potential risk as well since we can't guarantee current
free space is always valid
Il 25/06/2014 11:50, Chen, Tiejun ha scritto:
For past devices, we know which BARs they use. For future devices, it
would be nice if the PCH/MCH backdoor was specified so that we know they
will leave a free BAR for virtualization.
Now I'm a bit confused about BAR here.
You're saying we will
On Wed, Jun 25, 2014 at 05:50:16PM +0800, Chen, Tiejun wrote:
> On 2014/6/25 17:31, Paolo Bonzini wrote:
> >Il 25/06/2014 11:21, Chen, Tiejun ha scritto:
> >>>Adding a vendor-specific capability or BAR
> >>>in an existing device is painful - hard to find
> >>>free space for it.
> >>
> >>Yes, this i
On Wed, Jun 25, 2014 at 1:42 PM, Kevin Wolf wrote:
> Am 25.06.2014 um 11:32 hat M.Kustova geschrieben:
>> On Tue, Jun 24, 2014 at 7:36 PM, Kevin Wolf wrote:
>> > Am 24.06.2014 um 15:19 hat M.Kustova geschrieben:
>> >> On Mon, Jun 23, 2014 at 12:02 PM, Stefan Hajnoczi
>> >> wrote:
>> >> > On Thu
On Wed, 25 Jun 2014 17:33:31 +0800
Hu Tao wrote:
> On Wed, Jun 25, 2014 at 12:17:57PM +0300, Michael S. Tsirkin wrote:
> > On Wed, Jun 25, 2014 at 05:01:04PM +0800, Hu Tao wrote:
> > > If pc-dimm is specified on qemu command line, but only with
> > > -m size (aka not -m size,maxmem,slots) then qe
After commit 96d0e26c238e8 this file becomes unmaintained, add myself as
the maintainer.
---
MAINTAINERS | 5 +
1 file changed, 5 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 9b93edd..47dfc37 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -858,6 +858,11 @@ S: Supported
F: qemu-s
After commit 96d0e26c238e8 this file becomes unmaintained, add myself as
the maintainer.
Signed-off-by: Hu Tao
---
MAINTAINERS | 5 +
1 file changed, 5 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 9b93edd..47dfc37 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -858,6 +858,11 @@
fixes QEMU abort in case it's started without memory
hotplug enabled.
as result of fix it will print following messages:
"
-device pc-dimm,id=d1,memdev=m1: memory hotplug is not enabled, enable it on
startup
-device pc-dimm,id=d1,memdev=m1: Device 'pc-dimm' could not be initialized
"
Also fixup
On 2014/6/25 17:44, Michael S. Tsirkin wrote:
On Wed, Jun 25, 2014 at 05:28:48PM +0800, Chen, Tiejun wrote:
On 2014/6/25 17:21, Michael S. Tsirkin wrote:
On Wed, Jun 25, 2014 at 05:14:30PM +0800, Chen, Tiejun wrote:
On 2014/6/25 17:04, Michael S. Tsirkin wrote:
On Wed, Jun 25, 2014 at 04:48:0
Il 25/06/2014 11:55, Michael S. Tsirkin ha scritto:
> You're saying we will reserve a free BAR to address those information to
> expose to guest, but which device does this free BAR belong to? The video
> device? Or PCH/MCH?
If you just want to pass a couple of IDs, then don't, it's a waste.
But
On Wed, Jun 25, 2014 at 11:54:22AM +0200, Paolo Bonzini wrote:
> Il 25/06/2014 11:50, Chen, Tiejun ha scritto:
> >>
> >>For past devices, we know which BARs they use. For future devices, it
> >>would be nice if the PCH/MCH backdoor was specified so that we know they
> >>will leave a free BAR for v
On Wed, Jun 25, 2014 at 05:54:16PM +0800, Hu Tao wrote:
> After commit 96d0e26c238e8 this file becomes unmaintained, add myself as
> the maintainer.
Oops, there is no s-o-b line, just sent another one with it.
> ---
> MAINTAINERS | 5 +
> 1 file changed, 5 insertions(+)
>
> diff --git a/MAI
On Wed, Jun 25, 2014 at 05:55:15PM +0800, Hu Tao wrote:
> After commit 96d0e26c238e8 this file becomes unmaintained,
not listed in MAINTAINERS != unmaintained
> add myself as
> the maintainer.
>
> Signed-off-by: Hu Tao
Let's wait with this one, for now people can
figure out Cc based on git his
On Wed, Jun 25, 2014 at 11:58:09AM +0200, Igor Mammedov wrote:
> fixes QEMU abort in case it's started without memory
> hotplug enabled.
>
> as result of fix it will print following messages:
> "
> -device pc-dimm,id=d1,memdev=m1: memory hotplug is not enabled, enable it on
> startup
> -device pc
On 2014/6/25 17:59, Paolo Bonzini wrote:
Il 25/06/2014 11:55, Michael S. Tsirkin ha scritto:
> You're saying we will reserve a free BAR to address those
information to
> expose to guest, but which device does this free BAR belong to? The
video
> device? Or PCH/MCH?
If you just want to pass a co
On Wed, Jun 25, 2014 at 11:59:21AM +0200, Paolo Bonzini wrote:
> Il 25/06/2014 11:55, Michael S. Tsirkin ha scritto:
> >> You're saying we will reserve a free BAR to address those information to
> >> expose to guest, but which device does this free BAR belong to? The video
> >> device? Or PCH/MCH?
Il 25/06/2014 12:09, Michael S. Tsirkin ha scritto:
> It's not just a couple of IDs, it's also random fields of the MCH
> configuration space. Grep drivers/gpu/drm/i915 for bridge_dev.
>
> Paolo
I did, it seems to look for device at 0,0:
static int i915_get_bridge_dev(struct drm_device
On 2014/6/25 18:09, Michael S. Tsirkin wrote:
On Wed, Jun 25, 2014 at 11:59:21AM +0200, Paolo Bonzini wrote:
Il 25/06/2014 11:55, Michael S. Tsirkin ha scritto:
You're saying we will reserve a free BAR to address those information to
expose to guest, but which device does this free BAR belong t
On Wed, Jun 25, 2014 at 06:06:50PM +0800, Chen, Tiejun wrote:
> On 2014/6/25 17:59, Paolo Bonzini wrote:
> >Il 25/06/2014 11:55, Michael S. Tsirkin ha scritto:
> >>> You're saying we will reserve a free BAR to address those
> >>information to
> >>> expose to guest, but which device does this free B
Am 25.06.2014 09:04, schrieb Paolo Bonzini:
> Otherwise, Windows fails with a deadlock.
>
> Reported-by: Stefan Weil
> Signed-off-by: Paolo Bonzini
> ---
> qemu-char.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/qemu-char.c b/qemu-char.c
> index 2e50a10..17bd360 100644
> --- a/qemu-
On Wed, Jun 25, 2014 at 06:15:29PM +0800, Chen, Tiejun wrote:
> On 2014/6/25 18:09, Michael S. Tsirkin wrote:
> >On Wed, Jun 25, 2014 at 11:59:21AM +0200, Paolo Bonzini wrote:
> >>Il 25/06/2014 11:55, Michael S. Tsirkin ha scritto:
> You're saying we will reserve a free BAR to address those inf
On 2014/6/25 18:21, Michael S. Tsirkin wrote:
On Wed, Jun 25, 2014 at 06:06:50PM +0800, Chen, Tiejun wrote:
On 2014/6/25 17:59, Paolo Bonzini wrote:
Il 25/06/2014 11:55, Michael S. Tsirkin ha scritto:
You're saying we will reserve a free BAR to address those
information to
expose to guest, b
On Wed, Jun 25, 2014 at 05:33:31PM +0800, Hu Tao wrote:
> On Wed, Jun 25, 2014 at 12:17:57PM +0300, Michael S. Tsirkin wrote:
> > On Wed, Jun 25, 2014 at 05:01:04PM +0800, Hu Tao wrote:
> > > If pc-dimm is specified on qemu command line, but only with
> > > -m size (aka not -m size,maxmem,slots) th
hi,all
Qemu can not modify boot index when vm is running.
It is inconvenience when we install guest os. Is it
necessary to achieve modify boot index online?
We can add one qmp interface to achieve it.
On Wed, Jun 25, 2014 at 06:28:34PM +0800, Chen, Tiejun wrote:
> On 2014/6/25 18:21, Michael S. Tsirkin wrote:
> >On Wed, Jun 25, 2014 at 06:06:50PM +0800, Chen, Tiejun wrote:
> >>On 2014/6/25 17:59, Paolo Bonzini wrote:
> >>>Il 25/06/2014 11:55, Michael S. Tsirkin ha scritto:
> >You're saying w
On Wed, 25 Jun 2014 17:04:14 +0800
Hu Tao wrote:
> ..to prevent one memory backend from being used by more than one numa
> node.
>
> Signed-off-by: Hu Tao
> ---
> numa.c | 7 +++
> 1 file changed, 7 insertions(+)
>
> diff --git a/numa.c b/numa.c
> index e471afe..6c1c554 100644
> --- a/num
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