From: Mike Qiu
The default mac address is 52:54:00:12:34:56 + index, this will
cause problem that when we boot up more than one guest with all
mac addresses unset by default, assume that each guest has one
nic. In this situation, all the guest's nic has the same mac address.
This patch is to sol
The default mac address is 52:54:00:12:34:56 + index, this will
cause problem that when we boot up more than one guest with all
mac addresses unset by default, assume that each guest has one
nic. In this situation, all the guest's nic has the same mac address.
This patch is to solve this bug.
Sig
On 10/14/2013 03:30 PM, Mike Qiu wrote:
Sorry for the first version make a mistake of the sender.
There is no difference with v1.
Thanks
Mike
The default mac address is 52:54:00:12:34:56 + index, this will
cause problem that when we boot up more than one guest with all
mac addresses unset by d
于 2013/10/2 20:28, Stefan Hajnoczi 写道:
On Mon, Sep 09, 2013 at 10:57:55AM +0800, Wenchao Xia wrote:
V2:
1: all fail case will goto fail section.
2: add the goto code.
v3:
Address Stefan's comments:
2: don't goto fail after allocation failure.
3: use sn->l1size correctly in qcow2_f
于 2013/10/2 20:23, Stefan Hajnoczi 写道:
On Mon, Sep 30, 2013 at 04:08:53PM -0600, Eric Blake wrote:
On 09/08/2013 08:58 PM, Wenchao Xia wrote:
The message will be print out with a macro enabled, which can
s/print/printed/
be used to check which error path is taken.
Signed-off-by: Wenchao Xia
On Thu, Sep 12, 2013 at 9:46 PM, Laszlo Ersek wrote:
> +For simplicity, the "paging", "begin" and "end" parameters of the QMP
> +command are not supported -- no attempt is made to get the guest's
> +internal paging structures (ie. paging=false is hard-wired), and guest
> +memory is always fully du
于 2013/10/1 6:28, Eric Blake 写道:
On 09/08/2013 08:58 PM, Wenchao Xia wrote:
This test will focus on the low level procedure of qcow2 snapshot
operations, now it covers only the create operation. Overlap error
paths are not checked since no good way to trigger those errors.
Signed-off-by: Wencha
On 09/30/2013 12:25:45 PM, Min LI wrote:
Dear all,
I am very interested in QEMU and trying to figure out the boot
process of guest VM. According to my understanding about QEMU code,
bochs BIOS is loaded into memory by pc_system_firmware_init(…).
However, I notice QEMU handles hardwar
Hi,
> > > But RamSizeOver4G still doesn't allow correctly place PCI window if large
> > > amount of memory present/reserved.
> > BTW: I don't think it's good practice to change semantics of an old
> > interface
> > in general. It's less confusing to leave old interface as is (obsoleting it
> >
On Fri, Oct 11, 2013 at 06:39:09PM +0200, Stefan Weil wrote:
> Am 11.10.2013 09:55, schrieb Stefan Hajnoczi:
> > On Thu, Oct 10, 2013 at 07:42:30PM +0200, Stefan Weil wrote:
> >> Am 10.10.2013 11:39, schrieb Stefan Hajnoczi:
> >>> qemu.org is held by a third-party and no core community contributor
Hi Anthony,
Hi Peter,
On Thu, Oct 3, 2013 at 5:00 PM, Peter Maydell wrote:
> On 3 October 2013 17:41, Jia Liu wrote:
>> Hi Anthony,
>>
>> This is my OpenRISC patch queue. It originally come from Sebastian Macke,
>> split by me, and I used some comment come from Stefan Kristiansson.
>>
>> Please
On Sat, Oct 12, 2013 at 05:45:52PM +0300, Alexander Binun wrote:
>The qemu used by me is the one installed using apt-get install qemu. The
> executable is in /usr/bin. The KVM driver is the one supplied with Ubuntu
> 13.04.
>
> The version of qemu is 1.4.0 (after running qemu --version I get
On Sun, 13 Oct 2013 23:28:47 +0300
"Michael S. Tsirkin" wrote:
> On Sun, Oct 13, 2013 at 07:33:19PM +0200, Igor Mammedov wrote:
> > On Sun, 13 Oct 2013 19:46:09 +0300
> > "Michael S. Tsirkin" wrote:
> >
> > > On Sun, Oct 13, 2013 at 06:23:28PM +0200, Igor Mammedov wrote:
> > > > On Sun, 13 Oct
The workaround offered in bug trackers is: "change the path associated with the
emulation tag in the xml definition file. Change it to qemu-system-x86_64".
Well, I am familiar with XML definition files for VMs: they are used manually
when defining VMs in virsh (virsh define xmldef.xml and so on)
Sorry, I should have mentioned that an improper sorting of the cpreg_list
could lead to a migration failure when cpu_post_load considers an incoming
register as missing in the cpreg_indexes array.
However, as long as the two lists are exactly the same, the problem does
not occur.
On Fri, Oct 11, 2
On Mon, Oct 14, 2013 at 12:27:26PM +0200, Igor Mammedov wrote:
> On Sun, 13 Oct 2013 23:28:47 +0300
> "Michael S. Tsirkin" wrote:
>
> > On Sun, Oct 13, 2013 at 07:33:19PM +0200, Igor Mammedov wrote:
> > > On Sun, 13 Oct 2013 19:46:09 +0300
> > > "Michael S. Tsirkin" wrote:
> > >
> > > > On Sun,
On 14 October 2013 11:45, alvise rigo wrote:
> Sorry, I should have mentioned that an improper sorting of the cpreg_list
> could lead to a migration failure when cpu_post_load considers an incoming
> register as missing in the cpreg_indexes array.
> However, as long as the two lists are exactly th
On Wed, Jul 24, 2013 at 2:50 PM, Anthony Liguori wrote:
>
> I will be hosting a key signing party at this year's KVM Forum.
>
> http://wiki.qemu.org/KeySigningParty2013
keyserver.cryptnet.net seems broken. I get connection refused when
syncing to it. On port 80 it serves up a default Fedora apa
On Tue, 16 Jul 2013 00:25:53 +0200
Igor Mammedov wrote:
> It's reordered and rebased v8 plus CPUID feature bits conversion to properties
> and cleanups that are removing unused anymore *_feature_name arrays.
>
> dynamic => static properties conversion is still making sense as cleanup of
> initfn
Hi,
> > And there is slight difference between PCI holes and PCI address space
> > mappings
> > represented by MemoryRegion-s in QEMU.
> >
> > Basically we only need to inform BIOS where to PCI address spaces start and
> > simple "etc/pcimem64-start" + "etc/pcimem32-start" are just fine for th
On Mon, 14 Oct 2013 14:00:12 +0300
"Michael S. Tsirkin" wrote:
> On Mon, Oct 14, 2013 at 12:27:26PM +0200, Igor Mammedov wrote:
> > On Sun, 13 Oct 2013 23:28:47 +0300
> > "Michael S. Tsirkin" wrote:
> >
> > > On Sun, Oct 13, 2013 at 07:33:19PM +0200, Igor Mammedov wrote:
> > > > On Sun, 13 Oct
On Mon, Oct 14, 2013 at 02:16:23PM +0200, Gerd Hoffmann wrote:
> Hi,
>
> > > And there is slight difference between PCI holes and PCI address space
> > > mappings
> > > represented by MemoryRegion-s in QEMU.
> > >
> > > Basically we only need to inform BIOS where to PCI address spaces start
>
Public bug reported:
I'm using qemu-system-i386 on a x86-64 platform doing my OS homework.
When qemu execute
c0102f9a: 66 0f 6e 45 a0 movd -0x60(%ebp),%xmm0
c0102f9f: 66 0f d6 45 d0 movq %xmm0,-0x30(%ebp)
My virtual OS reboots. Maybe the following old patch is
Hi All,
I tried to subscribe to this list, but never got teh confirm mail.
So I write here non subscribed, so add my email addr in replies.
I am trying to use guest-dump-memory on arm (arm32, armv7* name it)
with qemu 1.6.1. The command is 'implemented' i.e listed in the help,
but it create an e
Hi,
> >
> > To me it makes more sense to just go the direct route and say "please
> > put the 64bit bars at this location" rather than indirect "we might want
> > hotplug $thatmuch memory" and then expect the bios to leave that much
> > room.
>
> Only if the newfeature address is not under bio
On 11 October 2013 13:52, Stefan Hajnoczi wrote:
> Note that git-submodule(1) does not detect URL changes. The following
> commands clear out and re-initialize all submodules to ensure you are
> using the latest URLs:
>
> $ git submodule deinit . # you'll be warned if you have local changes
ca
On Fri, Oct 11, 2013 at 02:52:38PM +0200, Stefan Hajnoczi wrote:
> qemu.org is held by a third-party and no core community contributor has
> access to the DNS configuration. This leaves the website exposed to
> outages due to DNS issues or IP address changes. For example, if the
> web server IP a
Without this, output of 'info block'
scsi0-hd0: /images/f18-ppc64.qcow2 (qcow2)
[not inserted]
scsi0-cd2: [not inserted]
Removable device: not locked, tray closed
floppy0: [not inserted]
Removable device: not locked, tray closed
sd0: [not inserted]
Removable device: not locked, tray
On 26 September 2013 20:56, Christoffer Dall
wrote:
> Introduce kvm_arch_irqchip_create an arch-specific hook in preparation
> for architecture-specific use of the device control API to create IRQ
> chips.
>
> Following patches will implement the ARM irqchip create method to prefer
> the device co
On 26 September 2013 20:56, Christoffer Dall
wrote:
> Introduces two simple functions:
> int kvm_device_ioctl(int fd, int type, ...);
> int kvm_create_device(KVMState *s, uint64_t type, bool test);
>
> These functions wrap the basic ioctl-based interactions with KVM in a
> way similar to o
On 26 September 2013 20:56, Christoffer Dall
wrote:
> Support creating the ARM vgic device through the device control API and
> setting the base address for the distributor and cpu interfaces in KVM
> VMs using this API.
>
> Because the older KVM_CREATE_IRQCHIP interface needs the irq chip to be
>
** Changed in: qemu
Status: New => Invalid
--
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
https://bugs.launchpad.net/bugs/1239385
Title:
qemu reboot when execute some SSE instruction
Status in QEMU:
Invalid
Bug descript
On 10/12/2013 12:33 AM, Fam Zheng wrote:
> There is errp passed in, so no need for local_err and error_propagate.
s/compelte/complete/ in the subject
>
> Signed-off-by: Fam Zheng
> ---
> block/mirror.c | 4 +---
> 1 file changed, 1 insertion(+), 3 deletions(-)
>
> diff --git a/block/mirror.c
On Mon, Oct 14, 2013 at 03:04:45PM +0200, Gerd Hoffmann wrote:
> Hi,
>
> > >
> > > To me it makes more sense to just go the direct route and say "please
> > > put the 64bit bars at this location" rather than indirect "we might want
> > > hotplug $thatmuch memory" and then expect the bios to lea
/scm/qemu/exec.c:720:51: error: initialization from incompatible pointer type
[-Werror]
static void *(*phys_mem_alloc)(ram_addr_t size) = qemu_anon_ram_alloc;
^
/scm/qemu/exec.c: In function ‘qemu_ram_alloc_from_ptr’:
/scm/qemu/exec.c:1107:32: er
On Fri, Oct 11, 2013 at 05:18:30PM +0800, liu ping fan wrote:
> On Fri, Oct 11, 2013 at 4:38 PM, Paolo Bonzini wrote:
> > Il 11/10/2013 04:59, liu ping fan ha scritto:
> >> On Thu, Oct 10, 2013 at 7:41 PM, Michael S. Tsirkin
> >> wrote:
> >>> On Thu, Oct 10, 2013 at 11:46:42AM +0200, Paolo Bonzi
On Fri, Oct 11, 2013 at 10:59:40AM +0800, liu ping fan wrote:
> On Thu, Oct 10, 2013 at 7:41 PM, Michael S. Tsirkin wrote:
> > On Thu, Oct 10, 2013 at 11:46:42AM +0200, Paolo Bonzini wrote:
> >> Il 10/10/2013 11:41, Michael S. Tsirkin ha scritto:
> >> >> > Are you sure? This is not done for any o
On Mon, Oct 14, 2013 at 12:36 PM, Alexander Binun wrote:
> The workaround offered in bug trackers is: "change the path associated with
> the emulation tag in the xml definition file. Change it to
> qemu-system-x86_64".
>
> Well, I am familiar with XML definition files for VMs: they are used manu
On Mon, Oct 14, 2013 at 05:08:58PM +0300, Michael S. Tsirkin wrote:
> /scm/qemu/exec.c:720:51: error: initialization from incompatible pointer type
> [-Werror]
> static void *(*phys_mem_alloc)(ram_addr_t size) = qemu_anon_ram_alloc;
>^
> /scm/qe
On 26 September 2013 22:03, Christoffer Dall
wrote:
> For some reason only edge-triggered or enabled level-triggered
> interrupts would set the pending state of a raised IRQ. This is not in
> compliance with the specs, which indicate that the pending state is
> separate from the enabled state, wh
On Sun, Sep 29, 2013 at 08:56:45PM +0200, Stefan Weil wrote:
> phys_mem_alloc and its assigned values qemu_anon_ram_alloc and
> legacy_s390_alloc must have identical argument lists.
>
> legacy_s390_alloc uses the size parameter to call mmap, so size_t is
> good enough for all of them.
>
> This pa
On 26 September 2013 22:03, Christoffer Dall
wrote:
> To make the code slightly cleaner to look at and make the save/restore
> code easier to understand, introduce this macro to set the priority of
> interrupts.
>
> Signed-off-by: Christoffer Dall
Commit message and subject need updating since i
Mike Qiu writes:
> Without this, output of 'info block'
>
> scsi0-hd0: /images/f18-ppc64.qcow2 (qcow2)
> [not inserted]
> scsi0-cd2: [not inserted]
> Removable device: not locked, tray closed
>
> floppy0: [not inserted]
> Removable device: not locked, tray closed
>
> sd0: [not inserted]
"Michael S. Tsirkin" writes:
> /scm/qemu/exec.c:720:51: error: initialization from incompatible pointer type
> [-Werror]
> static void *(*phys_mem_alloc)(ram_addr_t size) = qemu_anon_ram_alloc;
>^
> /scm/qemu/exec.c: In function ‘qemu_ram_allo
On Mon, Oct 14, 2013 at 04:38:22PM +0200, Markus Armbruster wrote:
> "Michael S. Tsirkin" writes:
>
> > /scm/qemu/exec.c:720:51: error: initialization from incompatible pointer
> > type [-Werror]
> > static void *(*phys_mem_alloc)(ram_addr_t size) = qemu_anon_ram_alloc;
> >
From: Marcel Apfelbaum
qemu_allocate_irq returns a single qemu_irq.
The interface allows to specify an interrupt number.
qemu_free_irq frees it.
Signed-off-by: Marcel Apfelbaum
Signed-off-by: Michael S. Tsirkin
---
include/hw/irq.h | 7 +++
hw/core/irq.c| 16
2 file
From: Marcel Apfelbaum
When memory regions overlap, priority can be used to specify
which of them takes priority. By making the priority values signed
rather than unsigned, we make it more convenient to implement
a situation where one "background" region should appear only
where no other region e
From: Marcel Apfelbaum
A MemoryRegion with negative priority was created and
it spans over all the pci address space.
It "intercepts" the accesses to unassigned pci
address space and will follow the pci spec:
1. returns -1 on read
2. does nothing on write
Note: setting the RECEIVED MASTER ABOR
Anthony, I know you wanted to review some of the patches,
since you didn't respond either all's well or you
could not find the time.
I think we are better off merging them for 1.7 and then - worst case,
if major issues surface - disabling the functionality at the last minute
than delaying the merge
From: Marcel Apfelbaum
When memory regions overlap, priority can be used to specify
which of them takes priority. By making the priority values signed
rather than unsigned, we make it more convenient to implement
a situation where one "background" region should appear only
where no other region e
From: Marcel Apfelbaum
pci_set_irq and the other pci irq wrappers use
PCI_INTERRUPT_PIN config register to compute device
INTx pin to assert/deassert.
save INTX pin into the config register before calling
pci_set_irq
Signed-off-by: Marcel Apfelbaum
Signed-off-by: Michael S. Tsirkin
---
hw/mi
From: Marcel Apfelbaum
Interrupt pin is selected and saved into PCI_INTERRUPT_PIN
register during device initialization. Devices should not call
directly qemu_set_irq and specify the INTx pin on each call.
Added pci_* wrappers to replace qemu_set_irq, qemu_irq_raise,
qemu_irq_lower and qemu_irq_
From: Marcel Apfelbaum
pci_set_irq and the other pci irq wrappers use
PCI_INTERRUPT_PIN config register to compute device
INTx pin to assert/deassert.
An irq is allocated using pci_allocate_irq wrapper
only if is needed by non pci devices.
Removed irq related fields from state if not used anymo
From: Marcel Apfelbaum
pci_set_irq uses PCI_INTERRUPT_PIN config register
to compute device INTx pin to assert/deassert.
An assert is used to ensure that intx received
from the quest OS corresponds to PCI_INTERRUPT_PIN.
Signed-off-by: Marcel Apfelbaum
Signed-off-by: Michael S. Tsirkin
---
hw
Reviewed-by: Gerd Hoffmann
Tested-by: Gerd Hoffmann
Reviewed-by: Igor Mammedov
Tested-by: Igor Mammedov
Signed-off-by: Michael S. Tsirkin
---
include/hw/nvram/fw_cfg.h | 4
hw/nvram/fw_cfg.c | 33 -
2 files changed, 32 insertions(+), 5 deletions(-
Callers pass in the address so it's helpful for
them to be able to decode it.
Reviewed-by: Gerd Hoffmann
Tested-by: Gerd Hoffmann
Reviewed-by: Igor Mammedov
Tested-by: Igor Mammedov
Signed-off-by: Michael S. Tsirkin
---
include/hw/pci/pcie_host.h | 21 +
hw/pci/pcie_host.
From: Marcel Apfelbaum
The fields hpev_intx and aer_intx were removed because
both AER and hot-plug events must use device's interrupt.
Assert/deassert interrupts using pci irq wrappers instead.
Signed-off-by: Marcel Apfelbaum
Signed-off-by: Michael S. Tsirkin
---
include/hw/pci/pcie.h | 18 -
Support ROM blobs not mapped into guest memory:
same as ROM files really but use caller's buffer.
Support invoking callback on access and
return memory pointer making it easier
for caller to update memory if necessary.
Reviewed-by: Gerd Hoffmann
Tested-by: Gerd Hoffmann
Reviewed-by: Laszlo Erse
update generated file, not sure what changed
Reviewed-by: Gerd Hoffmann
Tested-by: Gerd Hoffmann
Reviewed-by: Igor Mammedov
Tested-by: Igor Mammedov
Signed-off-by: Michael S. Tsirkin
---
hw/i386/ssdt-pcihp.hex.generated | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --gi
now that a typedef for struct Error is available,
use it in qom/object.h to match coding style rules.
Reviewed-by: Paolo Bonzini
Reviewed-by: Gerd Hoffmann
Tested-by: Gerd Hoffmann
Reviewed-by: Igor Mammedov
Tested-by: Igor Mammedov
Signed-off-by: Michael S. Tsirkin
---
include/qom/object.h
Useful to make it accessible through QOM.
Reviewed-by: Gerd Hoffmann
Tested-by: Gerd Hoffmann
Reviewed-by: Igor Mammedov
Tested-by: Igor Mammedov
Signed-off-by: Michael S. Tsirkin
---
include/hw/pci/pcie_host.h | 2 ++
hw/pci-host/q35.c | 2 +-
2 files changed, 3 insertions(+), 1 de
Don't abort if machine done callbacks add ROMs.
Reviewed-by: Gerd Hoffmann
Tested-by: Gerd Hoffmann
Reviewed-by: Igor Mammedov
Tested-by: Igor Mammedov
Signed-off-by: Michael S. Tsirkin
---
include/hw/loader.h | 1 +
hw/core/loader.c| 6 +-
vl.c| 3 +++
3 files change
Also add a new API to install builtin tables, so
that we can distinguish between the two.
Signed-off-by: Michael S. Tsirkin
---
include/hw/acpi/acpi.h | 4
hw/acpi/core.c | 40
2 files changed, 44 insertions(+)
diff --git a/include/hw/acpi/
This adds a dynamic bios linker/loader.
This will be used by acpi table generation
code to:
- load each table in the appropriate memory segment
- link tables to each other
- fix up checksums after said linking
Reviewed-by: Gerd Hoffmann
Tested-by: Gerd Hoffmann
Reviewed-by: Igor Mamm
Useful for ACPI hotplug.
Signed-off-by: Michael S. Tsirkin
---
include/hw/pci/pci.h | 14 ++
hw/pci/pci.c | 28
2 files changed, 42 insertions(+)
diff --git a/include/hw/pci/pci.h b/include/hw/pci/pci.h
index 37ffa53..3755b02 100644
--- a/include
Il 14/10/2013 16:57, Michael S. Tsirkin ha scritto:
> pci, pc, acpi fixes, enhancements
>
> This includes some pretty big changes:
> - pci master abort support by Marcel
> - pci IRQ API rework by Marcel
> - acpi generation and pci bridge hotplug support by myself
>
> Everything has gone through s
Add API to find HPET using QOM.
Reviewed-by: Gerd Hoffmann
Tested-by: Gerd Hoffmann
Reviewed-by: Igor Mammedov
Tested-by: Igor Mammedov
Signed-off-by: Michael S. Tsirkin
---
include/hw/timer/hpet.h | 2 ++
hw/timer/hpet.c | 5 +
2 files changed, 7 insertions(+)
diff --git a/incl
This enables support for device hotplug behind
pci bridges. Bridge devices themselves need
to be pre-configured on qemu command line.
Design:
- at machine init time, assign "bsel" property to bridges with
hotplug support
- dynamically (At ACPI table read) generate ACPI code to handle
Update generated ssdt proc hex file (used for systems
lacking IASL) after P_BLK length change.
Reviewed-by: Gerd Hoffmann
Tested-by: Gerd Hoffmann
Reviewed-by: Igor Mammedov
Tested-by: Igor Mammedov
Signed-off-by: Michael S. Tsirkin
---
hw/i386/ssdt-proc.hex.generated | 10 +-
1 file
On Oct 14, 2013 7:49 AM, "Michael S. Tsirkin" wrote:
>
> On Mon, Oct 14, 2013 at 04:38:22PM +0200, Markus Armbruster wrote:
> > "Michael S. Tsirkin" writes:
> >
> > > /scm/qemu/exec.c:720:51: error: initialization from incompatible
pointer type [-Werror]
> > > static void *(*phys_mem_alloc)(ram_
This defines a structure that will be used to fill in acpi tables
where relevant properties are not yet available using QOM.
Reviewed-by: Laszlo Ersek
Reviewed-by: Gerd Hoffmann
Tested-by: Gerd Hoffmann
Reviewed-by: Igor Mammedov
Tested-by: Igor Mammedov
Signed-off-by: Michael S. Tsirkin
---
Reviewed-by: Gerd Hoffmann
Tested-by: Gerd Hoffmann
Reviewed-by: Igor Mammedov
Tested-by: Igor Mammedov
Signed-off-by: Michael S. Tsirkin
---
include/hw/i386/pc.h | 10 ++
hw/acpi/piix4.c | 6 +++---
2 files changed, 13 insertions(+), 3 deletions(-)
diff --git a/include/hw/i386
Add ACPI based PCI hotplug library with bridge hotplug
support.
Design
- each bus gets assigned "bsel" property.
- ACPI code writes this number
to a new BNUM register, then uses existing
UP/DOWN registers to probe slot status;
to eject, write number to BNUM register,
then
This adds APIs that will be used to fill in guest acpi tables.
Some required information is still lacking in QOM, so we
fall back on lookups by type and returning explicit types.
Reviewed-by: Gerd Hoffmann
Tested-by: Gerd Hoffmann
Reviewed-by: Igor Mammedov
Tested-by: Igor Mammedov
Signed-off-
This adds APIs that will be used to fill in
acpi tables, implemented using QOM,
to various ich9 components.
Some information is still missing in QOM,
so we fall back on lookups by type instead.
Reviewed-by: Gerd Hoffmann
Tested-by: Gerd Hoffmann
Reviewed-by: Igor Mammedov
Tested-by: Igor Mammed
BAR base was calculated incorrectly.
Use existing pci_bar_address to get it right.
Tested-by: Igor Mammedov
Reviewed-by: Igor Mammedov
Signed-off-by: Michael S. Tsirkin
---
hw/pci/pci.c | 20
1 file changed, 12 insertions(+), 8 deletions(-)
diff --git a/hw/pci/pci.c b/hw/
At this point the only builtin table we have is
the DSDT used for Q35.
Signed-off-by: Michael S. Tsirkin
---
hw/i386/pc.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/i386/pc.c b/hw/i386/pc.c
index d17d1d9..f8a3f0b 100644
--- a/hw/i386/pc.c
+++ b/hw/i386/pc.c
@@ -1114,7
We don't really support CPU throttling, so supply 0 PBLK length.
Reviewed-by: Gerd Hoffmann
Tested-by: Gerd Hoffmann
Reviewed-by: Igor Mammedov
Tested-by: Igor Mammedov
Signed-off-by: Michael S. Tsirkin
---
hw/i386/ssdt-proc.dsl | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --g
On Mon, Oct 14, 2013 at 04:57:19PM +0200, Paolo Bonzini wrote:
> Il 14/10/2013 16:57, Michael S. Tsirkin ha scritto:
> > pci, pc, acpi fixes, enhancements
> >
> > This includes some pretty big changes:
> > - pci master abort support by Marcel
> > - pci IRQ API rework by Marcel
> > - acpi generatio
Il 14/10/2013 17:12, Michael S. Tsirkin ha scritto:
> > Are you going to do another pull request with the virtio and bus-reset
> > fixes?
>
> I missed that you did the testing of the post-order changed.
> I'll put them on my branch but I'd rather this kind of
> change went through a bit more testi
Add API to find pvpanic device and get its io port.
Will be used to fill in guest info structure.
Reviewed-by: Gerd Hoffmann
Tested-by: Gerd Hoffmann
Reviewed-by: Igor Mammedov
Tested-by: Igor Mammedov
Signed-off-by: Michael S. Tsirkin
---
include/hw/i386/pc.h | 1 +
hw/misc/pvpanic.c|
On 26 September 2013 22:03, Christoffer Dall
wrote:
> Right now the arm gic emulation doesn't keep track of the source of an
> SGI (which apparently Linux guests don't use, or they're fine with
> assuming CPU 0 always).
>
> Add the necessary matrix on the GICState structure and maintain the data
>
On 26 September 2013 22:03, Christoffer Dall
wrote:
> @@ -606,10 +607,13 @@ static void gic_cpu_write(GICState *s, int cpu, int
> offset, uint32_t value)
> s->priority_mask[cpu] = (value & 0xff);
> break;
> case 0x08: /* Binary Point */
> -/* ??? Not implemented. *
On 26 September 2013 22:03, Christoffer Dall
wrote:
> Add support for saving VMtate of 2D arrays of uint32 values.
"VMState". Otherwise:
Reviewed-by: Peter Maydell
-- PMM
On Mon, 2013-10-14 at 17:58 +0300, Michael S. Tsirkin wrote:
> From: Marcel Apfelbaum
>
> pci_set_irq and the other pci irq wrappers use
> PCI_INTERRUPT_PIN config register to compute device
> INTx pin to assert/deassert.
>
> save INTX pin into the config register before calling
> pci_set_irq
>
Avoid a bit of code duplication, make
max file path constant reusable.
Suggested-by: Laszlo Ersek
Reviewed-by: Gerd Hoffmann
Tested-by: Gerd Hoffmann
Reviewed-by: Igor Mammedov
Tested-by: Igor Mammedov
Signed-off-by: Michael S. Tsirkin
---
include/hw/nvram/fw_cfg.h | 4 +++-
hw/core/loader.
Make it possible to test unmapped status through QMP.
Reviewed-by: Gerd Hoffmann
Tested-by: Gerd Hoffmann
Reviewed-by: Igor Mammedov
Tested-by: Igor Mammedov
Signed-off-by: Michael S. Tsirkin
---
include/hw/pci/pcie_host.h | 3 +++
hw/pci/pcie_host.c | 3 ---
2 files changed, 3 inser
This is a virtio version of hw/misc/debugexit and should evolve into a
virtio version of pc-testdev. pc-testdev uses the PC's ISA bus, whereas
this testdev can be plugged into a virtio-mmio transport, which is
needed for kvm-unit-tests/arm. virtio-testdev uses the virtio device
config space as a co
From: Igor Mammedov
qapi/error.h is simple enough to be included in qom/object.h
direcly and prepares qom/object.h to use Error typedef.
Signed-off-by: Igor Mammedov
Signed-off-by: Michael S. Tsirkin
---
include/qom/object.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/
Detect presence of IASL compiler and use it
to process ASL source. If not there, use pre-compiled
files in-tree. Add script to update the in-tree files.
Note: distros are known to silently update iasl
so detect correct iasl flags for the installed version on each run as
opposed to at configure tim
From: Marcel Apfelbaum
Instead of exposing the the irq field,
pci wrappers to qemu_set_irq or qemu_irq_*
can be used.
Signed-off-by: Marcel Apfelbaum
Signed-off-by: Michael S. Tsirkin
---
include/hw/pci/pci.h | 3 ---
hw/pci/pci.c | 2 --
2 files changed, 5 deletions(-)
diff --git a/
Make it easy to add read-only helpers for simple
integer properties in memory.
Reviewed-by: Paolo Bonzini
Reviewed-by: Gerd Hoffmann
Tested-by: Gerd Hoffmann
Reviewed-by: Igor Mammedov
Tested-by: Igor Mammedov
Signed-off-by: Michael S. Tsirkin
---
include/qom/object.h | 21 +
Add support for acpi pci hotplug using the
new infrastructure.
PIIX4 legacy interface is maintained as is for
machine types 1.6 and older.
Signed-off-by: Michael S. Tsirkin
---
include/hw/i386/pc.h | 5
hw/acpi/piix4.c | 75 +---
2 files
From: Marcel Apfelbaum
The PCI_INTERRUPT_PIN will be used by shpc init, so
was moved before the call to shpc_init.
Signed-off-by: Marcel Apfelbaum
Signed-off-by: Michael S. Tsirkin
---
hw/pci-bridge/pci_bridge_dev.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/pci-br
Address is already exposed, expose size for symmetry.
Reviewed-by: Gerd Hoffmann
Tested-by: Gerd Hoffmann
Reviewed-by: Igor Mammedov
Tested-by: Igor Mammedov
Signed-off-by: Michael S. Tsirkin
---
include/hw/pci/pcie_host.h | 1 +
hw/pci-host/q35.c | 14 ++
2 files chang
On Mon, 14 Oct 2013 17:00:47 +0300
"Michael S. Tsirkin" wrote:
> On Mon, Oct 14, 2013 at 03:04:45PM +0200, Gerd Hoffmann wrote:
> > Hi,
> >
> > > >
> > > > To me it makes more sense to just go the direct route and say "please
> > > > put the 64bit bars at this location" rather than indirect "
We do not need to access vdev on the MSI-X fast path of virtio_pci_notify.
Signed-off-by: Paolo Bonzini
---
It is possible to get rid of BusChild altogether, but even then
this would be one less pointer dereference, and it's a simpler
patch. So let's do this instead for 1
Hi Anthony, Hi Blue,
This is a pull for various updates and fixes for the LatticeMico32 target.
Please pull.
changes since v1:
- rebased
- dropped patch "target-lm32: register helper functions". This is
no longer needed.
- added patch "target-lm32: stop VM on illegal or unknown instructio
From: Antony Pavlov
qemu_chr_fe_write() is capable of returning 0
to indicate EAGAIN (and friends) and we don't
handle this.
Just change it to qemu_chr_fe_write_all() to fix.
Reported-by: Peter Crosthwaite
Acked-by: Peter Crosthwaite
Signed-off-by: Antony Pavlov
Signed-off-by: Michael Walle
qemu_chr_fe_write() may return EAGAIN. Therefore, use
qemu_chr_fe_write_all().
Signed-off-by: Michael Walle
---
hw/char/lm32_juart.c |2 +-
hw/char/lm32_uart.c |2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/hw/char/lm32_juart.c b/hw/char/lm32_juart.c
index 252fe46
1 - 100 of 202 matches
Mail list logo
