Il 02/10/2013 19:53, Andreas Färber ha scritto:
>> > LSI53C895A
>> > -M: Paul Brook
>> > -S: Odd Fixes
>> > +S: Orphan
>> > F: hw/scsi/lsi53c895a.c
>> >
>> > SSI
> CC'ing Paolo as SCSI maintainer.
I definitely don't object to this, but it's also fine to just remove the
whole stanza.
Paolo
On Thu, Sep 26, 2013 at 09:31:00AM +0200, Stefan Hajnoczi wrote:
> Hi Filippos,
> Late response but this may help start the discussion...
>
> Cache consistency during migration was discussed a lot on the mailing
> list. You might be able to find threads from about 2 years ago that
> discuss this
Il 02/10/2013 22:24, Stefan Weil ha scritto:
> Am 02.10.2013 21:02, schrieb Michael Tokarev:
> MigrationCapabilityStatusList *qmp_query_migrate_capabilities(Error **errp)
> {
> MigrationCapabilityStatusList *head = NULL;
> MigrationCapabilityStatusList *prev = NULL;
> MigrationState *s
Il 02/10/2013 22:36, akepner ha scritto:
>
> Hi qemu-devel;
>
> We're using qemu to emulate a platform that uses Intel 82574,
> and 82571 based NICs (which use the e1000e driver). AFAICT,
> an emulation of 82574/82571 devices is not available in qemu.
>
> Couple of questions:
>
> 1) is someo
Il 03/10/2013 06:03, Lei Li ha scritto:
>>>
>
> Hi Paolo,
>
> When debugging the code, I realized that this problem might still
> exist. In the incoming part, it will qemu_fopen_pipe() in
> unix_accept_incoming_migration first to enable the load_hook
> callback, the check action of this RAM_SAVE_
From: Sebastian Macke
The result of (rw & 0) is always zero and therefore a logic false.
The whole comparison will therefore never be executed, it is a obvious bug,
we should use !(rw & 1) here.
Signed-off-by: Sebastian Macke
Reviewed-by: Jia Liu
---
target-openrisc/mmu.c | 2 +-
1 file chang
Hi Anthony,
This is my OpenRISC patch queue. It originally come from Sebastian Macke,
split by me, and I used some comment come from Stefan Kristiansson.
Please pull.
This patch set correct two problems. The first one corrects one obvious
bug concerning the handling of page faults while reading
From: Sebastian Macke
Where *software* leaves 0x - 0x2000 unmapped, the hardware should
still allow for this area to be mapped.
Signed-off-by: Sebastian Macke
Signed-off-by: Stefan Kristiansson
Reviewed-by: Jia Liu
---
target-openrisc/mmu.c | 7 ---
1 file changed, 7 deletions(-)
di
From: Alex Bennée
Currently master is broken as the wanted commit doesn't exist in
qemu's mirror of SeaBIOS.
---
.gitmodules | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/.gitmodules b/.gitmodules
index d7e3f3c..d5d5417 100644
--- a/.gitmodules
+++ b/.gitmodules
@@ -3,7 +3,
From: Alex Bennée
This adds a build matrix definition for travis-ci.org continuous
integration service. It is usable on any public repository hosted on
GitHub. Once you have created an account signed into Travis you can
enable it on selected projects via travis-ci.org/profile. Alternatively
you c
Hi,
While testing after Peter's review comments Travis detected a
regression in the tree due to the updating of SeaBIOS (also found by a
bunch of others in the following days) which I take to be a good
indication of the usefulness of these tests.
v4:
- split debug build for with/without TCG int
On 3 October 2013 17:41, Jia Liu wrote:
> Hi Anthony,
>
> This is my OpenRISC patch queue. It originally come from Sebastian Macke,
> split by me, and I used some comment come from Stefan Kristiansson.
>
> Please pull.
As this is a pull request, the patches in it need your Signed-off-by,
not just
On 3 October 2013 17:58, wrote:
> From: Alex Bennée
>
> Currently master is broken as the wanted commit doesn't exist in
> qemu's mirror of SeaBIOS.
> ---
> .gitmodules | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/.gitmodules b/.gitmodules
> index d7e3f3c..d5d5417 10
peter.mayd...@linaro.org writes:
> On 3 October 2013 17:58, wrote:
>> From: Alex Bennée
>>
>> Currently master is broken as the wanted commit doesn't exist in
>> qemu's mirror of SeaBIOS.
> This is wrong. QEMU's submodules should all point to
> git.qemu.org. Among other things our release so
This adds support for the VSEL floating point selection instruction
which was added in ARMv8. It is based on the previous patch[1] from
Mans Rullgard, but attempts to addres the feedback given on that patch.
[1] http://lists.nongnu.org/archive/html/qemu-devel/2013-06/msg03117.html
Signed-off-by:
On Wed, 2 Oct 2013 17:54:57 +0200
Paolo Bonzini wrote:
> The data in leaf 0Dh depends on information from other feature bits.
> Instead of passing it blindly from the host, compute it based on
> whether these feature bits are enabled.
>
> Signed-off-by: Paolo Bonzini
> ---
> target-i386/cpu.c
On Thu, Oct 03, 2013 at 11:59:24AM +0200, Igor Mammedov wrote:
> On Wed, 2 Oct 2013 17:54:57 +0200
> Paolo Bonzini wrote:
>
> > The data in leaf 0Dh depends on information from other feature bits.
> > Instead of passing it blindly from the host, compute it based on
> > whether these feature bits
On Thu, 3 Oct 2013 13:01:54 +0300
Gleb Natapov wrote:
> On Thu, Oct 03, 2013 at 11:59:24AM +0200, Igor Mammedov wrote:
> > On Wed, 2 Oct 2013 17:54:57 +0200
> > Paolo Bonzini wrote:
> >
> > > The data in leaf 0Dh depends on information from other feature bits.
> > > Instead of passing it blind
On 10/03/2013 04:23 PM, Paolo Bonzini wrote:
Il 03/10/2013 06:03, Lei Li ha scritto:
Hi Paolo,
When debugging the code, I realized that this problem might still
exist. In the incoming part, it will qemu_fopen_pipe() in
unix_accept_incoming_migration first to enable the load_hook
callback, the c
Il 03/10/2013 12:28, Lei Li ha scritto:
>
> The load_hook callback is only be called if the RAM_SAVE_FLAG_HOOK is
> received.
> To check this flags, it means there would be a check action first in
> unix_accept_incoming_migration(), like:
>
> f = qemu_fopen_pipe(c, "rb");
> flags = qemu_get_be64(
will.new...@linaro.org writes:
> @@ -6756,6 +6864,13 @@ static void disas_arm_insn(CPUARMState * env,
> DisasContext *s)
> goto illegal_op;
> return;
> }
> + if ((insn & 0x0f800e50) == 0x0e000a00) {
> + /* ARMv8 VFP. */
> + ARCH(8);
>
r...@twiddle.net writes:
> There are free scheduling slots between the sequence of
> comparison instructions. This requires changing the
> register in use to avoid conflict with those compares.
>
> Signed-off-by: Richard Henderson
Looks good to me.
Reviewed-by: Alex Bennée
--
Alex Bennée
Hi,
Does QEMU support gdb connection through stdio/pipe in mingw32 ?
Thanks,
-Bilal
Hi Peter,
On Thu, Oct 3, 2013 at 5:00 PM, Peter Maydell wrote:
> On 3 October 2013 17:41, Jia Liu wrote:
>> Hi Anthony,
>>
>> This is my OpenRISC patch queue. It originally come from Sebastian Macke,
>> split by me, and I used some comment come from Stefan Kristiansson.
>>
>> Please pull.
>
> As
Il 25/09/2013 18:12, Pasi Kärkkäinen ha scritto:
On Sun, Jul 28, 2013 at 05:56:01PM +0100, Frediano Ziglio wrote:
2013/7/23 Gerd Hoffmann <[1]kra...@redhat.com>
 Hi,
> Tested-by: Fabio Fantoni <[2]fabio.fant...@m2r.biz>
>
> I tested it for a long time with spice on
On 3 October 2013 20:31, Alex Bennée wrote:
>
> will.new...@linaro.org writes:
>
>
>> @@ -6756,6 +6864,13 @@ static void disas_arm_insn(CPUARMState * env,
>> DisasContext *s)
>> goto illegal_op;
>> return;
>> }
>> + if ((insn & 0x0f800e50) == 0x0e000a00
r...@twiddle.net writes:
> One of the two constraints we already checked via #if, but
> the tlb offset distance was only checked at runtime.
>
> Signed-off-by: Richard Henderson
Reviewed-by: Alex Bennée
--
Alex Bennée
Good point, I've just changed the configure line to include --enable-
debug.
About the relation of the crash with the top commit, We can't ensure it
was because of this top commit, could be other patches that were applied
from one day to another. We only test qemu.git once a day, we don't have
eno
Hi,
I need to test the ARM's sp805 based watch dog timer from the qemu. But the
model SP805 is not present in the qemu-1.5.93 source. Is there any
possibility to add the SP805 based watch dog timer module to the Qemu.
Please any one guide me.
Thanks
balaji
This adds support for the VSEL floating point selection instruction
which was added in ARMv8. It is based on the previous patch[1] from
Mans Rullgard, but attempts to address the feedback given on that patch.
[1] http://lists.nongnu.org/archive/html/qemu-devel/2013-06/msg03117.html
Signed-off-by
On 3 October 2013 21:51, Will Newton wrote:
>
> This adds support for the VSEL floating point selection instruction
> which was added in ARMv8. It is based on the previous patch[1] from
> Mans Rullgard, but attempts to address the feedback given on that patch.
>
> [1] http://lists.nongnu.org/archi
now that a typedef for struct Error is available,
use it in qom/object.h to match coding style rules.
Reviewed-by: Paolo Bonzini
Reviewed-by: Gerd Hoffmann
Tested-by: Gerd Hoffmann
Signed-off-by: Michael S. Tsirkin
---
include/qom/object.h | 50 +---
This code can also be found here:
git://git.kernel.org/pub/scm/virt/kvm/mst/qemu.git acpi
While this patch still uses info not available in QOM, I think it's reasonable
to merge it and then refactor as QOM properties cover more ground.
In particular, merging this patchset blocks other projects so
From: Igor Mammedov
qapi/error.h is simple enough to be included in qom/object.h
direcly and prepares qom/object.h to use Error typedef.
Signed-off-by: Igor Mammedov
Signed-off-by: Michael S. Tsirkin
---
include/qom/object.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/
Callers pass in the address so it's helpful for
them to be able to decode it.
Reviewed-by: Gerd Hoffmann
Tested-by: Gerd Hoffmann
Signed-off-by: Michael S. Tsirkin
---
include/hw/pci/pcie_host.h | 21 +
hw/pci/pcie_host.c | 21 -
2 files changed,
Make it easy to add read-only helpers for simple
integer properties in memory.
Reviewed-by: Paolo Bonzini
Reviewed-by: Gerd Hoffmann
Tested-by: Gerd Hoffmann
Signed-off-by: Michael S. Tsirkin
---
include/qom/object.h | 21 ++
qom/object.c | 60 +
Reviewed-by: Gerd Hoffmann
Tested-by: Gerd Hoffmann
Signed-off-by: Michael S. Tsirkin
---
include/hw/nvram/fw_cfg.h | 4
hw/nvram/fw_cfg.c | 33 -
2 files changed, 32 insertions(+), 5 deletions(-)
diff --git a/include/hw/nvram/fw_cfg.h b/include/hw
BAR base was calculated incorrectly.
Use existing pci_bar_address to get it right.
Tested-by: Igor Mammedov
Signed-off-by: Michael S. Tsirkin
---
hw/pci/pci.c | 20
1 file changed, 12 insertions(+), 8 deletions(-)
diff --git a/hw/pci/pci.c b/hw/pci/pci.c
index 00554a0..c3f
Address is already exposed, expose size for symmetry.
Reviewed-by: Gerd Hoffmann
Tested-by: Gerd Hoffmann
Signed-off-by: Michael S. Tsirkin
---
include/hw/pci/pcie_host.h | 1 +
hw/pci-host/q35.c | 14 ++
2 files changed, 15 insertions(+)
diff --git a/include/hw/pci/pcie
Make it possible to test unmapped status through QMP.
Reviewed-by: Gerd Hoffmann
Tested-by: Gerd Hoffmann
Signed-off-by: Michael S. Tsirkin
---
include/hw/pci/pcie_host.h | 3 +++
hw/pci/pcie_host.c | 3 ---
2 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/include/hw/pci/
Useful to make it accessible through QOM.
Reviewed-by: Gerd Hoffmann
Tested-by: Gerd Hoffmann
Signed-off-by: Michael S. Tsirkin
---
include/hw/pci/pcie_host.h | 2 ++
hw/pci-host/q35.c | 2 +-
2 files changed, 3 insertions(+), 1 deletion(-)
diff --git a/include/hw/pci/pcie_host.h b/i
Don't abort if machine done callbacks add ROMs.
Reviewed-by: Gerd Hoffmann
Tested-by: Gerd Hoffmann
Signed-off-by: Michael S. Tsirkin
---
include/hw/loader.h | 1 +
hw/core/loader.c| 6 +-
vl.c| 3 +++
3 files changed, 9 insertions(+), 1 deletion(-)
diff --git a/includ
Support ROM blobs not mapped into guest memory:
same as ROM files really but use caller's buffer.
Support incoking callback on access and
return memory pointer making it easier
for caller to update memory if necessary.
Reviewed-by: Gerd Hoffmann
Tested-by: Gerd Hoffmann
Reviewed-by: Laszlo Erse
Add API to find pvpanic device and get its io port.
Will be used to fill in guest info structure.
Reviewed-by: Gerd Hoffmann
Tested-by: Gerd Hoffmann
Signed-off-by: Michael S. Tsirkin
---
include/hw/i386/pc.h | 1 +
hw/misc/pvpanic.c| 13 -
2 files changed, 13 insertions(+), 1
This defines a structure that will be used to fill in acpi tables
where relevant properties are not yet available using QOM.
Reviewed-by: Laszlo Ersek
Reviewed-by: Gerd Hoffmann
Tested-by: Gerd Hoffmann
Signed-off-by: Michael S. Tsirkin
---
include/hw/i386/pc.h | 9 +
hw/i386/pc.c
Avoid a bit of code duplication, make
max file path constant reusable.
Suggested-by: Laszlo Ersek
Reviewed-by: Gerd Hoffmann
Tested-by: Gerd Hoffmann
Signed-off-by: Michael S. Tsirkin
---
include/hw/nvram/fw_cfg.h | 4 +++-
hw/core/loader.c | 2 +-
2 files changed, 4 insertions(+), 2
update generated file, not sure what changed
Reviewed-by: Gerd Hoffmann
Tested-by: Gerd Hoffmann
Signed-off-by: Michael S. Tsirkin
---
hw/i386/ssdt-pcihp.hex.generated | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/hw/i386/ssdt-pcihp.hex.generated b/hw/i386/ssdt-pc
Add API to find HPET using QOM.
Reviewed-by: Gerd Hoffmann
Tested-by: Gerd Hoffmann
Signed-off-by: Michael S. Tsirkin
---
include/hw/timer/hpet.h | 2 ++
hw/timer/hpet.c | 5 +
2 files changed, 7 insertions(+)
diff --git a/include/hw/timer/hpet.h b/include/hw/timer/hpet.h
index 75
Reviewed-by: Gerd Hoffmann
Tested-by: Gerd Hoffmann
Signed-off-by: Michael S. Tsirkin
---
include/hw/i386/pc.h | 10 ++
hw/acpi/piix4.c | 6 +++---
2 files changed, 13 insertions(+), 3 deletions(-)
diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h
index 085a621..5aefc5b 10
We don't really support CPU throttling, so supply 0 PBLK length.
Reviewed-by: Gerd Hoffmann
Tested-by: Gerd Hoffmann
Signed-off-by: Michael S. Tsirkin
---
hw/i386/ssdt-proc.dsl | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/i386/ssdt-proc.dsl b/hw/i386/ssdt-proc.dsl
ind
On 10/03/2013 06:34 PM, Paolo Bonzini wrote:
Il 03/10/2013 12:28, Lei Li ha scritto:
The load_hook callback is only be called if the RAM_SAVE_FLAG_HOOK is
received.
To check this flags, it means there would be a check action first in
unix_accept_incoming_migration(), like:
f = qemu_fopen_pipe(c
This adds APIs that will be used to fill in
acpi tables, implemented using QOM,
to various ich9 components.
Some information is still missing in QOM,
so we fall back on lookups by type instead.
Reviewed-by: Gerd Hoffmann
Tested-by: Gerd Hoffmann
Signed-off-by: Michael S. Tsirkin
---
include/hw
This adds a dynamic bios linker/loader.
This will be used by acpi table generation
code to:
- load each table in the appropriate memory segment
- link tables to each other
- fix up checksums after said linking
Reviewed-by: Gerd Hoffmann
Tested-by: Gerd Hoffmann
Signed-off-by: Michael
Update generated ssdt proc hex file (used for systems
lacking IASL) after P_BLK length change.
Reviewed-by: Gerd Hoffmann
Tested-by: Gerd Hoffmann
Signed-off-by: Michael S. Tsirkin
---
hw/i386/ssdt-proc.hex.generated | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git
s...@weilnetz.de writes:
> Latest gcc-4.8 supports a new option -fsanitize=address which activates
> an AddressSanitizer. This AddressSanitizer stops the QEMU system emulation
> very early because two character arrays of size 8 are potentially written
> with 9 bytes.
>
> Commit 6ea314d91439741e95
Il 03/10/2013 15:29, Lei Li ha scritto:
> On 10/03/2013 06:34 PM, Paolo Bonzini wrote:
>> Il 03/10/2013 12:28, Lei Li ha scritto:
>>> The load_hook callback is only be called if the RAM_SAVE_FLAG_HOOK is
>>> received.
>>> To check this flags, it means there would be a check action first in
>>> unix
This adds APIs that will be used to fill in guest acpi tables.
Some required information is still lacking in QOM, so we
fall back on lookups by type and returning explicit types.
Reviewed-by: Gerd Hoffmann
Tested-by: Gerd Hoffmann
Signed-off-by: Michael S. Tsirkin
---
include/hw/acpi/piix4.h |
Detect presence of IASL compiler and use it
to process ASL source. If not there, use pre-compiled
files in-tree. Add script to update the in-tree files.
Note: distros are known to silently update iasl
so detect correct iasl flags for the installed version on each run as
opposed to at configure tim
From: Jan Kiszka
This will enable us to remove all remaining explicit calls of
qemu_flush_coalesced_mmio_buffer in IO handlers.
Signed-off-by: Jan Kiszka
Signed-off-by: Paolo Bonzini
---
include/exec/ioport.h | 2 ++
ioport.c | 9 +
2 files changed, 11 insertions(+)
diff
From: Jan Kiszka
This allows to remove the explicit qemu_flush_coalesced_mmio_buffer
calls - the memory core will invoke them now.
Signed-off-by: Jan Kiszka
Signed-off-by: Paolo Bonzini
---
hw/display/cirrus_vga.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/hw/displa
Three patches from Jan. They've never been posted publicly, so I'm doing that
to get them review and exposure. I'll send a pull request sometime next week.
Paolo
Jan Kiszka (3):
portio: Allow to mark portio lists as coalesced MMIO flushing
cirrus: Mark vga io region as coalesced MMIO flushi
From: Jan Kiszka
This allows to remove the explicit qemu_flush_coalesced_mmio_buffer
calls.
Signed-off-by: Jan Kiszka
Signed-off-by: Paolo Bonzini
---
hw/display/qxl.c | 1 +
hw/display/vga.c | 5 +
2 files changed, 2 insertions(+), 4 deletions(-)
diff --git a/hw/display/qxl.c b/hw/displ
From: Jan Kiszka
qemu_thread_create already does signal blocking and detaching for us.
Signed-off-by: Jan Kiszka
Signed-off-by: Paolo Bonzini
---
util/compatfd.c | 16 +++-
1 file changed, 3 insertions(+), 13 deletions(-)
diff --git a/util/compatfd.c b/util/compatfd.c
index 9cf3f
Post-order is the only sensible direction for the reset signals.
For example, suppose pre-order is used and the parent has some data
structures that cache children state (for example a list of active
requests). When the reset method is invoked on the parent, these caches
could be in any state.
If
PCI is handling resetting of its devices before the bus is reset,
but this is only necessary because qdev is broken and usually does
pre-order reset. Post-order is a much better definition. Drop
the unnecessary flexibility that lets bus decide the reset order,
convert to post-order, and make PCI
pci_device_reset will deassert the INTX pins, and this will make the
irq_count array all-zeroes. Check that this is the case, and remove
the existing loop which might even unsync irq_count and irq_state.
Signed-off-by: Paolo Bonzini
---
hw/pci/pci.c |7 ---
1 files changed, 4 insertions
qbus_reset_all can be used instead. There is no semantic change
because pcibus_reset returns 1 and takes care of the device
tree traversal.
Signed-off-by: Paolo Bonzini
---
hw/pci/pci.c |8 ++--
hw/pci/pci_bridge.c |2 +-
include/hw/pci/pci.h |1 -
3 files changed, 3 in
Resetting should be done in post-order, not pre-order. However,
qdev_walk_children and qbus_walk_children do not allow this. Fix
it by adding two extra arguments to the functions.
Signed-off-by: Paolo Bonzini
---
hw/core/qdev.c | 45 +
incl
On Thu, Oct 03, 2013 at 03:46:11PM +0200, Paolo Bonzini wrote:
> PCI is handling resetting of its devices before the bus is reset,
> but this is only necessary because qdev is broken and usually does
> pre-order reset. Post-order is a much better definition. Drop
> the unnecessary flexibility tha
On 10/03/2013 09:34 PM, Paolo Bonzini wrote:
Il 03/10/2013 15:29, Lei Li ha scritto:
On 10/03/2013 06:34 PM, Paolo Bonzini wrote:
Il 03/10/2013 12:28, Lei Li ha scritto:
The load_hook callback is only be called if the RAM_SAVE_FLAG_HOOK is
received.
To check this flags, it means there would be
On 3 October 2013 13:59, Peter Maydell wrote:
> On 3 October 2013 21:51, Will Newton wrote:
>>
>> This adds support for the VSEL floating point selection instruction
>> which was added in ARMv8. It is based on the previous patch[1] from
>> Mans Rullgard, but attempts to address the feedback given
This adds support for the VSEL floating point selection instruction
which was added in ARMv8.
Signed-off-by: Will Newton
---
target-arm/translate.c | 115 ++---
1 file changed, 110 insertions(+), 5 deletions(-)
Changes in v3:
- Move calls to disas_v
On 3 October 2013 23:31, Will Newton wrote:
> On 3 October 2013 13:59, Peter Maydell wrote:
>> This isn't what I meant. If our decoding matches up with the ARM ARM
>> then this instruction pattern should already fall into disas_vfp_insn(),
>> and we shouldn't need an extra check and call. (If it'
On 10/03/2013 05:51 AM, Will Newton wrote:
> +case 0: /* eq: Z */
> +tcg_gen_movcond_i64(TCG_COND_EQ, ftmp3, cpu_ZF, zero,
> +ftmp1, ftmp2);
> +break;
Does this compile when configured w
Quoting Vasile Dumitrescu (launchpad.vas...@undeva.net):
> I added a rtl8139c netcard to the VM and connected through it by RDP -
> no more freezes.
>
> It looks like kvm does not play well with virtio network cards and RDP.
>
> Red Hat virtio net windows driver version: 62.65.104.6500, 6/19/2013
On 10/02/2013 04:33 AM, Michael Mueller wrote:
> +/* set a specific bit in facility set */
> +static void set_facility(unsigned int nr, void *facilities)
> +{
> +unsigned char *ptr;
> +
> +if (nr >= MAX_S390_FACILITY_BIT) {
> +return;
> +}
> +ptr = (unsigned char *) faciliti
I sent v7 only today but that submission was botched:
v7 was already sent yesterday, and missed a typo reported
by Eric.
Besides, I fixed whitespace issues noted by Igor.
Resending properly, sorry about the noise.
This code can also be found here:
git://git.kernel.org/pub/scm/virt/kvm/mst/qemu.git
BAR base was calculated incorrectly.
Use existing pci_bar_address to get it right.
Tested-by: Igor Mammedov
Signed-off-by: Michael S. Tsirkin
---
hw/pci/pci.c | 20
1 file changed, 12 insertions(+), 8 deletions(-)
diff --git a/hw/pci/pci.c b/hw/pci/pci.c
index 00554a0..c3f
now that a typedef for struct Error is available,
use it in qom/object.h to match coding style rules.
Reviewed-by: Paolo Bonzini
Reviewed-by: Gerd Hoffmann
Tested-by: Gerd Hoffmann
Signed-off-by: Michael S. Tsirkin
---
include/qom/object.h | 50 +---
Address is already exposed, expose size for symmetry.
Reviewed-by: Gerd Hoffmann
Tested-by: Gerd Hoffmann
Signed-off-by: Michael S. Tsirkin
---
include/hw/pci/pcie_host.h | 1 +
hw/pci-host/q35.c | 14 ++
2 files changed, 15 insertions(+)
diff --git a/include/hw/pci/pcie
From: Igor Mammedov
qapi/error.h is simple enough to be included in qom/object.h
direcly and prepares qom/object.h to use Error typedef.
Signed-off-by: Igor Mammedov
Signed-off-by: Michael S. Tsirkin
---
include/qom/object.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/
Reviewed-by: Gerd Hoffmann
Tested-by: Gerd Hoffmann
Signed-off-by: Michael S. Tsirkin
---
include/hw/nvram/fw_cfg.h | 4
hw/nvram/fw_cfg.c | 33 -
2 files changed, 32 insertions(+), 5 deletions(-)
diff --git a/include/hw/nvram/fw_cfg.h b/include/hw
update generated file, not sure what changed
Reviewed-by: Gerd Hoffmann
Tested-by: Gerd Hoffmann
Signed-off-by: Michael S. Tsirkin
---
hw/i386/ssdt-pcihp.hex.generated | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/hw/i386/ssdt-pcihp.hex.generated b/hw/i386/ssdt-pc
Support ROM blobs not mapped into guest memory:
same as ROM files really but use caller's buffer.
Support incoking callback on access and
return memory pointer making it easier
for caller to update memory if necessary.
Reviewed-by: Gerd Hoffmann
Tested-by: Gerd Hoffmann
Reviewed-by: Laszlo Erse
Avoid a bit of code duplication, make
max file path constant reusable.
Suggested-by: Laszlo Ersek
Reviewed-by: Gerd Hoffmann
Tested-by: Gerd Hoffmann
Signed-off-by: Michael S. Tsirkin
---
include/hw/nvram/fw_cfg.h | 4 +++-
hw/core/loader.c | 2 +-
2 files changed, 4 insertions(+), 2
Make it possible to test unmapped status through QMP.
Reviewed-by: Gerd Hoffmann
Tested-by: Gerd Hoffmann
Signed-off-by: Michael S. Tsirkin
---
include/hw/pci/pcie_host.h | 3 +++
hw/pci/pcie_host.c | 3 ---
2 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/include/hw/pci/
Callers pass in the address so it's helpful for
them to be able to decode it.
Reviewed-by: Gerd Hoffmann
Tested-by: Gerd Hoffmann
Signed-off-by: Michael S. Tsirkin
---
include/hw/pci/pcie_host.h | 21 +
hw/pci/pcie_host.c | 21 -
2 files changed,
This adds a dynamic bios linker/loader.
This will be used by acpi table generation
code to:
- load each table in the appropriate memory segment
- link tables to each other
- fix up checksums after said linking
Reviewed-by: Gerd Hoffmann
Tested-by: Gerd Hoffmann
Signed-off-by: Michael
Useful to make it accessible through QOM.
Reviewed-by: Gerd Hoffmann
Tested-by: Gerd Hoffmann
Signed-off-by: Michael S. Tsirkin
---
include/hw/pci/pcie_host.h | 2 ++
hw/pci-host/q35.c | 2 +-
2 files changed, 3 insertions(+), 1 deletion(-)
diff --git a/include/hw/pci/pcie_host.h b/i
Add API to find HPET using QOM.
Reviewed-by: Gerd Hoffmann
Tested-by: Gerd Hoffmann
Signed-off-by: Michael S. Tsirkin
---
include/hw/timer/hpet.h | 2 ++
hw/timer/hpet.c | 5 +
2 files changed, 7 insertions(+)
diff --git a/include/hw/timer/hpet.h b/include/hw/timer/hpet.h
index 75
This defines a structure that will be used to fill in acpi tables
where relevant properties are not yet available using QOM.
Reviewed-by: Laszlo Ersek
Reviewed-by: Gerd Hoffmann
Tested-by: Gerd Hoffmann
Signed-off-by: Michael S. Tsirkin
---
include/hw/i386/pc.h | 9 +
hw/i386/pc.c
We don't really support CPU throttling, so supply 0 PBLK length.
Reviewed-by: Gerd Hoffmann
Tested-by: Gerd Hoffmann
Signed-off-by: Michael S. Tsirkin
---
hw/i386/ssdt-proc.dsl | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/i386/ssdt-proc.dsl b/hw/i386/ssdt-proc.dsl
ind
Reviewed-by: Gerd Hoffmann
Tested-by: Gerd Hoffmann
Signed-off-by: Michael S. Tsirkin
---
include/hw/i386/pc.h | 10 ++
hw/acpi/piix4.c | 6 +++---
2 files changed, 13 insertions(+), 3 deletions(-)
diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h
index 085a621..5aefc5b 10
This adds APIs that will be used to fill in guest acpi tables.
Some required information is still lacking in QOM, so we
fall back on lookups by type and returning explicit types.
Reviewed-by: Gerd Hoffmann
Tested-by: Gerd Hoffmann
Signed-off-by: Michael S. Tsirkin
---
include/hw/acpi/piix4.h |
This adds APIs that will be used to fill in
acpi tables, implemented using QOM,
to various ich9 components.
Some information is still missing in QOM,
so we fall back on lookups by type instead.
Reviewed-by: Gerd Hoffmann
Tested-by: Gerd Hoffmann
Signed-off-by: Michael S. Tsirkin
---
include/hw
On 3 October 2013 15:34, Richard Henderson wrote:
> On 10/03/2013 05:51 AM, Will Newton wrote:
>> +case 0: /* eq: Z */
>> +tcg_gen_movcond_i64(TCG_COND_EQ, ftmp3, cpu_ZF,
>> zero,
>> +ftmp1, ftmp2);
>> +
Add API to find pvpanic device and get its io port.
Will be used to fill in guest info structure.
Reviewed-by: Gerd Hoffmann
Tested-by: Gerd Hoffmann
Signed-off-by: Michael S. Tsirkin
---
include/hw/i386/pc.h | 1 +
hw/misc/pvpanic.c| 13 -
2 files changed, 13 insertions(+), 1
Update generated ssdt proc hex file (used for systems
lacking IASL) after P_BLK length change.
Reviewed-by: Gerd Hoffmann
Tested-by: Gerd Hoffmann
Signed-off-by: Michael S. Tsirkin
---
hw/i386/ssdt-proc.hex.generated | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git
Don't abort if machine done callbacks add ROMs.
Reviewed-by: Gerd Hoffmann
Tested-by: Gerd Hoffmann
Signed-off-by: Michael S. Tsirkin
---
include/hw/loader.h | 1 +
hw/core/loader.c| 6 +-
vl.c| 3 +++
3 files changed, 9 insertions(+), 1 deletion(-)
diff --git a/includ
On 10/03/2013 08:10 AM, Will Newton wrote:
> No, thanks for picking that up. I was wondering if that was valid and
> the code seemed to work. What's the best way to work around the
> problem? Just extend everything up to 64bits?
For the simple conditions, yes. For the more complex ones,
you might
1 - 100 of 128 matches
Mail list logo
