Il 02/03/2013 04:13, Anthony Liguori ha scritto:
> There is no valid use-case of rng-random other than using /dev/random.
> In fact, it was probably a mistake to even allow a filename to be
> specified because it lets people do silly things (like /dev/urandom).
>
> If you want anything other than
Here's the latest incarnation of the moxie patch set. I believe I've
addressed all of the major concerns and then some.
I ended up implementing moxie's new exception semantics so now
division by zero and illegal instructions both trap to an exception
handler routine. I was able to test this with
Signed-off-by: Anthony Green
---
disas.c | 6 +
disas/Makefile.objs | 1 +
disas/moxie.c | 360
include/disas/bfd.h | 2 +
4 files changed, 369 insertions(+)
create mode 100644 disas/moxie.c
diff --git a/disas.c b/dis
Signed-off-by: Anthony Green
---
MAINTAINERS | 5 +
arch_init.c | 2 ++
configure | 9 -
cpu-exec.c| 2 ++
default-configs/moxie-softmmu.mak | 2 ++
qapi-schema.json | 6 +++--
Signed-off-by: Anthony Green
---
target-moxie/Makefile.objs |2 +
target-moxie/cpu.c | 172
target-moxie/cpu.h | 170
target-moxie/helper.c | 97 +
target-moxie/helper.h |9 +
target-moxie/machine.c | 27 ++
target-moxie/machine.h
Signed-off-by: Anthony Green
---
hw/moxie/Makefile.objs | 6 ++
hw/moxie/moxiesim.c| 174 +
include/sysemu/arch_init.h | 1 +
3 files changed, 181 insertions(+)
create mode 100644 hw/moxie/Makefile.objs
create mode 100644 hw/moxie/mox
Eduardo, Andreas,
Thanks for pointing out, we didn't know about this limitation of
qemu-common.h usage.
Include directive will be moved to corresponding .c file.
Dmitry.
On Tue, Feb 26, 2013 at 3:38 PM, Eduardo Habkost wrote:
> On Mon, Feb 25, 2013 at 09:37:52PM +0100, Andreas Färber wrote:
>
Thanks Andreas,
fixed.
On Mon, Feb 25, 2013 at 10:37 PM, Andreas Färber wrote:
> Am 25.02.2013 21:11, schrieb Dmitry Fleytman:
> > Signed-off-by: Dmitry Fleytman
> > Signed-off-by: Yan Vugenfirer
> > ---
> > include/net/checksum.h | 8
> > net/checksum.c | 28 +++
Andreas, thanks for your review.
The issue is we were developing this device using other devices code
(mainly e1000 and virtio-net) as a reference, and unfortunately they don't
follow current QOM rules.
Also these patches are pretty long-living (around a year already), I'm not
sure what was the pr
net_checksum_add_cont()
checksum calculation for scattered data with odd chunk sizes
net_raw_checksum()
checksum calculation for a buffer
Signed-off-by: Dmitry Fleytman
Signed-off-by: Yan Vugenfirer
---
include/net/checksum.h | 14 +-
net/checksum.c | 13 +++--
2 fi
Signed-off-by: Dmitry Fleytman
Signed-off-by: Yan Vugenfirer
---
include/net/checksum.h | 12
net/checksum.c | 29 +
2 files changed, 41 insertions(+)
diff --git a/include/net/checksum.h b/include/net/checksum.h
index 3e7b93d..80203fb 100644
---
This set of patches implements VMWare VMXNET3 paravirtual NIC device.
The device supports of all the device features including offload capabilties,
VLANs and etc.
The device is tested on different OSes:
Fedora 15
Ubuntu 10.4
Centos 6.2
Windows 2008R2
Windows 2008 64bit
Windo
Signed-off-by: Dmitry Fleytman
Signed-off-by: Yan Vugenfirer
---
hw/Makefile.objs | 1 +
hw/vmxnet_rx_pkt.c | 187 ++
hw/vmxnet_rx_pkt.h | 174
hw/vmxnet_tx_pkt.c | 567 +
hw/vmxnet_tx_pkt.h | 148 ++
Signed-off-by: Dmitry Fleytman
Signed-off-by: Yan Vugenfirer
---
hw/vmware_utils.h | 143 ++
hw/vmxnet_debug.h | 115 ++
include/net/eth.h | 347 ++
net/Makefile.objs | 1 +
net/eth.c | 217
On 2 March 2013 12:24, Anthony Green wrote:
> +uint32_t helper_div(CPUMoxieState *env, uint32_t pc, uint32_t a, uint32_t b)
> +{
> +if (unlikely(b == 0)) {
> +helper_raise_exception(env, pc, MOXIE_EX_DIV0);
This never returns, so the following 'return' is unreachable.
> +retu
---
hw/mips_gcmpregs.h | 122
hw/mips_gic.c | 418 +
hw/mips_gic.h | 378
3 files changed, 918 insertions(+)
create mode 100644 hw/mips_gcmpregs.h
create mode 100644 hw
---
hw/gt64xxx.c | 317 +++
1 file changed, 317 insertions(+)
diff --git a/hw/gt64xxx.c b/hw/gt64xxx.c
index 977a2c5..3583ca8 100644
--- a/hw/gt64xxx.c
+++ b/hw/gt64xxx.c
@@ -31,6 +31,8 @@
//#define DEBUG
+#define GT64XXX_VM_VERSION
---
linux-headers/asm-mips/kvm.h | 94 +++
linux-headers/asm-mips/kvm_para.h | 10 +
2 files changed, 104 insertions(+)
create mode 100644 linux-headers/asm-mips/kvm.h
create mode 100644 linux-headers/asm-mips/kvm_para.h
diff --git a/linux-headers/as
---
kvm-all.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/kvm-all.c b/kvm-all.c
index 4decfdc..2ac9e88 100644
--- a/kvm-all.c
+++ b/kvm-all.c
@@ -1966,7 +1966,12 @@ int kvm_set_signal_mask(CPUArchState *env, const
sigset_t *sigset)
sigmask = g_malloc(sizeof(*sigmask) + sizeof(
---
target-mips/kvm.c | 292 +
target-mips/kvm_mips.h | 21
2 files changed, 313 insertions(+)
create mode 100644 target-mips/kvm.c
create mode 100644 target-mips/kvm_mips.h
diff --git a/target-mips/kvm.c b/target-mips/kvm.c
new file mo
2013/3/2 Sanjay Lal :
> +static void gt64xxx_save(QEMUFile *f, void *opaque)
> +{
> +GT64120State *s = opaque;
> +
> +/* CPU Configuration */
> +qemu_put_be32s(f, &s->regs[GT_CPU]);
> +qemu_put_be32s(f, &s->regs[GT_MULTI]);
Definitely no new save/load functions like this in new co
The following patchset implements KVM support for MIPS32 processors,
using Trap & Emulate, with basic runtime binary translation to improve
performance.
In KVM mode, CPU virtualization is handled via the kvm kernel module,
while system and I/O virtualization leverage the Malta model already presen
- In KVM mode the bootrom is loaded and executed from the last 1MB of DRAM.
- Use the CPS bootrom from MIPS in KVM mode. This allows bootstrapping of
multiple cores.
- Add suport for MIPS GIC emulation for SMP Guests.
---
hw/mips_malta.c | 192 +
---
configure | 17 +++--
hw/mips/Makefile.objs | 2 +-
target-mips/Makefile.objs | 1 +
3 files changed, 17 insertions(+), 3 deletions(-)
diff --git a/configure b/configure
index bf5970f..5447661 100755
--- a/configure
+++ b/configure
@@ -1370,7 +1370,12 @@ case
On 2 March 2013 15:18, Sanjay Lal wrote:
> ---
> configure | 17 +++--
> hw/mips/Makefile.objs | 2 +-
> target-mips/Makefile.objs | 1 +
> 3 files changed, 17 insertions(+), 3 deletions(-)
>
> diff --git a/configure b/configure
> index bf5970f..5447661 100755
>
On 2 March 2013 15:18, Sanjay Lal wrote:
> ---
> linux-headers/asm-mips/kvm.h | 94
> +++
> linux-headers/asm-mips/kvm_para.h | 10 +
Please don't supply QEMU patches that update the linux-header files
without specifying which kernel tree and git revi
On 2 March 2013 15:18, Sanjay Lal wrote:
> +/* If we have an interrupt but the guest is not ready to receive an
> + * interrupt, request an interrupt window exit. This will
> + * cause a return to userspace as soon as the guest is ready to
> + * receive interrupts.
> + */
> +
---
hw/mips_cps_bootcode.h | 310 +
1 file changed, 310 insertions(+)
create mode 100644 hw/mips_cps_bootcode.h
diff --git a/hw/mips_cps_bootcode.h b/hw/mips_cps_bootcode.h
new file mode 100644
index 000..40289a4
--- /dev/null
+++ b/hw/mips_cps
---
hw/mips_int.c | 15 +++
1 file changed, 15 insertions(+)
diff --git a/hw/mips_int.c b/hw/mips_int.c
index 6423fd0..6c655af 100644
--- a/hw/mips_int.c
+++ b/hw/mips_int.c
@@ -23,6 +23,8 @@
#include "hw.h"
#include "mips_cpudevs.h"
#include "cpu.h"
+#include "sysemu/kvm.h"
+#incl
---
hw/mips_cps_bootcode.h | 310 +
1 file changed, 310 insertions(+)
create mode 100644 hw/mips_cps_bootcode.h
diff --git a/hw/mips_cps_bootcode.h b/hw/mips_cps_bootcode.h
new file mode 100644
index 000..40289a4
--- /dev/null
+++ b/hw/mips_cps
In trap and emulate mode both the guest kernel and guest userspace execute in
UM:
Guest User address space: 0x -> 0x4000
Guest Kernel Unmapped: 0x4000 -> 0x6000
Guest Kernel Mapped:0x6000 -> 0x8000
---
hw/mips_addr.c| 14 ++
h
---
hw/mips_timer.c | 13 +
1 file changed, 9 insertions(+), 4 deletions(-)
diff --git a/hw/mips_timer.c b/hw/mips_timer.c
index 83c400c..0c86a3b 100644
--- a/hw/mips_timer.c
+++ b/hw/mips_timer.c
@@ -19,11 +19,13 @@
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DE
---
target-mips/mips-defs.h | 5 +
1 file changed, 5 insertions(+)
diff --git a/target-mips/mips-defs.h b/target-mips/mips-defs.h
index bf094a3..473ddf8 100644
--- a/target-mips/mips-defs.h
+++ b/target-mips/mips-defs.h
@@ -5,7 +5,12 @@
//#define USE_HOST_FLOAT_REGS
/* Real pages are vari
On 2 March 2013 15:18, Sanjay Lal wrote:
> --- /dev/null
> +++ b/hw/mips_cps_bootcode.h
> @@ -0,0 +1,310 @@
> +/* Sample boot code for 1004K CPS (Coherent Processing System.)
> + * Not Generic for all Release 2 or higher MIPS32 or MIPS64 processors
> + *
> + * Copyright (c) 2006,2008 MIPS Technolo
** Tags added: qemu-user-ubuntu
--
You received this bug notification because you are a member of qemu-
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https://bugs.launchpad.net/bugs/1077116
Title:
automoc4 segfaults when building in an armhf pbuilder on an amd64 host
Status in QEMU:
New
Status in
@John,
as the bug description was about the 12.04 libreoffice build, i'm
actually using a raring host with 1.4.0 qemu-user-static, with a
*precise* armhf container. The precise libreoffice has been building
all day friday and friday so far with no incidents.
In a raring chroot, I've not been abl
Hi All,
On Sat, Mar 2, 2013 at 2:13 PM, Peter Crosthwaite
wrote:
> Hi Kuo-Jung,
>
> On Wed, Feb 27, 2013 at 5:15 PM, Kuo-Jung Su wrote:
>> From: Kuo-Jung Su
>>
>> The FTINTC020 interrupt controller supports both FIQ and IRQ signals
>> to the microprocessor.
>> It can handle up to 64 configurabl
In certain cases a device model can init with neither a Device::realize or
SysBusDevice::init (i.e. when its possible to do everything in Object::init).
In this case, the device model should be able to leave both SysBusDevice::init
and Device::realize as NULL. However what happens in this case in S
Hi All. This is a new scheme i've come up with handling device registers in a
data driven way. My motivation for this is to factor out a lot of the access
checking that seems to be replicated in every device. See P2 commit message for
further discussion.
P1 is an extension of qemu_log to query wha
Useful for heavy users of qemu_log_mask that want to avoid executing expensive
logic that sets up a qemu_log_mask when that mask is disabled. E.G.
if (qemu_log_get_mask() && LOG_GUEST_ERROR) {
/* do my expensive logging data query */
}
qemu_log_mask(LOG_GUEST_ERROR, ...)
Signed-off-by: Pe
This struct and functions provide some encapsulation of the uint32_t type to
make it more friendly for use as guest accessible device state. Bits of device
state (usually MMIO registers), often have all sorts of access restrictions
and semantics associated with them. This struct allow you to define
From: Peter A. G. Crosthwaite
Minimal device model for devcfg module of Zynq. DMA capabilities and interrupt
generation supported. Lock mechanisms supported.
Signed-off-by: Peter A. G. Crosthwaite
---
hw/arm/Makefile.objs |2 +-
hw/xilinx_devcfg.c | 443
From: Peter A. G. Crosthwaite
Signed-off-by: Peter A. G. Crosthwaite
---
hw/xilinx_zynq.c |6 ++
1 files changed, 6 insertions(+), 0 deletions(-)
diff --git a/hw/xilinx_zynq.c b/hw/xilinx_zynq.c
index 2f67d90..16d8dc8 100644
--- a/hw/xilinx_zynq.c
+++ b/hw/xilinx_zynq.c
@@ -196,6 +196
Hi Kuo-Jung,
On Sat, Mar 2, 2013 at 2:13 PM, Peter Crosthwaite
wrote:
> Hi Kuo-Jung,
>
> On Wed, Feb 27, 2013 at 5:15 PM, Kuo-Jung Su wrote:
>> From: Kuo-Jung Su
>>
>> The FTINTC020 interrupt controller supports both FIQ and IRQ signals
>> to the microprocessor.
>> It can handle up to 64 config
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