From: David Gibson
The virtio-scsi config space is, by specification, in guest endian (which
is ill-defined, but there you go). In virtio_scsi_get_config() we set up
all the fields in there, using stl_raw(). Which is a problem for the
max_channel and max_target fields, which are 16-bit, not 32-
Hi Alex,
On 1 December 2012 20:39, Alex Horn wrote:
> Hello all,
>
> As I have been browsing through QEMU's source code, I've noticed a
> hardware model for a temperature sensor called TMP105. This model
> implements the function tmp105_set(I2CSlave *i2c, int temp) declared
> in i2c.h [0, 1].
>
>
From: Dmitry Fleytman
Real HW always treats RX ring with RDH == RDT as empty.
Emulation is supposed to behave the same.
Reported-by: Chris Webb
Reported-by: Richard Davies
Signed-off-by: Dmitry Fleytman
Signed-off-by: Stefan Hajnoczi
(cherry picked from commit e5b8b0d4ba29fe1268ba049519a1b0c
From: Peter Lieven
If the connection is interrupted before the first login is successfully
completed qemu-kvm is waiting forever in qemu_aio_wait().
This is fixed by performing an sync login to the target. If the
connection breaks after the first successful login errors are
handled internally by
From: Peter Lieven
Without any complex checks we can't assume that an
iscsi target is initialized to zero.
Signed-off-by: Peter Lieven
Signed-off-by: Paolo Bonzini
(cherry picked from commit f807ecd5741325fe0d281199ff22cdda0acb6a7a)
Signed-off-by: Michael Roth
---
block/iscsi.c |6 +
On Mon, 3 Dec 2012 15:27:57 -0200
Eduardo Habkost wrote:
> Instead of using parsing the whole cpu_model string inside
> cpu_x86_find_by_name(), first split it into the CPU model name and the
> full feature string, then parse the feature string into pieces.
>
> When using CPU model classes, thos
From: Aurelien Jarno
The bswap16 TCG opcode assumes that the high bytes of the temp equal
to 0 before calling it. The ARM backend implementation takes this
assumption to slightly optimize the generated code.
The same implementation is called for implementing the cross-endian
qemu_st16 opcode, wh
From: Michael Contreras
The e1000_receive function for the e1000 needs to discard packets longer than
1522 bytes if the SBP and LPE flags are disabled. The linux driver assumes
this behavior and allocates memory based on this assumption.
Signed-off-by: Michael Contreras
Signed-off-by: Anthony L
From: Gerd Hoffmann
Don't try to be clever and skip displaysurface reinitialization in case
the size hasn't changed. Other parameters might have changed
nevertheless, for example depth or stride, resulting in rendering being
broken then.
Trigger: boot linux guest with vesafb, start X11, make su
From: Stefan Weil
Those functions return -errno in case of an error.
The old code would typically only detect EPERM (1) errors.
Signed-off-by: Stefan Weil
Signed-off-by: Stefan Hajnoczi
(cherry picked from commit 7a608f562ebd91e811ed0b725e528c894e4f19c4)
Signed-off-by: Michael Roth
---
hw/n
From: Paolo Bonzini
When setting a date in 1980, Linux is actually disregarding the century
byte and setting the year to 2080. This causes a year-2038 overflow
in mktimegm. Fix this by doing the days-to-seconds computation in
64-bit math.
Reported-by: Lucas Meneghel Rodrigues
Signed-off-by: P
From: Aurelien Jarno
On an ARM host, the registers definitions from cpu.h clash
with /usr/include/sys/ucontext.h. As there are unused, just remove
them.
Cc: Jia Liu
Cc: qemu-sta...@nongnu.org
Reviewed-by: Peter Maydell
Signed-off-by: Aurelien Jarno
(cherry picked from commit 44e04d3b945ba6f5c
From: Avi Kivity
The memory core drops regions that are hidden by another region (for example,
during BAR sizing), but it doesn't do so correctly if the lower address of the
existing range is below the lower address of the new range.
Example (qemu-system-mips -M malta -kernel vmlinux-2.6.32-5-4k
From: Bruce Rogers
When building qemu-kvm for openSUSE:Factory, I am getting a
warning in the pipe2 detection performed by configure, which
prevents using --enable-werror.
Change detection code to use return value of pipe2.
Signed-off-by: Bruce Rogers
Reviewed-by: Peter Maydell
Signed-off-by:
From: Paolo Bonzini
We do not need BLKROSET if the kernel supports setting flags.
Also, always do BLKROSET even for a read-write export, otherwise
the read-only state remains "sticky" after the invocation of
"qemu-nbd -r".
Signed-off-by: Paolo Bonzini
(cherry picked from commit c8969eded252058e
On Mon, Dec 03, 2012 at 10:51:49PM +0400, Igor Mitsyanko wrote:
>On 12/02/2012 06:57 AM, Andreas Färber wrote:
>>It uses a different capsbase and opregbase than the Xilinx device.
>>
>>Signed-off-by: Liming Wang
>>Signed-off-by: Andreas Färber
>>Cc: Igor Mitsyanko
>>---
>> hw/usb/hcd-ehci-sysbu
I've sent these before, and reminded several times about the first one
at least, but they still slipped through the cracks and didn't make it
into 1.3. The first at least should go into the stable tree - it is a
very simple bugfix for a serious bug (qemu and possibly also guest
memory corruption).
The code for migrating (or savevm-ing) memory pages starts off by creating
a dirty bitmap and filling it with 1s. Except, actually, because bit
addresses are 0-based it fills every bit except bit 0 with 1s and puts an
extra 1 beyond the end of the bitmap, potentially corrupting unrelated
memory.
madvise(DONTNEED) will throw away the contents of the whole page at the
given address, even if the given length is less than the page size. One
can argue about whether that's the correct behaviour, but that's what it's
done for a long time in Linux at least.
That means that the madvise() in ram_l
David Gibson writes:
> I've sent these before, and reminded several times about the first one
> at least, but they still slipped through the cracks and didn't make it
> into 1.3. The first at least should go into the stable tree - it is a
> very simple bugfix for a serious bug (qemu and possibly
在 2012-12-03一的 12:19 +0100，Andreas Färber写道：
> Am 03.12.2012 10:43, schrieb Jan Kiszka:
> > On 2012-12-03 04:07, liguang wrote:
> >> 1. define names of breakpoints in dr7
> >> 2. slightly refactor bits field of breakpoint
> >>related functions.
> >
> > Two topics, (at least) two patches, pleas
在 2012-12-03一的 10:43 +0100，Jan Kiszka写道：
> On 2012-12-03 04:07, liguang wrote:
> > 1. define names of breakpoints in dr7
> > 2. slightly refactor bits field of breakpoint
> >related functions.
>
> Two topics, (at least) two patches, please. The code is hairy - not your
> fault, you actually tr
On Fri, 30 Nov 2012 17:27:18 -0200
Eduardo Habkost wrote:
> Add vmstate stub functions, so that qdev.o can be used without savevm.o
> when vmstate support is not necessary (i.e. by *-user).
>
> Signed-off-by: Eduardo Habkost
> ---
> Originally submitted as:
> Subject: qdev-core: isolate vmsta
Attached Diff to resolve the "open issue" and to also to begin to cater
for the fact that an image copy of streamoptimzed format is not
supported. This will be added in later fix pending acceptance here.
** Attachment added: "rhubbard-patch-fix-vmdk"
https://bugs.launchpad.net/qemu/+bug/107525
Hi Stefan,
I have uploaded a patch - I am failing miserably to get any output from git
patch!! ... :^( . the code is structured to addres the fact that
convert will not work today, needs lots of work to do this. This would be
next effort.
i have a sub branch ...
root@rhubbard qemu]# git statu
From: Michael Ellerman
The kernel will soon be able to service some RTAS calls. However the
choice of tokens will still be up to userspace. To support this have
spapr_rtas_register() return the token that is allocated for an
RTAS call, that allows the calling code to tell the kernel what the
toke
Currently in the reset code for the XICS interrupt controller, we
initialize the pending_priority field to 0 (most favored, by XICS
convention). This is incorrect, since there is no pending interrupt, it
should be set to least favored - 0xff. At the moment our XICS
implementation doesn't get hurt
From: Ben Herrenschmidt
Kernel-based RTAS calls will not have a qemu handler, but will
still be registered in qemu in order to be assigned a token
number and appear in the device-tree.
Let's test for the name being NULL rather than the handler
when deciding to skip an entry while building the de
The hwaddr type is somewhat vaguely defined as being able to contain bus
addresses on the widest possible bus in the system. For that reason it's
discouraged for representing specific pieces of persistent hardware state,
which should instead use an explicit width type that matches the bits
availab
Here's my currently pending set of ready-to-go patches for the pseries
machine. A number of these were sent before and may be in the
ppc-next tree, but did not make it into 1.3. 10-13 however, are new
patches, or at least reworkings of patches that were rejected in their
original form.
Alex, ple
On Tue, Dec 04, 2012 at 01:42:17PM +1100, David Gibson wrote:
> From: Mike Qiu
Oops, messed this one up, build error for user only builds. Fixed
version below.
>From d2cc6bcee4737647c4bbbf65d3c0129d4a119dd3 Mon Sep 17 00:00:00 2001
From: Mike Qiu
Date: Tue, 4 Dec 2012 10:52:14 +1100
Subject: [
Hi all,
I want to rework the qemu virtio subsystem, but various
structures are currently blatted to disk in save/load. So I looked at
altering that, only to discover that it needs conversion to vmstate, and
2009 patches in patchwork which have never been applied.
Has there been any progr
Currently the XICS irq controller code has a per-irq state structure which
amongst other things includes whether the interrupt is level or message
triggered - this is configured by the platform code, and is not directly
visible to the guest. This leads to a slightly awkward construct at reset
time
If no image file for NVRAM is specified, the pseries machine currently
creates a 16K non-persistent NVRAM by default. This basically works, but
is not large enough for current firmware and guest kernels to create all
the NVRAM partitions they would like to. Increasing the default size to
64K addr
The PAPR specification requires that every bus or device mediated by the
IOMMU have a unique Logical IO Bus Number (LIOBN). This patch adds a check
to enforce this, which will help catch errors in configuration earlier.
Signed-off-by: David Gibson
---
hw/spapr_iommu.c |6 ++
1 file chan
Resent for that 1.3 have been released. I think this problem should
be fixed otherwise out of tree build fails strangely.
>Currently .c files generated in ./tests are not deleted in make
> clean. This introduce trouble that, once we made tests in source
> root directory, we can't do a succes
From: Mike Qiu
Currently the target-ppc tcg code only supports a single thread. You can
specify more, but they're treated identically to multiple cores. On KVM
we obviously can't support more threads than the hardware; if more are
specified it will cause strange and cryptic errors.
This patch
The PAPR specification requires a certain amount of NVRAM, accessed via
RTAS, which we don't currently implement in qemu. This patch addresses
this deficiency, implementing the NVRAM as a VIO device, with some glue to
instantiate it automatically based on a machine option.
The machine option spec
This patch adds tracing / debugging calls to the XICS interrupt controller
implementation used on the pseries machine.
Signed-off-by: Ben Herrenschmidt
Signed-off-by: David Gibson
---
hw/xics.c| 23 ---
trace-events | 13 +
2 files changed, 33 insertions(
From: Ben Herrenschmidt
Currently the lowest "real" irq number for the XICS irq controller (as
opposed to numbers reserved for IPIs and other special purposes) is
hard coded as 16 in two places - in xics_system_init() and in spapr.c.
As well as being generally bad practice, we're going to need t
PAPR requires that the device tree's CPU nodes have several properties
with information about the L1 cache. We created two of these
properties, but with incorrect names - "[id]cache-block-size" instead
of "[id]-cache-block-size" (note the extra hyphen).
We were also missing some of the required c
On 12/04/2012 02:55 AM, Jean-Christophe DUBOIS wrote:
Check for a 0 "distance" value to avoid infinite loop when the
expired FCR timer was not programed with auto-increment.
With this change the behavior is coherent with the same type
of code in the exynos4210_gfrc_restart() function in the same
Acked-By: ronniesahlb...@gmail.com (Ronnie Sahlberg)
This verified that the service is actually operational and is much
more reliable than TCP-KEEPALIVES.
This is the proper way to monitor that the iscsi target is alive.
We should as a later patch add the ability to configure this via the
qemu c
Hi Liming, Gerd,
On Tue, Dec 4, 2012 at 12:50 AM, walimis wrote:
> On Mon, Dec 03, 2012 at 01:51:00PM +0100, Gerd Hoffmann wrote:
>> Hi,
>>
>>> As said in another mail, I found that the root cause is that xilinx_zynq has
>>> two EHCI controller. If we use usb-storage disk, the disk will be attac
My trivial patches from during the freeze.
Peter Crosthwaite (4):
pflash_cfi01: qemu_log_mask "unimplemented" msg
pflash_cfi0x: Send debug messages to stderr
zynq_slcr: Compile time warning fixes.
arm_gic: Add cpu nr to Raised IRQ message
hw/arm_gic.c |2 +-
hw/pflash_cfi01.c |
This printf is informing the user of unimplemented functionality. It should be
re-directed to qemu_log(LOG_UNIMP, ...) accordingly.
Signed-off-by: Peter Crosthwaite
---
hw/pflash_cfi01.c |6 +++---
1 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/hw/pflash_cfi01.c b/hw/pflash_
These debug info messages should go to stderr rather than stdout.
Signed-off-by: Peter Crosthwaite
---
hw/pflash_cfi01.c |8
hw/pflash_cfi02.c |6 +++---
2 files changed, 7 insertions(+), 7 deletions(-)
diff --git a/hw/pflash_cfi01.c b/hw/pflash_cfi01.c
index f9f8e5d..931264f
Few warnings when compiled with debug printfs enabled. Fixed all.
Signed-off-by: Peter Crosthwaite
---
hw/zynq_slcr.c |7 ---
1 files changed, 4 insertions(+), 3 deletions(-)
diff --git a/hw/zynq_slcr.c b/hw/zynq_slcr.c
index dde4306..f55ab8d 100644
--- a/hw/zynq_slcr.c
+++ b/hw/zynq_s
Add the relevant CPU nr to this debug message to make IRQ debugging more
informative.
Signed-off-by: Peter Crosthwaite
---
hw/arm_gic.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/hw/arm_gic.c b/hw/arm_gic.c
index f9e423f..7a10188 100644
--- a/hw/arm_gic.c
+++ b/hw
On 11/26/2012 08:19 AM, Evgeny Voevodin wrote:
On 11/21/2012 11:43 AM, Evgeny Voevodin wrote:
This set of patches moves global variables to tcg_ctx:
gen_opc_instr
gen_opparam_icount
gen_opc_pc
Build tested for all targets.
Execution tested on Exynos4210 target.
After this patchset was aplied,
On Tue, Dec 04, 2012 at 01:39:35PM +1030, Rusty Russell wrote:
> Hi all,
>
> I want to rework the qemu virtio subsystem, but various
> structures are currently blatted to disk in save/load. So I looked at
> altering that, only to discover that it needs conversion to vmstate, and
> 2009 pa
On Tue, Dec 04, 2012 at 03:16:09PM +1000, Peter Crosthwaite wrote:
>Hi Liming, Gerd,
>
>On Tue, Dec 4, 2012 at 12:50 AM, walimis wrote:
>> On Mon, Dec 03, 2012 at 01:51:00PM +0100, Gerd Hoffmann wrote:
>>> Hi,
>>>
As said in another mail, I found that the root cause is that xilinx_zynq
So I guess 'raciness' of my proposed patch would only depend on how
small I could squeeze the section between 'sigpending' flag comparison
and actual syscall entering?
--
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
https://bugs.launc
The IRQ number of the second EHCI controller should be 76, not 75.
Signed-off-by: Liming Wang
---
hw/xilinx_zynq.c |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/xilinx_zynq.c b/hw/xilinx_zynq.c
index 1f12a3d..808de68 100644
--- a/hw/xilinx_zynq.c
+++ b/hw/xilinx_zynq.
On Mon, Dec 03, 2012 at 10:51:49PM +0400, Igor Mitsyanko wrote:
>On 12/02/2012 06:57 AM, Andreas Färber wrote:
>>It uses a different capsbase and opregbase than the Xilinx device.
>>
>>Signed-off-by: Liming Wang
>>Signed-off-by: Andreas Färber
>>Cc: Igor Mitsyanko
>>---
>> hw/usb/hcd-ehci-sysbu
On 04.12.2012 06:03, ronnie sahlberg wrote:
Acked-By: ronniesahlb...@gmail.com (Ronnie Sahlberg)
This verified that the service is actually operational and is much
more reliable than TCP-KEEPALIVES.
This is the proper way to monitor that the iscsi target is alive.
Yes, especially because (at
Hi,
> 1) legacy ide mode
>
> I can currently create a ide controller on the command-line using
> '-device'. However, on the real h/w there is an IDE compatibility mode
> which essentially advertises an ide controller at the same location that
> the ahci lives at. In fact, it changes the PCI dev
On 2012-12-04 08:40, Gerd Hoffmann wrote:
> Hi,
>
>> 1) legacy ide mode
>>
>> I can currently create a ide controller on the command-line using
>> '-device'. However, on the real h/w there is an IDE compatibility mode
>> which essentially advertises an ide controller at the same location that
>>
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