On Wed, Sep 12, 2012 at 02:12:55PM +0300, Orit Wasserman wrote:
> getaddrinfo can give us a list of addresses, but we only try to
> connect to the first one. If that fails we never proceed to
> the next one. This is common on desktop setups that often have ipv6
> configured but not actually workin
Since commit 6a18ae2d2947532d5c26439548afa0481c4529f9,
'flags' is no longer used in tcg_target_get_call_iarg_regs_count.
Signed-off-by: Stefan Weil
---
tcg/tcg.c |4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/tcg/tcg.c b/tcg/tcg.c
index 53316f6..0f0a8d0 100644
--- a/t
32 bit x86 hosts don't need registers for helper function arguments
because they use the default stack based calling convention.
Removing the registers allows simpler code for function
tcg_target_get_call_iarg_regs_count.
Signed-off-by: Stefan Weil
---
tcg/i386/tcg-target.c | 10 ++
1
Function tcg_target_get_call_iarg_regs_count was wrong for w64 hosts
and can be simplified for all TCG targets:
[PATCH 1/4] w64: Fix TCG helper functions with 5 arguments
[PATCH 2/4] tcg/i386: Remove unused registers from
[PATCH 3/4] tcg: Move tcg_target_get_call_iarg_regs_count to tcg.c
[PATCH 4/
On Wed, Sep 12, 2012 at 12:53 PM, Alexander Graf wrote:
> On 09/12/2012 04:54 PM, Erlon Cruz wrote:
>>
>> Hi all,
>>
>> We are planning to implement DLPAR capacity on QEMU pSeries. As we
>
>
> What is DLPAR? Hotplug support?
Yes, basically the way PowerVM uses to dynamically add memory, cpu,
and
On Wed, Sep 12, 2012 at 10:44:37PM +0200, Stefan Weil wrote:
> The TCG targets no longer need individual implementations.
>
> Signed-off-by: Stefan Weil
> ---
> tcg/arm/tcg-target.c |6 --
> tcg/hppa/tcg-target.c |6 --
> tcg/i386/tcg-target.c |6 --
> tcg/ia64/tcg-ta
The TCG targets no longer need individual implementations.
Signed-off-by: Stefan Weil
---
tcg/arm/tcg-target.c |6 --
tcg/hppa/tcg-target.c |6 --
tcg/i386/tcg-target.c |6 --
tcg/ia64/tcg-target.c |6 --
tcg/mips/tcg-target.c |6 --
tcg/ppc/tcg-targ
TCG uses 6 registers for function arguments on 64 bit Linux hosts,
but only 4 registers on W64 hosts.
Commit 2999a0b20074a7e4a58f56572bb1436749368f59 increased the number
of arguments for some important helper functions from 4 to 5
which triggered a bug for W64 hosts: QEMU aborts when executing
he
On 12 September 2012 21:44, Stefan Weil wrote:
> --- a/tcg/i386/tcg-target.c
> +++ b/tcg/i386/tcg-target.c
> @@ -75,9 +75,7 @@ static const int tcg_target_call_iarg_regs[] = {
> TCG_REG_R8,
> TCG_REG_R9,
> #else
> -TCG_REG_EAX,
> -TCG_REG_EDX,
> -TCG_REG_ECX
> +/* 32 bit
On 12.09.2012, at 22:56, Erlon Cruz wrote:
> On Wed, Sep 12, 2012 at 12:53 PM, Alexander Graf wrote:
>> On 09/12/2012 04:54 PM, Erlon Cruz wrote:
>>>
>>> Hi all,
>>>
>>> We are planning to implement DLPAR capacity on QEMU pSeries. As we
>>
>>
>> What is DLPAR? Hotplug support?
>
> Yes, ba
On Wed, 2012-09-12 at 17:53 +0200, Alexander Graf wrote:
> On 09/12/2012 04:54 PM, Erlon Cruz wrote:
> > Hi all,
> >
> > We are planning to implement DLPAR capacity on QEMU pSeries. As we
>
> What is DLPAR? Hotplug support?
Yes.
> > lack of experience in the internals of the arch we would like y
commit c3767ed0eb5d0bb25fe409ae5dec06e3411ff1b6
qemu-char: (Re-)connect for tcp_chr_write() unconnected writing
Has no hope of working because tcp_chr_connect() does not actually connect.
455aa1e08 just fixes the SEGV with server() but the attempt to connect a client
socket is still compl
Hello,
I posted a similar message to 'qemu-discuss', and was thinking my question may
require a developer level of expertise. I will try to be as brief as possible.
My context is using 'qemu-nbd' and 'qemu-img' to manage 'qcow2' loop filesystem
images being hosted on a 'nilfs' filesystem. Thi
> Excuse me for asking, does TCG-IR use static single assignment (SSA) form?
>
> I just wanna know how to translate a register-based bytecode to TCG-IR.
Sounds like you need to take a look at target-xxx/translate.c ?
Regards,
chenwj
--
Wei-Ren Chen (陳韋任)
Computer Systems Lab, Institute of I
"Daniel P. Berrange" writes:
> On Wed, Sep 12, 2012 at 07:57:21PM +0800, Lei Li wrote:
>> This RFC series attempts to convert the MemCharDriver to use a circular
>> buffer for input and output, expose it to users by introducing QMP commands
>> memchar_write and memchar_read and via the command li
A number of things need to occur during reset of the PAPR
paravirtualized platform in a specific order. For example, the hash
table needs to be cleared before the CPUs are reset, so that they
initialize their register state correctly, and the CPUs need to have
their main reset called before we set
This adds support for then new "reset htab" ioctl which allows qemu
to properly cleanup the MMU hash table when the guest is reset. With
the corresponding kernel support, reset of a guest now works properly.
This also paves the way for indicating a different size hash table
to the kernel and for t
The H_CEDE hypercall implementation for the pseries machine doesn't trigger
quite the right path in the main cpu exec loop. We should set exit_request
to pop up one extra level and recheck state, and we should set the
exception_index to EXCP_HLT (H_CEDE is roughly equivalent to the hlt
instruction
Currently the ibm,int-on and ibm,int-off RTAS functions are implemented as
no-ops. This is because when implemented as specified in PAPR they caused
Linux (which calls both int-on/off and set-xive) to end up with interrupts
masked when they should not be. Since Linux's set-xive calls make the
int
On the pseries machine the IOMMU (aka TCE tables) is always active for all
PCI and VIO devices. Mostly to simplify the SLOF firmware, we implement an
extension which allows the IOMMU to be temporarily disabled for certain
devices.
Currently this is implemented by setting the device's DMAContext p
The XICS interrupt controller emulation uses some C bitfield variables in
its internal state structure. This makes like awkward for saving the state
because we don't have easy VMSTATE helpers for bitfields.
This patch removes the bitfields, instead using explicit bit masking in a
single status va
于 2012-9-12 20:59, Eric Blake 写道:
On 09/11/2012 09:05 PM, Wenchao Xia wrote:
Seriously? We require a C99-compliant compiler, which is required to
treat the more compact version identically (all undefined names evaluate
to 0 in the preprocessor), and HACKING doesn't mandate that we spell out
a d
The general device state structure for PAPR VIO emulated devices includes a
'flags' field which was never used. This patch removes it.
Signed-off-by: David Gibson
---
hw/spapr_vio.h |1 -
1 file changed, 1 deletion(-)
diff --git a/hw/spapr_vio.h b/hw/spapr_vio.h
index ea6aa43..acef65e 1006
On 09/12/2012 09:24 PM, Wenchao Xia wrote:
> 于 2012-9-12 20:59, Eric Blake 写道:
>> On 09/11/2012 09:05 PM, Wenchao Xia wrote:
Seriously? We require a C99-compliant compiler, which is required to
treat the more compact version identically (all undefined names
evaluate
to 0 in the
Hi Alex,
Here's my current set of ready-to-merge pseries related patches. This
includes the latest revisions of the patches to fix system reset which
I posted before, plus a number of other small bugfixes and cleanups.
When we reset the system, the reset method for VIO bus devices resets
the state of their request queue (if present) as it should. However
it was not resetting the state of their TCE table (DMA translation) if
present. It was also not resetting the state of the per-device signal
mask set with H_VI
The current pseries machine init function iterates over the CPUs at several
points, doing various bits of initialization. This is messy; these can
and should be merged into a single iteration doing all the necessary per
cpu initialization. Worse, some of these initializations were setting up
stat
The XICS interrupt controller used on the pseries machine currently has no
reset handler. We can get away with this under some circumstances, but
it's not correct, and can cause failures if the XICS happens to be in the
wrong state at the time of reset.
This patch adds a hook to properly reset th
Currently the XICS interrupt controller emulation uses a custom enum to
specify whether a given interrupt is level-sensitive or message-triggered.
This enum makes life awkward for saving the state, and isn't particularly
useful since there are only two possibilities. This patch replaces the
enum w
The emulated PCI host bridge on the pseries machine incorporates an IOMMU
(PAPR TCE table). Currently the mappings in this IOMMU are not cleared
when we reset the system. This patch fixes this bug. To do this it adds
a new reset function to the IOMMU emulation code. The VIO devices already
rese
At least when invoked with high enough 'level' arguments,
kvm_arch_put_registers() is supposed to copy essentially all the cpu state
as encoded in qemu's internal structures into the kvm state. Currently
the ppc version does not do this - it never calls KVM_SET_SREGS, for
example, and therefore ne
On 09/12/2012 09:33 PM, Eric Blake wrote:
>> OK ,then I think
>> #if __GNUC__ >= 4
>>
>> #else
>> [warn name space pollution may happen]
>> #endif
>> would be better.
>
> It may be shorter, but it is definitely not better, at least not in the
> current context of qemu. Using the short for
On 09/13/2012 01:47 AM, Eric Blake wrote:
On 09/12/2012 09:22 AM, Guannan Ren wrote:
After failure of qemu transaction command, the snapshot file still
be there with non-zero in size. In order to unlink the file, the
patch removes the file size checking.
Can you give some exact steps to reprodu
On 09/12/12 15:08, Hans de Goede wrote:
> When removing unseen queue-heads from the async queue list, we should not
> set the seen flag to 0, as this may cause them to be removed by
> ehci_queues_rip_unused() during the next call to ehci_advance_async_state()
> if the timer is late or running at a
Am 12.09.2012 22:59, schrieb Aurelien Jarno:
On Wed, Sep 12, 2012 at 10:44:37PM +0200, Stefan Weil wrote:
The TCG targets no longer need individual implementations.
Signed-off-by: Stefan Weil
---
tcg/arm/tcg-target.c |6 --
tcg/hppa/tcg-target.c |6 --
tcg/i386/tcg-targe
On Wed, Sep 12, 2012 at 10:57:57AM +0200, Jan Kiszka wrote:
> On 2012-09-12 10:51, Avi Kivity wrote:
> > On 09/12/2012 11:48 AM, Jan Kiszka wrote:
> >> On 2012-09-12 10:01, Avi Kivity wrote:
> >>> On 09/10/2012 04:29 AM, Matthew Ogilvie wrote:
> Intel's definition of "edge triggered" means: "a
Am 12.09.2012 23:18, schrieb Peter Maydell:
On 12 September 2012 21:44, Stefan Weil wrote:
--- a/tcg/i386/tcg-target.c
+++ b/tcg/i386/tcg-target.c
@@ -75,9 +75,7 @@ static const int tcg_target_call_iarg_regs[] = {
TCG_REG_R8,
TCG_REG_R9,
#else
-TCG_REG_EAX,
-TCG_REG_EDX,
-
These patches have already been sent in April 2011, and contain some fixes for
the internal TFTP server.
With these patches, MS Windows PE can be booted via PXE, and 32MB file
limitation has been removed.
This has been tested with MS Windows 2003 PXE boot client, PXELINUX and gPXE.
Indentation
This option is described in RFC 1783. As this is only an optional field,
we may ignore it in some situations and handle it in some others.
However, MS Windows 2003 PXE boot client requests a block size of the MTU
(most of the times 1472 bytes), and doesn't work if the option is not
acknowledged (w
RFC 1350 does not mention block count roll-over. However, a lot of TFTP servers
implement it to be able to transmit big files, so do it also.
Current block size is 512 bytes, so TFTP files were limited to 32 MB.
Signed-off-by: Hervé Poussineau
---
slirp/tftp.c | 24 ++--
s
Il 12/09/2012 15:58, Anthony Liguori ha scritto:
> Why would someone use this verses megasas vs. LSI vs virtio-scsi?
LSI is dead. Compare it to IDE.
virtio-scsi has the highest performance, but it is not supported on all
guests. Compare it to virtio-blk.
This vs. megasas is a good question; bo
Il 12/09/2012 20:03, Clemens Kolbitsch ha scritto:
>
> not much that I can contribute to solving the problem, but I have a
> bunch of VMs where this happens _every_ time I resume a snapshot (but
> without hibernating). In case this could be a connected problem and
> you need help testing a patch,
Il 12/09/2012 23:28, Mark Trumpold ha scritto:
> So, I've been experimenting with 'qemu-nbd --cache=writeback ..'
> This nicely eliminates the 'checkpoint' issue; however, I have as
> yet been unable to explicitely flush things to disk -- which I would like to
> do just before a 'nilfs' snapshot.
On 09/12/12 15:13, Alon Levy wrote:
> - no addition of guest capabilities, use interrupt mask instead, ignore
>0 or ~0 that are set by current windows driver.
> - use crc to solve possible write while read.
> - limit heads to 64, statically allocated on rom by host.
> - some misc trace fixe
On Tue, Sep 11, 2012 at 4:15 PM, Peter Maydell wrote:
> On 11 September 2012 08:51, Liu Ping Fan wrote:
>> +
>> +/**
>> + * * atomic_inc - increment atomic variable
>> + * * @v: pointer of type Atomic
>> + **
>> + * * Atomically increments @v by 1.
>> + * */
>
> Your editor has do
On Tue, Sep 11, 2012 at 4:04 PM, Avi Kivity wrote:
> On 09/11/2012 10:51 AM, Liu Ping Fan wrote:
>> From: Liu Ping Fan
>>
>> If out of global lock, we will be challenged by SMP in low level,
>> so need atomic ops.
>>
>> This file is a wrapper of GCC atomic builtin.
>>
>> Signed-off-by: Liu Ping F
On Tue, Sep 11, 2012 at 5:37 PM, Avi Kivity wrote:
> On 09/11/2012 12:32 PM, liu ping fan wrote:
>> On Tue, Sep 11, 2012 at 4:32 PM, Avi Kivity wrote:
>>> On 09/11/2012 10:51 AM, Liu Ping Fan wrote:
From: Liu Ping Fan
DeviceState will be protected by refcnt from disappearing durin
On Tue, Sep 11, 2012 at 10:54 PM, Marcelo Tosatti wrote:
> On Tue, Sep 11, 2012 at 03:41:15PM +0300, Avi Kivity wrote:
>> On 09/11/2012 03:24 PM, Avi Kivity wrote:
>> > On 09/11/2012 12:57 PM, Jan Kiszka wrote:
>> >> On 2012-09-11 11:44, liu ping fan wrote:
>> >>> On Tue, Sep 11, 2012 at 4:35 PM,
On Tue, Sep 11, 2012 at 8:41 PM, Avi Kivity wrote:
> On 09/11/2012 03:24 PM, Avi Kivity wrote:
>> On 09/11/2012 12:57 PM, Jan Kiszka wrote:
>>> On 2012-09-11 11:44, liu ping fan wrote:
On Tue, Sep 11, 2012 at 4:35 PM, Avi Kivity wrote:
> On 09/11/2012 10:51 AM, Liu Ping Fan wrote:
>>
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