[Qemu-devel] Trouble getting Ubuntu 64-bit working

2010-01-02 Thread Nathan Osman
I recently downloaded the qemu binary for Windows. I'm using Vista 32 bit as the host and I'm trying to run Ubuntu 64-bit in it. The splash screen works, but when it boots, I am left staring at a blank screen. I let it sit for half an hour before giving up. Am I doing something wrong? I launched

[Qemu-devel] Re: [PATCH 01/15] Introduce qemu_write_full()

2010-01-02 Thread Paolo Bonzini
On 01/02/2010 04:45 AM, Kirill A. Shutemov wrote: A variant of write(2) which handles partial write. Next time please add a cover letter 00/15 to explain what you changed, and a v3 (or v4?) marker in the subjects. Thanks for this work though! Paolo

[Qemu-devel] Extended deadline for proposals for the Alt-OS devroom at FOSDEM

2010-01-02 Thread François Revol
Hello, I have been unavailable for a week, and it seems a lot of people were cut off the Net last month busy with family... The deadline for the propositions for the Alt-OS devroom at FOSDEM has been extended to 2010-01-05, to allow at least one talk per project. The shedule must be sent rapidly t

Re: [Qemu-devel] [PATCH] debugcon: support for debugging consoles (e.g. Bochs port 0xe9)

2010-01-02 Thread Kevin O'Connor
On Fri, Jan 01, 2010 at 07:02:59PM -0800, H. Peter Anvin wrote: > On 12/30/2009 08:49 AM, Kevin O'Connor wrote: > > SeaBIOS writes debugging info to port 0x0402. Unfortunately, qemu has > > to be recompiled in order to display this info. Will your patch > > enable one to get at the 0x0402 data wi

[Qemu-devel] call insn not truncated on x86_64

2010-01-02 Thread Kevin O'Connor
I'm running into an issue with SeaBIOS compiled with older versions of gcc. I'm seeing: $ qemu-system-x86_64 -d in_asm,int,exec,cpu,pcall IN: 0x000f1096: mov%ebx,%eax 0x000f1098: call 0x0f80 qemu: fatal: Trying to execute code outside RAM or ROM at 0x0f8

Re: [Qemu-devel] [PATCH] debugcon: support for debugging consoles (e.g. Bochs port 0xe9)

2010-01-02 Thread H. Peter Anvin
On 01/02/2010 09:53 AM, Kevin O'Connor wrote: > On Fri, Jan 01, 2010 at 07:02:59PM -0800, H. Peter Anvin wrote: >> On 12/30/2009 08:49 AM, Kevin O'Connor wrote: >>> SeaBIOS writes debugging info to port 0x0402. Unfortunately, qemu has >>> to be recompiled in order to display this info. Will your

Re: [Qemu-devel] call insn not truncated on x86_64

2010-01-02 Thread Aurelien Jarno
On Sat, Jan 02, 2010 at 01:26:54PM -0500, Kevin O'Connor wrote: > I'm running into an issue with SeaBIOS compiled with older versions of > gcc. I'm seeing: > > $ qemu-system-x86_64 -d in_asm,int,exec,cpu,pcall > > IN: > 0x000f1096: mov%ebx,%eax > 0x000f1098: call 0x0

Re: [Qemu-devel] call insn not truncated on x86_64

2010-01-02 Thread Kevin O'Connor
On Sat, Jan 02, 2010 at 09:35:38PM +0100, Aurelien Jarno wrote: > On Sat, Jan 02, 2010 at 01:26:54PM -0500, Kevin O'Connor wrote: > > I'm running into an issue with SeaBIOS compiled with older versions of > > gcc. I'm seeing: > > > > $ qemu-system-x86_64 -d in_asm,int,exec,cpu,pcall > > > > IN:

[Qemu-devel] [PATCH 3/6] Use Mac99_U3 type on ppc64

2010-01-02 Thread Alexander Graf
The "Mac99" type so far defines a "U2" based configuration. Unfortunately, there have never been any U2 based PPC64 machines. That's what the U3 was developed for. So let's split the Mac99 machine in a PPC64 and a PPC32 machine. The PPC32 machine stays "Mac99", while the PPC64 one becomes "Mac99_U

[Qemu-devel] [PATCH 4/6] Include dump of lspci -nn on real G5

2010-01-02 Thread Alexander Graf
To ease debugging and to know what we're lacking, I found it really useful to have an lspci dump of a real U3 based G5 around. So I added a comment for it. If people don't think it's important enough to include this information in the sources, just don't apply this patch. Signed-off-by: Alexander

[Qemu-devel] [PATCH 2/6] Add config space conversion function for uni_north

2010-01-02 Thread Alexander Graf
As stated in the previous patch, the Uninorth PCI bridge requires different layouts in its PCI config space accessors. This patch introduces a conversion function that makes it compatible with the way Linux accesses it. I also kept an OpenBIOS compatibility hack in. I think it'd be better to take

[Qemu-devel] [PATCH 6/6] Enable secondary cmd64x

2010-01-02 Thread Alexander Graf
We're not using any macio IDE devices, so let's enable the secondary cmd64x IDE device, so we get all four possible IDE devices exposed to the guest. Later we definitely need to enable macio or any other device that Linux understands in default configurations. Signed-off-by: Alexander Graf ---

[Qemu-devel] [PATCH 0/6] PPC NewWorld fixery

2010-01-02 Thread Alexander Graf
I'm trying to get the PPC64 system emulation target working finally. While doing so, I ran into several issues, all related to PCI this time. This patchset fixes all the PCI config space access and PCI interrupt mapping issues I've found on PPC64. Using this and a patched OpenBIOS version, I can s

[Qemu-devel] [PATCH 5/6] Make interrupts work

2010-01-02 Thread Alexander Graf
The interrupt code as is didn't really work for me. I couldn't even convince Linux to take interrupt 9 in an interrupt-map. So let's do this right. Let's map all PCI interrupts to 0x1b - 0x1e. That way we're at least a small step closer to what real hardware does. I also took the interrupt pin to

[Qemu-devel] [PATCH 1/6] Make config space accessor host bus trapable

2010-01-02 Thread Alexander Graf
Different host buses may have different layouts for config space accessors. The Mac U3 for example uses the following define to access Type 0 (directly attached) devices: #define MACRISC_CFA0(devfn, off)\ ((1 << (unsigned int)PCI_SLOT(dev_fn)) \ | (((unsigned int)PCI_FUN

Re: [Qemu-devel] [PATCH] debugcon: support for debugging consoles (e.g. Bochs port 0xe9)

2010-01-02 Thread François Revol
> Makes sense. Either way, it works with my patch looking something > like: > > -chardev stdio,id=seabios \ > -device isa-debugcon,iobase=0x402,chardev=seabios > > ... should do the job. Btw, I once added another method of debug output to ZETA, that was using the low-level protocol us