On Fri, Feb 22, 2008 at 5:32 PM, Edgar E. Iglesias
<[EMAIL PROTECTED]> wrote:
> Hi,
>
> This is the third version of the linux-user/mmap bugfix patches:
>
> * Let the native mmap choose addresses for unfixed mappings.
> * For file mappings, correct mapping of pages beyond EOF.
> * Adds a small
Blue Swirl wrote:
> The attached patch enables most TCG ops for Qemu Sparc32/64 target.
> Sparc32 softmmu and linux-user are OK, but Sparc64 and Sparc32plus
> targets do not work.
>
> Comments?
>
> It would be nice to get rid of T2 usage in std (also stda and
> casa/casxa) but I don't know how to
> [...]
>> Another point is that you should define TCG globals for each SPARC GPR.
>> It was not done for i386 because I feared performance regressions when
>> accessing to 16 bit or 8 bit sub-registers. On SPARC you do not have
>> this issue.
>
> Nice idea. Would this also work for windowed r
> Another point is that you should define TCG globals for each SPARC GPR.
> It was not done for i386 because I feared performance regressions when
> accessing to 16 bit or 8 bit sub-registers. On SPARC you do not have
> this issue.
How would these be kept consistent with CPUState?
Paul
andrzej zaborowski wrote:
Oh, good question, and I think the answer be the reason why it's not
working here (*slaps self*). I'll apply the patch if you can confirm
that it works with some Ms Windows install.
I just tried with Windows XP and I have no problem detecting the card
with this pa
On Sat, Feb 23, 2008 at 07:23:49PM +0100, Fabrice Bellard wrote:
> But do not mix the target specific defines with target independent
> defines (in tcg-op.h there is a specific section for target specific
> defines).
Might it be worth moving that section into a new file?
--
Stuart Brady
Hi,
> My version of patch to fix same problem:
Oh, yes. You are right.
I have read manpage again, and I found it says,
if size is zero, list is not modified, but ...
So, mine is wrong. We should check only "size".
/yoshii
Anthony Liguori wrote:
Right now we set explict base addresses for the PCI IO regions in the VMware
VGA device. We don't register the second region at all and instead directly
map the physical memory.
The problem is, the addresses we're setting in the BAR is not taken into
account in the e820 m
CVSROOT:/cvsroot/qemu
Module name:qemu
Changes by: Blue Swirl 08/02/24 07:45:43
Modified files:
target-i386: translate.c
tcg: tcg-op.h
Log message:
More helper types, rearrange generic definitions
CVSWeb URLs:
http://cvs.savannah.gnu.o
