Hi
2007/4/17, Atif Hashmi <[EMAIL PROTECTED]>:
But this prints "Transaction restart" once and then the program finishes.
This means that commit transaction is not called the second time. Could you
please tell me what am I doing wrong?
Helper functions are outside the translated opcode strea
On Mon, 2007-04-02 at 18:45 +0100, Paul Brook wrote:
> A few issues with the patch, which I think need to be resolved before it can
> be applied:
>
> - You're using global structures to store machine state.
> While it's debatable whether you'll ever have more than one s3c2410, I think
> it's def
Kirill A. Shutemov wrote:
> Is it possible to get size of target int? Why is only TARGET_LONG_BITS
> defined?
> I have need of size of target int for correct define fsid_t for linux user
> mode. fsid_t is struct { int val[2]; } for linux.
That's int32_t for all Linux versions and architectures.
> code (a) : for (int i = 0; i< 100; i++) c[i] = a[i] * b[i];
>
> code (b) : for (int i = 0; i< 1000; i++) for(int j = 0; j < b[i]; j++)
> c[i] += a[i];
>
> code (c) : for (int i = 0; i< 1000; i++) c[i] = HW_MUL(a[i], b[i]);
>
> I'm sure that code (b) will execute much longer that code (a) ins
CVSROOT:/sources/qemu
Module name:qemu
Changes by: Thiemo Seufer 07/04/17 15:26:47
Modified files:
hw : mips_timer.c
target-mips: cpu.h mips-defs.h op.c op_helper.c translate.c
translate_init.c
Log message:
C
CVSROOT:/sources/qemu
Module name:qemu
Changes by: Thiemo Seufer 07/04/17 16:28:29
Modified files:
. : vl.h
hw : mc146818rtc.c mips_pica61.c
Log message:
Fix mmapped register alignment and endianness handling.
CVSWeb URLs:
h
En/na Paul Brook ha escrit:
> On Monday 16 April 2007 15:41, Marius Monton wrote:
>
>>> Any benchmark/performance measurements you make inside qemu are
>>> meaningless. qemu performance bears no relation whatsoever to the
>>> performance characteristics of real hardware.
>>>
>> That's t
On Mon, Apr 16, 2007 at 08:47:07AM +0200, Werner Dittmann wrote:
> My general thought about the problem: running 32bit code
> on a 64bit host with similar architecture as this is the case
> of x86 / x86_64 could easily result in problems with signedness,
> sign bit extension, different pointer/word
Hi,
On 17/04/07, Christian MICHON <[EMAIL PROTECTED]> wrote:
On 3/16/07, andrzej zaborowski <[EMAIL PROTECTED]> wrote:
> Implements basic differences between XScale and plain ARM. The patch
> also adds the main on-chip peripherals of PXA2xx: interrupt
> controller, DMA, GPIO controller, SSP, I2C
andrzej zaborowski wrote:
> Hi,
>
> On 16/04/07, Werner Dittmann <[EMAIL PROTECTED]> wrote:
>> During several tests with Qemu / Kqemu it seems that Qemu
>> has problems with x86_64 host systems. My system is an
>> AMD 64 X2 (Dual Core), running openSUSE 10.2, 2GB memory.
>>
Indeed it is a dual CPU
Hi there
There should exist a patch to get more than one usb device in Qemu, but
all the links I can find are broken :(
Could you guys help with that?
Best regards
Kim Højgaard-Hansen
CVSROOT:/cvsroot/qemu
Module name:qemu
Changes by: Blue Swirl 07/04/17 19:42:21
Modified files:
hw : tcx.c
Log message:
TCX palette bug fix
CVSWeb URLs:
http://cvs.savannah.gnu.org/viewcvs/qemu/hw/tcx.c?cvsroot=qemu&r1=1.11&r2=1.12
Hi,
On 17/04/07, Werner Dittmann <[EMAIL PROTECTED]> wrote:
andrzej zaborowski wrote:
> Hi,
>
> On 16/04/07, Werner Dittmann <[EMAIL PROTECTED]> wrote:
>> During several tests with Qemu / Kqemu it seems that Qemu
>> has problems with x86_64 host systems. My system is an
>> AMD 64 X2 (Dual Core),
Just found a small problem w/ the termios structure as defined for PPC
linux user. It doesn't match the one in include/asm-powerpc/termbits.h.
Index: linux-user/ppc/termbits.h
===
--- linux-user/ppc/termbits.h (revision 44)
+++ li
HI Eduardo,
Thanks for you reply. I have update target-i386/translate.c as follows
if(modrm==0xC0)
{
stored_eip = pc_start - s->cs_base;
gen_op_movl_AL_AL();
}
else if(modrm==0xDB)
{
gen_op_movl_BL_BL(stored_eip);
gen_eob(s);
}
target-i386/op.c contain
On Tue, 10 Apr 2007, Jocelyn Mayer wrote:
PPC:
I am unable to get any executable to run.
projects:~/upstream/qemu# ./ppc-linux-user/qemu-ppc -L /mirror0/chroots/ppc/
/mirror0/chroots/ppc/bin/bash
init_ppc_proc: PVR 0008 mask => 0008
Segmentation fault
projects:~/upstream/qem
Thiemo,
Just wondering if you had a chance to take another look at
this.
On Sat, 31 Mar 2007, Stuart Anderson wrote:
On Sat, 31 Mar 2007, Thiemo Seufer wrote:
+switch( cmd ) {
+ case GETALL:
+ case SETALL:
+ case IPC_STAT:
+ case IPC_SET:
+ lock
CVSROOT:/sources/qemu
Module name:qemu
Changes by: Thiemo Seufer 07/04/17 21:57:02
Modified files:
fpu: softfloat-native.h
Log message:
Updated Solaris isinf support, by Juergen Keil and Ben Taylor.
CVSWeb URLs:
http://cvs.savannah.gnu.org/viewc
[EMAIL PROTECTED]/p1 ~/src/c/todd/test?100$ ./sizeof
sizeof(char) = 1
sizeof(short) = 2
sizeof(int) = 4
sizeof(char *) = 4
sizeof(long) = 4
sizeof(long long) = 8
[EMAIL PROTECTED]/p1 ~/src/c/todd/test?101$ uname -a
OpenBSD cloud.fries.net 4.1 GENERIC#7 mac68k
[EMAIL PROTECTED]/p1 ~/src/c/todd/test?
CVSROOT:/sources/qemu
Module name:qemu
Changes by: Thiemo Seufer 07/04/17 23:08:56
Modified files:
target-i386: helper2.c
Log message:
Ptable calculation broken for 32bit code under x86_64, by Bernhard
Kauer.
CVSWeb URLs:
http://cvs.savannah.gnu.org/vie
Ely Soto wrote:
> Ok this is the fix I came up with.
>
> Basically it will check all the other objects that could potentially be
> waiting for service. This will prevent one high priority object from
> starving the rest.
>
> I'm not certain what the intention for the timeout > 0 check but this
CVSROOT:/sources/qemu
Module name:qemu
Changes by: Thiemo Seufer 07/04/17 23:25:07
Modified files:
target-i386: helper.c
Log message:
Fix helper.c with isinf on Solaris 9/Sparc, by Ben Taylor.
CVSWeb URLs:
http://cvs.savannah.gnu.org/viewcvs/qemu/target-
CVSROOT:/sources/qemu
Module name:qemu
Changes by: Thiemo Seufer 07/04/17 23:53:10
Modified files:
hw : lsi53c895a.c
Log message:
Another lsi53c895a patch, by Wang Cheng Yeh.
CVSWeb URLs:
http://cvs.savannah.gnu.org/viewcvs/qemu/hw/lsi53c895a.c?c
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