Hi all,
I want to know if is possible to emulate a x86 running Microsoft DOS (or, at
least, FreeDOS) on a ARM920T running Linux.
In fact, I've seen from http://fabrice.bellard.free.fr/qemu/status.html that the
Host ARM support is still in a testing phase.
Moreover, I would need to know how
Hi all
I've found two repeatable (possibly related) ways to crash kqemu with 0.9.0
and several earlier versions also I think. It's under linux 2.6.9 fully
updated CentOS 4.4 (clone of RH enterprise linux 4.4)
First, I cannot use kqemu 1.3.0pre11 (either prebuilt or compiled from
source, they're b
Hello!
I was wondering if there is a way to get a full trace dump of the
original (not translated) executed instructions using qemu.
Can someone give me some pointers on how this might be implemented in
qemu (if it doesn't already exist)?
Thank you,
Alexandros
Hi all,
I would like to build Debian for an ARM target and simulate it with qemu.
I tried the following command:
qemu-system-arm -M versatilepb -cdrom debian-31r5-arm-netinst.iso -hda
hda.img -boot d
Obviously, it doesn't work (it always asked for a kernel image).
I have already experienced a n
On Friday 13 April 2007 14:21, Maxime Tierrie wrote:
> Hi all,
>
> I would like to build Debian for an ARM target and simulate it with qemu.
> I tried the following command:
> qemu-system-arm -M versatilepb -cdrom debian-31r5-arm-netinst.iso -hda
> hda.img -boot d
> Obviously, it doesn't work (it a
Paul Brook a écrit :
On Friday 13 April 2007 14:21, Maxime Tierrie wrote:
Hi all,
I would like to build Debian for an ARM target and simulate it with qemu.
I tried the following command:
qemu-system-arm -M versatilepb -cdrom debian-31r5-arm-netinst.iso -hda
hda.img -boot d
Obviously, it does
On Fri, Apr 13, 2007 at 03:21:08PM +0200, Maxime Tierrie wrote:
> Hi all,
>
> I would like to build Debian for an ARM target and simulate it with qemu.
> I tried the following command:
> qemu-system-arm -M versatilepb -cdrom debian-31r5-arm-netinst.iso -hda
> hda.img
> -boot d
> Obviously, it do
> > http://www.aurel32.net/info/debian_arm_qemu.php
> >
> > Paul
>
> Thank you Paul. Unfortunately, I have already tried it few days ago and
> it didn't work. That's why I asked for a net-install.
This is a network install.
Paul
CVSROOT:/cvsroot/qemu
Module name:qemu
Changes by: Blue Swirl 07/04/13 15:46:16
Modified files:
target-sparc : cpu.h op.c op_helper.c translate.c
Log message:
Alignment check mechanism (not fully enabled yet) (Aurelien Jarno)
CVSWeb URLs:
http://cvs.savannah.
CVSROOT:/cvsroot/qemu
Module name:qemu
Changes by: Blue Swirl 07/04/13 15:49:56
Modified files:
target-sparc : op.c translate.c
Log message:
Fix Sparc64 wrfprs, move VIS ops where they belong, more VIS ops
CVSWeb URLs:
http://cvs.savannah.gnu.org/viewcvs/qemu
I'm currently reqriting bits of the qemu gdb stub to take advantage of new GDB
target description mechanisms, and have come accross what looks like a bug in
the sparc64 code.
My understanding is that gdb considers sparc64 to have 48 "registers". The
first 32 are the same as sparc32, the last 1
> By my reading this get f0 and f1 the wrong way round on little-endian
> hosts. Should this be(omitting uint32 *casts for clarity):
>
> tmp = env->fpr[i];
> tmp |= env->fpr[i + 1];
> registers[i/2 + 32] = tswap64(tmp)
Argh. What I meant was:
tmp = env->fpr[i] << 32;
tmp |= env->fpr[i +
My understanding is that gdb considers sparc64 to have 48 "registers". The
first 32 are the same as sparc32, the last 16 (named f32, f34 ... f62) are
double precision registers. gdb then overlays this with d and q regs, but
we
don't need to care about that.
Quoting the V9 manual:
The FPU contai
I can confirm that native gdb64 talking to x86 Qemu gets incorrect double
float registers values, 32-bit looks fine.
Alexandros Frantzis <[EMAIL PROTECTED]> writes:
> Can someone give me some pointers on how this might be implemented in
> qemu (if it doesn't already exist)?
There was recently a thread about this:
http://thread.gmane.org/gmane.comp.emulators.qemu/16604
--
http://www.iki.fi/~ananaza/
CVSROOT:/cvsroot/qemu
Module name:qemu
Changes by: Blue Swirl 07/04/13 19:24:07
Modified files:
hw : esp.c slavio_serial.c tcx.c
Log message:
Fix Sparc32 device save methods
CVSWeb URLs:
http://cvs.savannah.gnu.org/viewcvs/qemu/hw/esp.c?cvsroot=qemu
Hi,
I'd like to commit the attached FDC and M48T59 device save and reset
methods. After this change, all Sparc32 devices can be saved.
Any comments?
Index: qemu/hw/fdc.c
===
--- qemu.orig/hw/fdc.c 2007-04-13 19:22:56.0 +
CVSROOT:/sources/qemu
Module name:qemu
Changes by: Thiemo Seufer 07/04/13 20:17:54
Modified files:
target-mips: helper.c op.c
Log message:
Another fix for CP0 Cause register handling.
CVSWeb URLs:
http://cvs.savannah.gnu.org/viewcvs/qemu/target-mips/help
> I'd like to commit the attached FDC and M48T59 device save and reset
> methods. After this change, all Sparc32 devices can be saved.
>
> Any comments?
Do you also need to save the state of the attached drives?
Paul
Blue Swirl <[EMAIL PROTECTED]> wrote:
> Hi,
>
> I'd like to commit the attached FDC and M48T59 device save and reset
> methods. After this change, all Sparc32 devices can be saved.
>
> Any comments?
http://lists.gnu.org/archive/html/qemu-devel/2007-03/msg00435.html
Other than the comment
CVSROOT:/sources/qemu
Module name:qemu
Changes by: Thiemo Seufer 07/04/13 22:30:36
Modified files:
target-mips: op_helper.c
Log message:
Nicer Log formatting.
CVSWeb URLs:
http://cvs.savannah.gnu.org/viewcvs/qemu/target-mips/op_helper.c?cvsroot=qemu&r1=1
This is an update to a previous patch to fix the missing macro isinf
(and isnan) for Solaris that is used in target-i386/helper.c. This
patch is against qemu/fpu/softfloat-native.h, which is a better place
for the macro, as opposed to putting it in target-i386/helper.c.
Attribution to Juergen
Both the methods discussed in the past thread (which Antti pointed in the
previous mail) worked well for me.
-Shashi.
On 4/13/07, Antti P Miettinen <[EMAIL PROTECTED]> wrote:
Alexandros Frantzis <[EMAIL PROTECTED]> writes:
> Can someone give me some pointers on how this might be implemented in
On 4/13/07, Paul Brook <[EMAIL PROTECTED]> wrote:
> I'd like to commit the attached FDC and M48T59 device save and reset
> methods. After this change, all Sparc32 devices can be saved.
>
> Any comments?
Do you also need to save the state of the attached drives?
Yes, at least motor state, head
On 4/14/07, Blue Swirl <[EMAIL PROTECTED]> wrote:
On 4/13/07, Paul Brook <[EMAIL PROTECTED]> wrote:
> > I'd like to commit the attached FDC and M48T59 device save and reset
> > methods. After this change, all Sparc32 devices can be saved.
> >
> > Any comments?
>
> Do you also need to save the sta
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