Re: [Qemu-devel] sparc32 counter/timer issues

2007-09-23 Thread Blue Swirl
On 9/22/07, Robert Reif <[EMAIL PROTECTED]> wrote: > With the patch and ss10 boot prom I get: > > TIMER: write 000ff13c > TIMER: write 000ff1310010 0001 > TIMER: write 000ff130 > TIMER: write 000ff134 > TIMER: write 000ff13c 000

Re: [Qemu-devel] sparc32 counter/timer issues

2007-09-21 Thread Robert Reif
With the patch and ss10 boot prom I get: TIMER: write 000ff13c TIMER: write 000ff1310010 0001 TIMER: write 000ff130 TIMER: write 000ff134 TIMER: write 000ff13c 0001 TIMER: write 000ff130 TIMER: write 000ff

Re: [Qemu-devel] sparc32 counter/timer issues

2007-09-21 Thread Blue Swirl
On 9/21/07, Robert Reif <[EMAIL PROTECTED]> wrote: > I'm trying to run a real ss10 openboot prom image rather than > the supplied prom image and found some issues with the way > counters and timers are implemented. It appears that the processor > and system counter/timers are not independent. The