Okay. Thank you.
Best regards,
Karthik
On Wed, May 25, 2016 at 6:18 PM, Peter Maydell
wrote:
> On 25 May 2016 at 13:42, Karthik wrote:
> > Okay, understood. I`ll hold the IRQ line until CPU acknowledges the
> > interrupt.
> >
> > By the way, is there a distinction between edge and level trigge
On 25 May 2016 at 13:42, Karthik wrote:
> Okay, understood. I`ll hold the IRQ line until CPU acknowledges the
> interrupt.
>
> By the way, is there a distinction between edge and level triggered
> interrupt in the qemu or it is up to the emulation implementation?
In QEMU, if you call qemu_set_irq
Okay, understood. I`ll hold the IRQ line until CPU acknowledges the
interrupt.
By the way, is there a distinction between edge and level triggered
interrupt in the qemu or it is up to the emulation implementation?
Best regards,
Karthik
On Wed, May 25, 2016 at 6:04 PM, Peter Maydell
wrote:
On 25 May 2016 at 11:47, Karthik wrote:
> Hi,
>
> I am working on emulating an Spansion micro with ARM Cortex R5F Core.
>
> It has got an Interrupt Controller which accepts multiple interrupts and
> generates the IRQ to the CPU based on register settings.
>
> Now an timer module calls the qemu_irq
