Re: [Qemu-devel] [PATCH v1 0/4] Connect the Xilinx ZynqMP IPI device

2016-07-11 Thread Peter Maydell
On 11 July 2016 at 22:56, Alistair Francis wrote: > I still think this is helpful as there are a large number of cases > where setting a bit in a register propagates through the system to > somewhere else. We use this functionality to control the VINITI pin > for the R5 in our tree and many other

Re: [Qemu-devel] [PATCH v1 0/4] Connect the Xilinx ZynqMP IPI device

2016-07-11 Thread Alistair Francis
On Tue, Jul 5, 2016 at 1:37 PM, Peter Maydell wrote: > On 5 July 2016 at 21:30, Alistair Francis wrote: >> This patchset adds and connects the Xilinx ZynqmP IPI devices using the >> register GPIO line. >> >> This requires adding the register GPIO API which allows registers to be >> mapped to GPIO

Re: [Qemu-devel] [PATCH v1 0/4] Connect the Xilinx ZynqMP IPI device

2016-07-05 Thread Peter Maydell
On 5 July 2016 at 21:30, Alistair Francis wrote: > This patchset adds and connects the Xilinx ZynqmP IPI devices using the > register GPIO line. > > This requires adding the register GPIO API which allows registers to be > mapped to GPIOs. This GPIO is used to propergate register reads/writes > to