The modern versions of the ISA require that reserved instruction bits be
ignored for server class processors (see Book I, section 1.3.3). I believe
older versions of the ISA allowed for Illegal Instruction Interrupt or
"Boundedly Undefined", which is, of course, much less specific. QEMU
supports
On 2015-09-22 12:26, Thomas Huth wrote:
> On 13/09/15 23:03, Aurelien Jarno wrote:
> > The xscmpodp and xscmpudp instructions only have the AX, BX bits in
> > there encoding, the lowest bit (usually TX) is marked as an invalid
> > bit. We therefore can't decode them with GEN_XX2FORM, which decodes
On 13/09/15 23:03, Aurelien Jarno wrote:
> The xscmpodp and xscmpudp instructions only have the AX, BX bits in
> there encoding, the lowest bit (usually TX) is marked as an invalid
> bit. We therefore can't decode them with GEN_XX2FORM, which decodes
> the two lowest bit.
>
> Introduce a new form
On Sun, Sep 13, 2015 at 11:03:45PM +0200, Aurelien Jarno wrote:
> The xscmpodp and xscmpudp instructions only have the AX, BX bits in
> there encoding, the lowest bit (usually TX) is marked as an invalid
> bit. We therefore can't decode them with GEN_XX2FORM, which decodes
> the two lowest bit.
>
