On Thu, Mar 07, 2013 at 12:31:00PM -0700, Alex Williamson wrote:
> On Thu, 2013-03-07 at 21:22 +0200, Michael S. Tsirkin wrote:
> > On Thu, Mar 07, 2013 at 12:17:11PM -0700, Alex Williamson wrote:
> > > On Thu, 2013-03-07 at 20:49 +0200, Michael S. Tsirkin wrote:
> > > > On Thu, Mar 07, 2013 at 11:
On Thu, 2013-03-07 at 21:22 +0200, Michael S. Tsirkin wrote:
> On Thu, Mar 07, 2013 at 12:17:11PM -0700, Alex Williamson wrote:
> > On Thu, 2013-03-07 at 20:49 +0200, Michael S. Tsirkin wrote:
> > > On Thu, Mar 07, 2013 at 11:29:46AM -0700, Alex Williamson wrote:
> > > > Just like root ports, I thi
On Thu, Mar 07, 2013 at 12:17:11PM -0700, Alex Williamson wrote:
> On Thu, 2013-03-07 at 20:49 +0200, Michael S. Tsirkin wrote:
> > On Thu, Mar 07, 2013 at 11:29:46AM -0700, Alex Williamson wrote:
> > > Just like root ports, I think these are supposed to be direct mapped.
> > >
> > > Signed-off-by
On Thu, 2013-03-07 at 20:49 +0200, Michael S. Tsirkin wrote:
> On Thu, Mar 07, 2013 at 11:29:46AM -0700, Alex Williamson wrote:
> > Just like root ports, I think these are supposed to be direct mapped.
> >
> > Signed-off-by: Alex Williamson
>
> Hmm, very strange. Why not using standard pci bridg
On Thu, Mar 07, 2013 at 11:29:46AM -0700, Alex Williamson wrote:
> Just like root ports, I think these are supposed to be direct mapped.
>
> Signed-off-by: Alex Williamson
Hmm, very strange. Why not using standard pci bridge logic?
Any idea?
> ---
> hw/xio3130_downstream.c |7 +++
> hw
