On 06/09/2018 17:44, Peter Maydell wrote:
> On 6 September 2018 at 16:07, Michael Eager wrote:
>> Any comments?
> I'd quite like to hear from somebody more familiar with the
> readconfig/writeconfig stuff than me about whether this
> very riscv-centric approach makes sense and fits with how
> the
On 07/09/2018 02:21, Michael Eager wrote:
> It could also be extended to describe other processor features, for
> example, the number of cores.
The number of cores is already described via -smp, isn't it?
Paolo
On 09/06/2018 08:44 AM, Peter Maydell wrote:
On 6 September 2018 at 16:07, Michael Eager wrote:
Any comments?
I'd quite like to hear from somebody more familiar with the
readconfig/writeconfig stuff than me about whether this
very riscv-centric approach makes sense and fits with how
the confi
On 6 September 2018 at 16:07, Michael Eager wrote:
> Any comments?
I'd quite like to hear from somebody more familiar with the
readconfig/writeconfig stuff than me about whether this
very riscv-centric approach makes sense and fits with how
the config file is used by other parts of QEMU.
I'm not
Any comments?
On 08/30/2018 09:22 AM, Michael Eager wrote:
Corrected patch attached.
On 08/29/2018 05:48 PM, Michael Eager wrote:
Whoops. I just noticed that this patch is against the riscv-qemu
repo on github, not the qemu.org repo. I will rework it for the
qemu.org repo. Meanwhile, I wel
Corrected patch attached.
On 08/29/2018 05:48 PM, Michael Eager wrote:
Whoops. I just noticed that this patch is against the riscv-qemu
repo on github, not the qemu.org repo. I will rework it for the
qemu.org repo. Meanwhile, I welcome any comments.
On 08/29/2018 05:21 PM, Michael Eager wr
Whoops. I just noticed that this patch is against the riscv-qemu
repo on github, not the qemu.org repo. I will rework it for the
qemu.org repo. Meanwhile, I welcome any comments.
On 08/29/2018 05:21 PM, Michael Eager wrote:
Memory parameters for RISC-V boards can be read from a configuratio
